1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2017-2019 NXP
11 #include <sys/epoll.h>
13 #include <rte_atomic.h>
14 #include <rte_byteorder.h>
15 #include <rte_common.h>
16 #include <rte_debug.h>
19 #include <rte_lcore.h>
21 #include <rte_malloc.h>
22 #include <rte_memcpy.h>
23 #include <rte_memory.h>
24 #include <rte_memzone.h>
26 #include <rte_eventdev.h>
27 #include <rte_eventdev_pmd_vdev.h>
28 #include <rte_ethdev.h>
29 #include <rte_event_eth_rx_adapter.h>
30 #include <rte_event_eth_tx_adapter.h>
31 #include <rte_cryptodev.h>
32 #include <rte_dpaa_bus.h>
33 #include <rte_dpaa_logs.h>
34 #include <rte_cycles.h>
35 #include <rte_kvargs.h>
37 #include <dpaa_ethdev.h>
38 #include <dpaa_sec_event.h>
39 #include "dpaa_eventdev.h"
40 #include <dpaa_mempool.h>
44 * Evendev = Virtual Instance for SoC
45 * Eventport = Portal Instance
46 * Eventqueue = Channel Instance
47 * 1 Eventdev can have N Eventqueue
49 RTE_LOG_REGISTER(dpaa_logtype_eventdev, pmd.event.dpaa, NOTICE);
51 #define DISABLE_INTR_MODE "disable_intr"
54 dpaa_event_dequeue_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
55 uint64_t *timeout_ticks)
57 EVENTDEV_INIT_FUNC_TRACE();
61 uint64_t cycles_per_second;
63 cycles_per_second = rte_get_timer_hz();
64 *timeout_ticks = (ns * cycles_per_second) / NS_PER_S;
70 dpaa_event_dequeue_timeout_ticks_intr(struct rte_eventdev *dev, uint64_t ns,
71 uint64_t *timeout_ticks)
75 *timeout_ticks = ns/1000;
80 dpaa_eventq_portal_add(u16 ch_id)
84 sdqcr = QM_SDQCR_CHANNELS_POOL_CONV(ch_id);
85 qman_static_dequeue_add(sdqcr, NULL);
89 dpaa_event_enqueue_burst(void *port, const struct rte_event ev[],
93 struct rte_mbuf *mbuf;
96 /*Release all the contexts saved previously*/
97 for (i = 0; i < nb_events; i++) {
99 case RTE_EVENT_OP_RELEASE:
100 qman_dca_index(ev[i].impl_opaque, 0);
101 mbuf = DPAA_PER_LCORE_DQRR_MBUF(i);
102 mbuf->seqn = DPAA_INVALID_MBUF_SEQN;
103 DPAA_PER_LCORE_DQRR_HELD &= ~(1 << i);
104 DPAA_PER_LCORE_DQRR_SIZE--;
115 dpaa_event_enqueue(void *port, const struct rte_event *ev)
117 return dpaa_event_enqueue_burst(port, ev, 1);
120 static void drain_4_bytes(int fd, fd_set *fdset)
122 if (FD_ISSET(fd, fdset)) {
125 ssize_t sjunk = read(qman_thread_fd(), &junk, sizeof(junk));
126 if (sjunk != sizeof(junk))
127 DPAA_EVENTDEV_ERR("UIO irq read error");
132 dpaa_event_dequeue_wait(uint64_t timeout_ticks)
138 /* Go into (and back out of) IRQ mode for each select,
139 * it simplifies exit-path considerations and other
140 * potential nastiness.
142 struct timeval tv = {
143 .tv_sec = timeout_ticks / 1000000,
144 .tv_usec = timeout_ticks % 1000000
147 fd_qman = qman_thread_fd();
150 FD_SET(fd_qman, &readset);
152 qman_irqsource_add(QM_PIRQ_DQRI);
154 ret = select(nfds, &readset, NULL, NULL, &tv);
157 /* Calling irqsource_remove() prior to thread_irq()
158 * means thread_irq() will not process whatever caused
159 * the interrupts, however it does ensure that, once
160 * thread_irq() re-enables interrupts, they won't fire
163 qman_irqsource_remove(~0);
164 drain_4_bytes(fd_qman, &readset);
171 dpaa_event_dequeue_burst(void *port, struct rte_event ev[],
172 uint16_t nb_events, uint64_t timeout_ticks)
178 uint64_t cur_ticks = 0, wait_time_ticks = 0;
179 struct dpaa_port *portal = (struct dpaa_port *)port;
180 struct rte_mbuf *mbuf;
182 if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
183 /* Affine current thread context to a qman portal */
184 ret = rte_dpaa_portal_init((void *)0);
186 DPAA_EVENTDEV_ERR("Unable to initialize portal");
191 if (unlikely(!portal->is_port_linked)) {
193 * Affine event queue for current thread context
196 for (i = 0; i < portal->num_linked_evq; i++) {
197 ch_id = portal->evq_info[i].ch_id;
198 dpaa_eventq_portal_add(ch_id);
200 portal->is_port_linked = true;
203 /* Check if there are atomic contexts to be released */
205 while (DPAA_PER_LCORE_DQRR_SIZE) {
206 if (DPAA_PER_LCORE_DQRR_HELD & (1 << i)) {
207 qman_dca_index(i, 0);
208 mbuf = DPAA_PER_LCORE_DQRR_MBUF(i);
209 mbuf->seqn = DPAA_INVALID_MBUF_SEQN;
210 DPAA_PER_LCORE_DQRR_HELD &= ~(1 << i);
211 DPAA_PER_LCORE_DQRR_SIZE--;
215 DPAA_PER_LCORE_DQRR_HELD = 0;
218 wait_time_ticks = timeout_ticks;
220 wait_time_ticks = portal->timeout_us;
222 wait_time_ticks += rte_get_timer_cycles();
224 /* Lets dequeue the frames */
225 num_frames = qman_portal_dequeue(ev, nb_events, buffers);
228 cur_ticks = rte_get_timer_cycles();
229 } while (cur_ticks < wait_time_ticks);
235 dpaa_event_dequeue(void *port, struct rte_event *ev, uint64_t timeout_ticks)
237 return dpaa_event_dequeue_burst(port, ev, 1, timeout_ticks);
241 dpaa_event_dequeue_burst_intr(void *port, struct rte_event ev[],
242 uint16_t nb_events, uint64_t timeout_ticks)
247 u32 num_frames, i, irq = 0;
248 uint64_t cur_ticks = 0, wait_time_ticks = 0;
249 struct dpaa_port *portal = (struct dpaa_port *)port;
250 struct rte_mbuf *mbuf;
252 if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
253 /* Affine current thread context to a qman portal */
254 ret = rte_dpaa_portal_init((void *)0);
256 DPAA_EVENTDEV_ERR("Unable to initialize portal");
261 if (unlikely(!portal->is_port_linked)) {
263 * Affine event queue for current thread context
266 for (i = 0; i < portal->num_linked_evq; i++) {
267 ch_id = portal->evq_info[i].ch_id;
268 dpaa_eventq_portal_add(ch_id);
270 portal->is_port_linked = true;
273 /* Check if there are atomic contexts to be released */
275 while (DPAA_PER_LCORE_DQRR_SIZE) {
276 if (DPAA_PER_LCORE_DQRR_HELD & (1 << i)) {
277 qman_dca_index(i, 0);
278 mbuf = DPAA_PER_LCORE_DQRR_MBUF(i);
279 mbuf->seqn = DPAA_INVALID_MBUF_SEQN;
280 DPAA_PER_LCORE_DQRR_HELD &= ~(1 << i);
281 DPAA_PER_LCORE_DQRR_SIZE--;
285 DPAA_PER_LCORE_DQRR_HELD = 0;
288 wait_time_ticks = timeout_ticks;
290 wait_time_ticks = portal->timeout_us;
293 /* Lets dequeue the frames */
294 num_frames = qman_portal_dequeue(ev, nb_events, buffers);
299 if (wait_time_ticks) { /* wait for time */
300 if (dpaa_event_dequeue_wait(wait_time_ticks) > 0) {
304 break; /* no event after waiting */
306 cur_ticks = rte_get_timer_cycles();
307 } while (cur_ticks < wait_time_ticks);
313 dpaa_event_dequeue_intr(void *port,
314 struct rte_event *ev,
315 uint64_t timeout_ticks)
317 return dpaa_event_dequeue_burst_intr(port, ev, 1, timeout_ticks);
321 dpaa_event_dev_info_get(struct rte_eventdev *dev,
322 struct rte_event_dev_info *dev_info)
324 EVENTDEV_INIT_FUNC_TRACE();
327 dev_info->driver_name = "event_dpaa1";
328 dev_info->min_dequeue_timeout_ns =
329 DPAA_EVENT_MIN_DEQUEUE_TIMEOUT;
330 dev_info->max_dequeue_timeout_ns =
331 DPAA_EVENT_MAX_DEQUEUE_TIMEOUT;
332 dev_info->dequeue_timeout_ns =
333 DPAA_EVENT_PORT_DEQUEUE_TIMEOUT_NS;
334 dev_info->max_event_queues =
335 DPAA_EVENT_MAX_QUEUES;
336 dev_info->max_event_queue_flows =
337 DPAA_EVENT_MAX_QUEUE_FLOWS;
338 dev_info->max_event_queue_priority_levels =
339 DPAA_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
340 dev_info->max_event_priority_levels =
341 DPAA_EVENT_MAX_EVENT_PRIORITY_LEVELS;
342 dev_info->max_event_ports =
343 DPAA_EVENT_MAX_EVENT_PORT;
344 dev_info->max_event_port_dequeue_depth =
345 DPAA_EVENT_MAX_PORT_DEQUEUE_DEPTH;
346 dev_info->max_event_port_enqueue_depth =
347 DPAA_EVENT_MAX_PORT_ENQUEUE_DEPTH;
349 * TODO: Need to find out that how to fetch this info
350 * from kernel or somewhere else.
352 dev_info->max_num_events =
353 DPAA_EVENT_MAX_NUM_EVENTS;
354 dev_info->event_dev_cap =
355 RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
356 RTE_EVENT_DEV_CAP_BURST_MODE |
357 RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
358 RTE_EVENT_DEV_CAP_NONSEQ_MODE |
359 RTE_EVENT_DEV_CAP_CARRY_FLOW_ID;
363 dpaa_event_dev_configure(const struct rte_eventdev *dev)
365 struct dpaa_eventdev *priv = dev->data->dev_private;
366 struct rte_event_dev_config *conf = &dev->data->dev_conf;
370 EVENTDEV_INIT_FUNC_TRACE();
371 priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
372 priv->nb_events_limit = conf->nb_events_limit;
373 priv->nb_event_queues = conf->nb_event_queues;
374 priv->nb_event_ports = conf->nb_event_ports;
375 priv->nb_event_queue_flows = conf->nb_event_queue_flows;
376 priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
377 priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
378 priv->event_dev_cfg = conf->event_dev_cfg;
380 ch_id = rte_malloc("dpaa-channels",
381 sizeof(uint32_t) * priv->nb_event_queues,
382 RTE_CACHE_LINE_SIZE);
384 DPAA_EVENTDEV_ERR("Fail to allocate memory for dpaa channels\n");
387 /* Create requested event queues within the given event device */
388 ret = qman_alloc_pool_range(ch_id, priv->nb_event_queues, 1, 0);
390 DPAA_EVENTDEV_ERR("qman_alloc_pool_range %u, err =%d\n",
391 priv->nb_event_queues, ret);
395 for (i = 0; i < priv->nb_event_queues; i++)
396 priv->evq_info[i].ch_id = (u16)ch_id[i];
398 /* Lets prepare event ports */
399 memset(&priv->ports[0], 0,
400 sizeof(struct dpaa_port) * priv->nb_event_ports);
402 /* Check dequeue timeout method is per dequeue or global */
403 if (priv->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {
405 * Use timeout value as given in dequeue operation.
406 * So invalidating this timeout value.
408 priv->dequeue_timeout_ns = 0;
410 } else if (conf->dequeue_timeout_ns == 0) {
411 priv->dequeue_timeout_ns = DPAA_EVENT_PORT_DEQUEUE_TIMEOUT_NS;
413 priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
416 for (i = 0; i < priv->nb_event_ports; i++) {
417 if (priv->intr_mode) {
418 priv->ports[i].timeout_us =
419 priv->dequeue_timeout_ns/1000;
421 uint64_t cycles_per_second;
423 cycles_per_second = rte_get_timer_hz();
424 priv->ports[i].timeout_us =
425 (priv->dequeue_timeout_ns * cycles_per_second)
431 * TODO: Currently portals are affined with threads. Maximum threads
432 * can be created equals to number of lcore.
435 DPAA_EVENTDEV_INFO("Configured eventdev devid=%d", dev->data->dev_id);
441 dpaa_event_dev_start(struct rte_eventdev *dev)
443 EVENTDEV_INIT_FUNC_TRACE();
450 dpaa_event_dev_stop(struct rte_eventdev *dev)
452 EVENTDEV_INIT_FUNC_TRACE();
457 dpaa_event_dev_close(struct rte_eventdev *dev)
459 EVENTDEV_INIT_FUNC_TRACE();
466 dpaa_event_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
467 struct rte_event_queue_conf *queue_conf)
469 EVENTDEV_INIT_FUNC_TRACE();
472 RTE_SET_USED(queue_id);
474 memset(queue_conf, 0, sizeof(struct rte_event_queue_conf));
475 queue_conf->nb_atomic_flows = DPAA_EVENT_QUEUE_ATOMIC_FLOWS;
476 queue_conf->schedule_type = RTE_SCHED_TYPE_PARALLEL;
477 queue_conf->priority = RTE_EVENT_DEV_PRIORITY_HIGHEST;
481 dpaa_event_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
482 const struct rte_event_queue_conf *queue_conf)
484 struct dpaa_eventdev *priv = dev->data->dev_private;
485 struct dpaa_eventq *evq_info = &priv->evq_info[queue_id];
487 EVENTDEV_INIT_FUNC_TRACE();
489 switch (queue_conf->schedule_type) {
490 case RTE_SCHED_TYPE_PARALLEL:
491 case RTE_SCHED_TYPE_ATOMIC:
493 case RTE_SCHED_TYPE_ORDERED:
494 DPAA_EVENTDEV_ERR("Schedule type is not supported.");
497 evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
498 evq_info->event_queue_id = queue_id;
504 dpaa_event_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
506 EVENTDEV_INIT_FUNC_TRACE();
509 RTE_SET_USED(queue_id);
513 dpaa_event_port_default_conf_get(struct rte_eventdev *dev, uint8_t port_id,
514 struct rte_event_port_conf *port_conf)
516 EVENTDEV_INIT_FUNC_TRACE();
519 RTE_SET_USED(port_id);
521 port_conf->new_event_threshold = DPAA_EVENT_MAX_NUM_EVENTS;
522 port_conf->dequeue_depth = DPAA_EVENT_MAX_PORT_DEQUEUE_DEPTH;
523 port_conf->enqueue_depth = DPAA_EVENT_MAX_PORT_ENQUEUE_DEPTH;
527 dpaa_event_port_setup(struct rte_eventdev *dev, uint8_t port_id,
528 const struct rte_event_port_conf *port_conf)
530 struct dpaa_eventdev *eventdev = dev->data->dev_private;
532 EVENTDEV_INIT_FUNC_TRACE();
534 RTE_SET_USED(port_conf);
535 dev->data->ports[port_id] = &eventdev->ports[port_id];
541 dpaa_event_port_release(void *port)
543 EVENTDEV_INIT_FUNC_TRACE();
549 dpaa_event_port_link(struct rte_eventdev *dev, void *port,
550 const uint8_t queues[], const uint8_t priorities[],
553 struct dpaa_eventdev *priv = dev->data->dev_private;
554 struct dpaa_port *event_port = (struct dpaa_port *)port;
555 struct dpaa_eventq *event_queue;
560 RTE_SET_USED(priorities);
562 /* First check that input configuration are valid */
563 for (i = 0; i < nb_links; i++) {
564 eventq_id = queues[i];
565 event_queue = &priv->evq_info[eventq_id];
566 if ((event_queue->event_queue_cfg
567 & RTE_EVENT_QUEUE_CFG_SINGLE_LINK)
568 && (event_queue->event_port)) {
573 for (i = 0; i < nb_links; i++) {
574 eventq_id = queues[i];
575 event_queue = &priv->evq_info[eventq_id];
576 event_port->evq_info[i].event_queue_id = eventq_id;
577 event_port->evq_info[i].ch_id = event_queue->ch_id;
578 event_queue->event_port = port;
581 event_port->num_linked_evq = event_port->num_linked_evq + i;
587 dpaa_event_port_unlink(struct rte_eventdev *dev, void *port,
588 uint8_t queues[], uint16_t nb_links)
592 struct dpaa_eventq *event_queue;
593 struct dpaa_eventdev *priv = dev->data->dev_private;
594 struct dpaa_port *event_port = (struct dpaa_port *)port;
596 if (!event_port->num_linked_evq)
599 for (i = 0; i < nb_links; i++) {
600 eventq_id = queues[i];
601 event_port->evq_info[eventq_id].event_queue_id = -1;
602 event_port->evq_info[eventq_id].ch_id = 0;
603 event_queue = &priv->evq_info[eventq_id];
604 event_queue->event_port = NULL;
607 if (event_port->num_linked_evq)
608 event_port->num_linked_evq = event_port->num_linked_evq - i;
614 dpaa_event_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
615 const struct rte_eth_dev *eth_dev,
618 const char *ethdev_driver = eth_dev->device->driver->name;
620 EVENTDEV_INIT_FUNC_TRACE();
624 if (!strcmp(ethdev_driver, "net_dpaa"))
625 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA_CAP;
627 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
633 dpaa_event_eth_rx_adapter_queue_add(
634 const struct rte_eventdev *dev,
635 const struct rte_eth_dev *eth_dev,
637 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
639 struct dpaa_eventdev *eventdev = dev->data->dev_private;
640 uint8_t ev_qid = queue_conf->ev.queue_id;
641 u16 ch_id = eventdev->evq_info[ev_qid].ch_id;
642 struct dpaa_if *dpaa_intf = eth_dev->data->dev_private;
645 EVENTDEV_INIT_FUNC_TRACE();
647 if (rx_queue_id == -1) {
648 for (i = 0; i < dpaa_intf->nb_rx_queues; i++) {
649 ret = dpaa_eth_eventq_attach(eth_dev, i, ch_id,
653 "Event Queue attach failed:%d\n", ret);
654 goto detach_configured_queues;
660 ret = dpaa_eth_eventq_attach(eth_dev, rx_queue_id, ch_id, queue_conf);
662 DPAA_EVENTDEV_ERR("dpaa_eth_eventq_attach failed:%d\n", ret);
665 detach_configured_queues:
667 for (i = (i - 1); i >= 0 ; i--)
668 dpaa_eth_eventq_detach(eth_dev, i);
674 dpaa_event_eth_rx_adapter_queue_del(const struct rte_eventdev *dev,
675 const struct rte_eth_dev *eth_dev,
679 struct dpaa_if *dpaa_intf = eth_dev->data->dev_private;
681 EVENTDEV_INIT_FUNC_TRACE();
684 if (rx_queue_id == -1) {
685 for (i = 0; i < dpaa_intf->nb_rx_queues; i++) {
686 ret = dpaa_eth_eventq_detach(eth_dev, i);
689 "Event Queue detach failed:%d\n", ret);
695 ret = dpaa_eth_eventq_detach(eth_dev, rx_queue_id);
697 DPAA_EVENTDEV_ERR("dpaa_eth_eventq_detach failed:%d\n", ret);
702 dpaa_event_eth_rx_adapter_start(const struct rte_eventdev *dev,
703 const struct rte_eth_dev *eth_dev)
705 EVENTDEV_INIT_FUNC_TRACE();
708 RTE_SET_USED(eth_dev);
714 dpaa_event_eth_rx_adapter_stop(const struct rte_eventdev *dev,
715 const struct rte_eth_dev *eth_dev)
717 EVENTDEV_INIT_FUNC_TRACE();
720 RTE_SET_USED(eth_dev);
726 dpaa_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
727 const struct rte_cryptodev *cdev,
730 const char *name = cdev->data->name;
732 EVENTDEV_INIT_FUNC_TRACE();
736 if (!strncmp(name, "dpaa_sec-", 9))
737 *caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP;
745 dpaa_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
746 const struct rte_cryptodev *cryptodev,
747 const struct rte_event *ev)
749 struct dpaa_eventdev *priv = dev->data->dev_private;
750 uint8_t ev_qid = ev->queue_id;
751 u16 ch_id = priv->evq_info[ev_qid].ch_id;
754 EVENTDEV_INIT_FUNC_TRACE();
756 for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
757 ret = dpaa_sec_eventq_attach(cryptodev, i,
760 DPAA_EVENTDEV_ERR("dpaa_sec_eventq_attach failed: ret %d\n",
767 for (i = (i - 1); i >= 0 ; i--)
768 dpaa_sec_eventq_detach(cryptodev, i);
774 dpaa_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
775 const struct rte_cryptodev *cryptodev,
777 const struct rte_event *ev)
779 struct dpaa_eventdev *priv = dev->data->dev_private;
780 uint8_t ev_qid = ev->queue_id;
781 u16 ch_id = priv->evq_info[ev_qid].ch_id;
784 EVENTDEV_INIT_FUNC_TRACE();
786 if (rx_queue_id == -1)
787 return dpaa_eventdev_crypto_queue_add_all(dev,
790 ret = dpaa_sec_eventq_attach(cryptodev, rx_queue_id,
794 "dpaa_sec_eventq_attach failed: ret: %d\n", ret);
801 dpaa_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
802 const struct rte_cryptodev *cdev)
806 EVENTDEV_INIT_FUNC_TRACE();
810 for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
811 ret = dpaa_sec_eventq_detach(cdev, i);
814 "dpaa_sec_eventq_detach failed:ret %d\n", ret);
823 dpaa_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
824 const struct rte_cryptodev *cryptodev,
829 EVENTDEV_INIT_FUNC_TRACE();
831 if (rx_queue_id == -1)
832 return dpaa_eventdev_crypto_queue_del_all(dev, cryptodev);
834 ret = dpaa_sec_eventq_detach(cryptodev, rx_queue_id);
837 "dpaa_sec_eventq_detach failed: ret: %d\n", ret);
845 dpaa_eventdev_crypto_start(const struct rte_eventdev *dev,
846 const struct rte_cryptodev *cryptodev)
848 EVENTDEV_INIT_FUNC_TRACE();
851 RTE_SET_USED(cryptodev);
857 dpaa_eventdev_crypto_stop(const struct rte_eventdev *dev,
858 const struct rte_cryptodev *cryptodev)
860 EVENTDEV_INIT_FUNC_TRACE();
863 RTE_SET_USED(cryptodev);
869 dpaa_eventdev_tx_adapter_create(uint8_t id,
870 const struct rte_eventdev *dev)
875 /* Nothing to do. Simply return. */
880 dpaa_eventdev_tx_adapter_caps(const struct rte_eventdev *dev,
881 const struct rte_eth_dev *eth_dev,
885 RTE_SET_USED(eth_dev);
887 *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT;
892 dpaa_eventdev_txa_enqueue_same_dest(void *port,
893 struct rte_event ev[],
896 struct rte_mbuf *m[DPAA_EVENT_MAX_PORT_ENQUEUE_DEPTH], *m0;
901 m0 = (struct rte_mbuf *)ev[0].mbuf;
902 qid = rte_event_eth_tx_adapter_txq_get(m0);
904 for (i = 0; i < nb_events; i++)
905 m[i] = (struct rte_mbuf *)ev[i].mbuf;
907 return rte_eth_tx_burst(m0->port, qid, m, nb_events);
911 dpaa_eventdev_txa_enqueue(void *port,
912 struct rte_event ev[],
915 struct rte_mbuf *m = (struct rte_mbuf *)ev[0].mbuf;
920 for (i = 0; i < nb_events; i++) {
921 qid = rte_event_eth_tx_adapter_txq_get(m);
922 rte_eth_tx_burst(m->port, qid, &m, 1);
928 static struct rte_eventdev_ops dpaa_eventdev_ops = {
929 .dev_infos_get = dpaa_event_dev_info_get,
930 .dev_configure = dpaa_event_dev_configure,
931 .dev_start = dpaa_event_dev_start,
932 .dev_stop = dpaa_event_dev_stop,
933 .dev_close = dpaa_event_dev_close,
934 .queue_def_conf = dpaa_event_queue_def_conf,
935 .queue_setup = dpaa_event_queue_setup,
936 .queue_release = dpaa_event_queue_release,
937 .port_def_conf = dpaa_event_port_default_conf_get,
938 .port_setup = dpaa_event_port_setup,
939 .port_release = dpaa_event_port_release,
940 .port_link = dpaa_event_port_link,
941 .port_unlink = dpaa_event_port_unlink,
942 .timeout_ticks = dpaa_event_dequeue_timeout_ticks,
943 .eth_rx_adapter_caps_get = dpaa_event_eth_rx_adapter_caps_get,
944 .eth_rx_adapter_queue_add = dpaa_event_eth_rx_adapter_queue_add,
945 .eth_rx_adapter_queue_del = dpaa_event_eth_rx_adapter_queue_del,
946 .eth_rx_adapter_start = dpaa_event_eth_rx_adapter_start,
947 .eth_rx_adapter_stop = dpaa_event_eth_rx_adapter_stop,
948 .eth_tx_adapter_caps_get = dpaa_eventdev_tx_adapter_caps,
949 .eth_tx_adapter_create = dpaa_eventdev_tx_adapter_create,
950 .crypto_adapter_caps_get = dpaa_eventdev_crypto_caps_get,
951 .crypto_adapter_queue_pair_add = dpaa_eventdev_crypto_queue_add,
952 .crypto_adapter_queue_pair_del = dpaa_eventdev_crypto_queue_del,
953 .crypto_adapter_start = dpaa_eventdev_crypto_start,
954 .crypto_adapter_stop = dpaa_eventdev_crypto_stop,
957 static int flag_check_handler(__rte_unused const char *key,
958 const char *value, __rte_unused void *opaque)
960 if (strcmp(value, "1"))
967 dpaa_event_check_flags(const char *params)
969 struct rte_kvargs *kvlist;
971 if (params == NULL || params[0] == '\0')
974 kvlist = rte_kvargs_parse(params, NULL);
978 if (!rte_kvargs_count(kvlist, DISABLE_INTR_MODE)) {
979 rte_kvargs_free(kvlist);
982 /* INTR MODE is disabled when there's key-value pair: disable_intr = 1*/
983 if (rte_kvargs_process(kvlist, DISABLE_INTR_MODE,
984 flag_check_handler, NULL) < 0) {
985 rte_kvargs_free(kvlist);
988 rte_kvargs_free(kvlist);
994 dpaa_event_dev_create(const char *name, const char *params)
996 struct rte_eventdev *eventdev;
997 struct dpaa_eventdev *priv;
999 eventdev = rte_event_pmd_vdev_init(name,
1000 sizeof(struct dpaa_eventdev),
1002 if (eventdev == NULL) {
1003 DPAA_EVENTDEV_ERR("Failed to create eventdev vdev %s", name);
1006 priv = eventdev->data->dev_private;
1008 eventdev->dev_ops = &dpaa_eventdev_ops;
1009 eventdev->enqueue = dpaa_event_enqueue;
1010 eventdev->enqueue_burst = dpaa_event_enqueue_burst;
1012 if (dpaa_event_check_flags(params)) {
1013 eventdev->dequeue = dpaa_event_dequeue;
1014 eventdev->dequeue_burst = dpaa_event_dequeue_burst;
1016 priv->intr_mode = 1;
1017 eventdev->dev_ops->timeout_ticks =
1018 dpaa_event_dequeue_timeout_ticks_intr;
1019 eventdev->dequeue = dpaa_event_dequeue_intr;
1020 eventdev->dequeue_burst = dpaa_event_dequeue_burst_intr;
1022 eventdev->txa_enqueue = dpaa_eventdev_txa_enqueue;
1023 eventdev->txa_enqueue_same_dest = dpaa_eventdev_txa_enqueue_same_dest;
1025 RTE_LOG(INFO, PMD, "%s eventdev added", name);
1027 /* For secondary processes, the primary has done all the work */
1028 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1031 priv->max_event_queues = DPAA_EVENT_MAX_QUEUES;
1039 dpaa_event_dev_probe(struct rte_vdev_device *vdev)
1044 name = rte_vdev_device_name(vdev);
1045 DPAA_EVENTDEV_INFO("Initializing %s", name);
1047 params = rte_vdev_device_args(vdev);
1049 return dpaa_event_dev_create(name, params);
1053 dpaa_event_dev_remove(struct rte_vdev_device *vdev)
1057 name = rte_vdev_device_name(vdev);
1058 DPAA_EVENTDEV_INFO("Closing %s", name);
1060 return rte_event_pmd_vdev_uninit(name);
1063 static struct rte_vdev_driver vdev_eventdev_dpaa_pmd = {
1064 .probe = dpaa_event_dev_probe,
1065 .remove = dpaa_event_dev_remove
1068 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA_PMD, vdev_eventdev_dpaa_pmd);
1069 RTE_PMD_REGISTER_PARAM_STRING(EVENTDEV_NAME_DPAA_PMD,
1070 DISABLE_INTR_MODE "=<int>");