1 /* SPDX-License-Identifier: BSD-3-Clause
13 #include <sys/epoll.h>
15 #include <rte_atomic.h>
16 #include <rte_byteorder.h>
17 #include <rte_common.h>
18 #include <rte_debug.h>
21 #include <rte_fslmc.h>
22 #include <rte_lcore.h>
24 #include <rte_malloc.h>
25 #include <rte_memcpy.h>
26 #include <rte_memory.h>
28 #include <rte_bus_vdev.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_event_eth_rx_adapter.h>
32 #include <fslmc_vfio.h>
33 #include <dpaa2_hw_pvt.h>
34 #include <dpaa2_hw_mempool.h>
35 #include <dpaa2_hw_dpio.h>
36 #include <dpaa2_ethdev.h>
37 #include "dpaa2_eventdev.h"
38 #include "dpaa2_eventdev_logs.h"
39 #include <portal/dpaa2_hw_pvt.h>
40 #include <mc/fsl_dpci.h>
43 * Evendev = SoC Instance
44 * Eventport = DPIO Instance
45 * Eventqueue = DPCON Instance
46 * 1 Eventdev can have N Eventqueue
47 * Soft Event Flow is DPCI Instance
50 /* Dynamic logging identified for mempool */
51 int dpaa2_logtype_event;
54 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
57 struct rte_eventdev *ev_dev =
58 ((struct dpaa2_io_portal_t *)port)->eventdev;
59 struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
60 uint32_t queue_id = ev[0].queue_id;
61 struct evq_info_t *evq_info = &priv->evq_info[queue_id];
63 struct qbman_swp *swp;
64 struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
65 uint32_t loop, frames_to_send;
66 struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
72 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
73 ret = dpaa2_affine_qbman_swp();
75 DPAA2_EVENTDEV_ERR("Failure in affining portal");
80 swp = DPAA2_PER_LCORE_PORTAL;
83 frames_to_send = (nb_events >> 3) ?
84 MAX_TX_RING_SLOTS : nb_events;
86 for (loop = 0; loop < frames_to_send; loop++) {
87 const struct rte_event *event = &ev[num_tx + loop];
89 if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
90 fqid = evq_info->dpci->rx_queue[
91 DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
93 fqid = evq_info->dpci->rx_queue[
94 DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
96 /* Prepare enqueue descriptor */
97 qbman_eq_desc_clear(&eqdesc[loop]);
98 qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
99 qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
100 qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
102 if (event->mbuf->seqn) {
103 uint8_t dqrr_index = event->mbuf->seqn - 1;
105 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
107 DPAA2_PER_LCORE_DQRR_SIZE--;
108 DPAA2_PER_LCORE_DQRR_HELD &=
112 memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
115 * todo - need to align with hw context data
118 struct rte_event *ev_temp = rte_malloc(NULL,
119 sizeof(struct rte_event), 0);
124 frames_to_send = loop;
126 "Unable to allocate event object");
129 rte_memcpy(ev_temp, event, sizeof(struct rte_event));
130 DPAA2_SET_FD_ADDR((&fd_arr[loop]), (size_t)ev_temp);
131 DPAA2_SET_FD_LEN((&fd_arr[loop]),
132 sizeof(struct rte_event));
136 while (loop < frames_to_send) {
137 loop += qbman_swp_enqueue_multiple_desc(swp,
138 &eqdesc[loop], &fd_arr[loop],
139 frames_to_send - loop);
141 num_tx += frames_to_send;
142 nb_events -= frames_to_send;
149 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
151 return dpaa2_eventdev_enqueue_burst(port, ev, 1);
154 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
156 struct epoll_event epoll_ev;
159 qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
160 QBMAN_SWP_INTERRUPT_DQRI);
163 ret = epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
164 &epoll_ev, 1, timeout_ticks);
166 /* sometimes due to some spurious interrupts epoll_wait fails
167 * with errno EINTR. so here we are retrying epoll_wait in such
168 * case to avoid the problem.
170 if (errno == EINTR) {
171 DPAA2_EVENTDEV_DEBUG("epoll_wait fails");
173 DPAA2_EVENTDEV_DEBUG("Dequeue burst Failed");
179 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
180 const struct qbman_fd *fd,
181 const struct qbman_result *dq,
182 struct dpaa2_queue *rxq,
183 struct rte_event *ev)
185 struct rte_event *ev_temp =
186 (struct rte_event *)(size_t)DPAA2_GET_FD_ADDR(fd);
190 rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
193 qbman_swp_dqrr_consume(swp, dq);
196 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
197 const struct qbman_fd *fd,
198 const struct qbman_result *dq,
199 struct dpaa2_queue *rxq,
200 struct rte_event *ev)
202 struct rte_event *ev_temp =
203 (struct rte_event *)(size_t)DPAA2_GET_FD_ADDR(fd);
204 uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
209 rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
211 ev->mbuf->seqn = dqrr_index + 1;
212 DPAA2_PER_LCORE_DQRR_SIZE++;
213 DPAA2_PER_LCORE_DQRR_HELD |= 1 << dqrr_index;
217 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
218 uint16_t nb_events, uint64_t timeout_ticks)
220 const struct qbman_result *dq;
221 struct qbman_swp *swp;
222 const struct qbman_fd *fd;
223 struct dpaa2_queue *rxq;
224 int num_pkts = 0, ret, i = 0;
228 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
229 ret = dpaa2_affine_qbman_swp();
231 DPAA2_EVENTDEV_ERR("Failure in affining portal");
235 swp = DPAA2_PER_LCORE_PORTAL;
237 /* Check if there are atomic contexts to be released */
238 while (DPAA2_PER_LCORE_DQRR_SIZE) {
239 if (DPAA2_PER_LCORE_DQRR_HELD & (1 << i)) {
240 qbman_swp_dqrr_idx_consume(swp, i);
241 DPAA2_PER_LCORE_DQRR_SIZE--;
242 DPAA2_PER_LCORE_DQRR_MBUF(i)->seqn =
243 DPAA2_INVALID_MBUF_SEQN;
247 DPAA2_PER_LCORE_DQRR_HELD = 0;
250 dq = qbman_swp_dqrr_next(swp);
252 if (!num_pkts && timeout_ticks) {
253 dpaa2_eventdev_dequeue_wait(timeout_ticks);
259 qbman_swp_prefetch_dqrr_next(swp);
261 fd = qbman_result_DQ_fd(dq);
262 rxq = (struct dpaa2_queue *)(size_t)qbman_result_DQ_fqd_ctx(dq);
264 rxq->cb(swp, fd, dq, rxq, &ev[num_pkts]);
266 qbman_swp_dqrr_consume(swp, dq);
267 DPAA2_EVENTDEV_ERR("Null Return VQ received");
272 } while (num_pkts < nb_events);
278 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
279 uint64_t timeout_ticks)
281 return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
285 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
286 struct rte_event_dev_info *dev_info)
288 struct dpaa2_eventdev *priv = dev->data->dev_private;
290 EVENTDEV_INIT_FUNC_TRACE();
294 memset(dev_info, 0, sizeof(struct rte_event_dev_info));
295 dev_info->min_dequeue_timeout_ns =
296 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
297 dev_info->max_dequeue_timeout_ns =
298 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
299 dev_info->dequeue_timeout_ns =
300 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
301 dev_info->max_event_queues = priv->max_event_queues;
302 dev_info->max_event_queue_flows =
303 DPAA2_EVENT_MAX_QUEUE_FLOWS;
304 dev_info->max_event_queue_priority_levels =
305 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
306 dev_info->max_event_priority_levels =
307 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
308 dev_info->max_event_ports = rte_fslmc_get_device_count(DPAA2_IO);
309 dev_info->max_event_port_dequeue_depth =
310 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
311 dev_info->max_event_port_enqueue_depth =
312 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
313 dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
314 dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
315 RTE_EVENT_DEV_CAP_BURST_MODE|
316 RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
317 RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
318 RTE_EVENT_DEV_CAP_NONSEQ_MODE;
323 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
325 struct dpaa2_eventdev *priv = dev->data->dev_private;
326 struct rte_event_dev_config *conf = &dev->data->dev_conf;
328 EVENTDEV_INIT_FUNC_TRACE();
330 priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
331 priv->nb_event_queues = conf->nb_event_queues;
332 priv->nb_event_ports = conf->nb_event_ports;
333 priv->nb_event_queue_flows = conf->nb_event_queue_flows;
334 priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
335 priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
336 priv->event_dev_cfg = conf->event_dev_cfg;
338 DPAA2_EVENTDEV_DEBUG("Configured eventdev devid=%d",
344 dpaa2_eventdev_start(struct rte_eventdev *dev)
346 EVENTDEV_INIT_FUNC_TRACE();
354 dpaa2_eventdev_stop(struct rte_eventdev *dev)
356 EVENTDEV_INIT_FUNC_TRACE();
362 dpaa2_eventdev_close(struct rte_eventdev *dev)
364 EVENTDEV_INIT_FUNC_TRACE();
372 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
373 struct rte_event_queue_conf *queue_conf)
375 EVENTDEV_INIT_FUNC_TRACE();
378 RTE_SET_USED(queue_id);
379 RTE_SET_USED(queue_conf);
381 queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
382 queue_conf->schedule_type = RTE_SCHED_TYPE_ATOMIC |
383 RTE_SCHED_TYPE_PARALLEL;
384 queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
388 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
390 EVENTDEV_INIT_FUNC_TRACE();
393 RTE_SET_USED(queue_id);
397 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
398 const struct rte_event_queue_conf *queue_conf)
400 struct dpaa2_eventdev *priv = dev->data->dev_private;
401 struct evq_info_t *evq_info =
402 &priv->evq_info[queue_id];
404 EVENTDEV_INIT_FUNC_TRACE();
406 evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
412 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
413 struct rte_event_port_conf *port_conf)
415 EVENTDEV_INIT_FUNC_TRACE();
418 RTE_SET_USED(port_id);
419 RTE_SET_USED(port_conf);
421 port_conf->new_event_threshold =
422 DPAA2_EVENT_MAX_NUM_EVENTS;
423 port_conf->dequeue_depth =
424 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
425 port_conf->enqueue_depth =
426 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
427 port_conf->disable_implicit_release = 0;
431 dpaa2_eventdev_port_release(void *port)
433 EVENTDEV_INIT_FUNC_TRACE();
439 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
440 const struct rte_event_port_conf *port_conf)
442 EVENTDEV_INIT_FUNC_TRACE();
444 RTE_SET_USED(port_conf);
446 if (!dpaa2_io_portal[port_id].dpio_dev) {
447 dpaa2_io_portal[port_id].dpio_dev =
448 dpaa2_get_qbman_swp(port_id);
449 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
450 if (!dpaa2_io_portal[port_id].dpio_dev)
454 dpaa2_io_portal[port_id].eventdev = dev;
455 dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
460 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
461 uint8_t queues[], uint16_t nb_unlinks)
463 struct dpaa2_eventdev *priv = dev->data->dev_private;
464 struct dpaa2_io_portal_t *dpaa2_portal = port;
465 struct evq_info_t *evq_info;
468 EVENTDEV_INIT_FUNC_TRACE();
470 for (i = 0; i < nb_unlinks; i++) {
471 evq_info = &priv->evq_info[queues[i]];
472 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
473 evq_info->dpcon->channel_index, 0);
474 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
475 0, dpaa2_portal->dpio_dev->token,
476 evq_info->dpcon->dpcon_id);
480 return (int)nb_unlinks;
484 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
485 const uint8_t queues[], const uint8_t priorities[],
488 struct dpaa2_eventdev *priv = dev->data->dev_private;
489 struct dpaa2_io_portal_t *dpaa2_portal = port;
490 struct evq_info_t *evq_info;
491 uint8_t channel_index;
494 EVENTDEV_INIT_FUNC_TRACE();
496 for (i = 0; i < nb_links; i++) {
497 evq_info = &priv->evq_info[queues[i]];
501 ret = dpio_add_static_dequeue_channel(
502 dpaa2_portal->dpio_dev->dpio,
503 CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
504 evq_info->dpcon->dpcon_id, &channel_index);
507 "Static dequeue config failed: err(%d)", ret);
511 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
513 evq_info->dpcon->channel_index = channel_index;
517 RTE_SET_USED(priorities);
519 return (int)nb_links;
521 for (n = 0; n < i; n++) {
522 evq_info = &priv->evq_info[queues[n]];
523 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
524 evq_info->dpcon->channel_index, 0);
525 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
526 0, dpaa2_portal->dpio_dev->token,
527 evq_info->dpcon->dpcon_id);
534 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
535 uint64_t *timeout_ticks)
539 EVENTDEV_INIT_FUNC_TRACE();
542 *timeout_ticks = ns * scale;
548 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
550 EVENTDEV_INIT_FUNC_TRACE();
557 dpaa2_eventdev_eth_caps_get(const struct rte_eventdev *dev,
558 const struct rte_eth_dev *eth_dev,
561 const char *ethdev_driver = eth_dev->device->driver->name;
563 EVENTDEV_INIT_FUNC_TRACE();
567 if (!strcmp(ethdev_driver, "net_dpaa2"))
568 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP;
570 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
576 dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev,
577 const struct rte_eth_dev *eth_dev,
578 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
580 struct dpaa2_eventdev *priv = dev->data->dev_private;
581 uint8_t ev_qid = queue_conf->ev.queue_id;
582 uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
585 EVENTDEV_INIT_FUNC_TRACE();
587 for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
588 ret = dpaa2_eth_eventq_attach(eth_dev, i,
589 dpcon_id, queue_conf);
592 "Event queue attach failed: err(%d)", ret);
598 for (i = (i - 1); i >= 0 ; i--)
599 dpaa2_eth_eventq_detach(eth_dev, i);
605 dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
606 const struct rte_eth_dev *eth_dev,
608 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
610 struct dpaa2_eventdev *priv = dev->data->dev_private;
611 uint8_t ev_qid = queue_conf->ev.queue_id;
612 uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
615 EVENTDEV_INIT_FUNC_TRACE();
617 if (rx_queue_id == -1)
618 return dpaa2_eventdev_eth_queue_add_all(dev,
619 eth_dev, queue_conf);
621 ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
622 dpcon_id, queue_conf);
625 "Event queue attach failed: err(%d)", ret);
632 dpaa2_eventdev_eth_queue_del_all(const struct rte_eventdev *dev,
633 const struct rte_eth_dev *eth_dev)
637 EVENTDEV_INIT_FUNC_TRACE();
641 for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
642 ret = dpaa2_eth_eventq_detach(eth_dev, i);
645 "Event queue detach failed: err(%d)", ret);
654 dpaa2_eventdev_eth_queue_del(const struct rte_eventdev *dev,
655 const struct rte_eth_dev *eth_dev,
660 EVENTDEV_INIT_FUNC_TRACE();
662 if (rx_queue_id == -1)
663 return dpaa2_eventdev_eth_queue_del_all(dev, eth_dev);
665 ret = dpaa2_eth_eventq_detach(eth_dev, rx_queue_id);
668 "Event queue detach failed: err(%d)", ret);
676 dpaa2_eventdev_eth_start(const struct rte_eventdev *dev,
677 const struct rte_eth_dev *eth_dev)
679 EVENTDEV_INIT_FUNC_TRACE();
682 RTE_SET_USED(eth_dev);
688 dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
689 const struct rte_eth_dev *eth_dev)
691 EVENTDEV_INIT_FUNC_TRACE();
694 RTE_SET_USED(eth_dev);
699 static struct rte_eventdev_ops dpaa2_eventdev_ops = {
700 .dev_infos_get = dpaa2_eventdev_info_get,
701 .dev_configure = dpaa2_eventdev_configure,
702 .dev_start = dpaa2_eventdev_start,
703 .dev_stop = dpaa2_eventdev_stop,
704 .dev_close = dpaa2_eventdev_close,
705 .queue_def_conf = dpaa2_eventdev_queue_def_conf,
706 .queue_setup = dpaa2_eventdev_queue_setup,
707 .queue_release = dpaa2_eventdev_queue_release,
708 .port_def_conf = dpaa2_eventdev_port_def_conf,
709 .port_setup = dpaa2_eventdev_port_setup,
710 .port_release = dpaa2_eventdev_port_release,
711 .port_link = dpaa2_eventdev_port_link,
712 .port_unlink = dpaa2_eventdev_port_unlink,
713 .timeout_ticks = dpaa2_eventdev_timeout_ticks,
714 .dump = dpaa2_eventdev_dump,
715 .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get,
716 .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add,
717 .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
718 .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
719 .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
723 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
724 struct dpaa2_dpcon_dev *dpcon_dev)
726 struct dpci_rx_queue_cfg rx_queue_cfg;
729 /*Do settings to get the frame on a DPCON object*/
730 rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
731 DPCI_QUEUE_OPT_USER_CTX;
732 rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
733 rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
734 rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
736 dpci_dev->rx_queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
737 dpaa2_eventdev_process_parallel;
738 dpci_dev->rx_queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
739 dpaa2_eventdev_process_atomic;
741 for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
742 rx_queue_cfg.user_ctx = (size_t)(&dpci_dev->rx_queue[i]);
743 ret = dpci_set_rx_queue(&dpci_dev->dpci,
749 "DPCI Rx queue setup failed: err(%d)",
758 dpaa2_eventdev_create(const char *name)
760 struct rte_eventdev *eventdev;
761 struct dpaa2_eventdev *priv;
762 struct dpaa2_dpcon_dev *dpcon_dev = NULL;
763 struct dpaa2_dpci_dev *dpci_dev = NULL;
766 eventdev = rte_event_pmd_vdev_init(name,
767 sizeof(struct dpaa2_eventdev),
769 if (eventdev == NULL) {
770 DPAA2_EVENTDEV_ERR("Failed to create Event device %s", name);
774 eventdev->dev_ops = &dpaa2_eventdev_ops;
775 eventdev->enqueue = dpaa2_eventdev_enqueue;
776 eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
777 eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
778 eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
779 eventdev->dequeue = dpaa2_eventdev_dequeue;
780 eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
782 /* For secondary processes, the primary has done all the work */
783 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
786 priv = eventdev->data->dev_private;
787 priv->max_event_queues = 0;
790 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
793 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
795 dpci_dev = rte_dpaa2_alloc_dpci_dev();
797 rte_dpaa2_free_dpcon_dev(dpcon_dev);
800 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
802 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
805 "DPCI setup failed: err(%d)", ret);
808 priv->max_event_queues++;
809 } while (dpcon_dev && dpci_dev);
817 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
821 name = rte_vdev_device_name(vdev);
822 DPAA2_EVENTDEV_INFO("Initializing %s", name);
823 return dpaa2_eventdev_create(name);
827 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
831 name = rte_vdev_device_name(vdev);
832 DPAA2_EVENTDEV_INFO("Closing %s", name);
834 return rte_event_pmd_vdev_uninit(name);
837 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
838 .probe = dpaa2_eventdev_probe,
839 .remove = dpaa2_eventdev_remove
842 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);
844 RTE_INIT(dpaa2_eventdev_init_log);
846 dpaa2_eventdev_init_log(void)
848 dpaa2_logtype_event = rte_log_register("pmd.event.dpaa2");
849 if (dpaa2_logtype_event >= 0)
850 rte_log_set_level(dpaa2_logtype_event, RTE_LOG_NOTICE);