1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Ericsson AB
8 #include <rte_event_ring.h>
9 #include <rte_eventdev.h>
11 #define DSW_PMD_NAME RTE_STR(event_dsw)
13 /* Code changes are required to allow more ports. */
14 #define DSW_MAX_PORTS (64)
15 #define DSW_MAX_PORT_DEQUEUE_DEPTH (128)
16 #define DSW_MAX_PORT_ENQUEUE_DEPTH (128)
17 #define DSW_MAX_PORT_OUT_BUFFER (32)
19 #define DSW_MAX_QUEUES (16)
21 #define DSW_MAX_EVENTS (16384)
23 /* Code changes are required to allow more flows than 32k. */
24 #define DSW_MAX_FLOWS_BITS (15)
25 #define DSW_MAX_FLOWS (1<<(DSW_MAX_FLOWS_BITS))
26 #define DSW_MAX_FLOWS_MASK (DSW_MAX_FLOWS-1)
28 /* Eventdev RTE_SCHED_TYPE_PARALLEL doesn't have a concept of flows,
29 * but the 'dsw' scheduler (more or less) randomly assign flow id to
30 * events on parallel queues, to be able to reuse some of the
31 * migration mechanism and scheduling logic from
32 * RTE_SCHED_TYPE_ATOMIC. By moving one of the parallel "flows" from a
33 * particular port, the likely-hood of events being scheduled to this
34 * port is reduced, and thus a kind of statistical load balancing is
37 #define DSW_PARALLEL_FLOWS (1024)
39 /* 'Background tasks' are polling the control rings for *
40 * migration-related messages, or flush the output buffer (so
41 * buffered events doesn't linger too long). Shouldn't be too low,
42 * since the system won't benefit from the 'batching' effects from
43 * the output buffer, and shouldn't be too high, since it will make
44 * buffered events linger too long in case the port goes idle.
46 #define DSW_MAX_PORT_OPS_PER_BG_TASK (128)
48 /* Avoid making small 'loans' from the central in-flight event credit
49 * pool, to improve efficiency.
51 #define DSW_MIN_CREDIT_LOAN (64)
52 #define DSW_PORT_MAX_CREDITS (2*DSW_MIN_CREDIT_LOAN)
53 #define DSW_PORT_MIN_CREDITS (DSW_MIN_CREDIT_LOAN)
55 /* The rings are dimensioned so that all in-flight events can reside
56 * on any one of the port rings, to avoid the trouble of having to
57 * care about the case where there's no room on the destination port's
60 #define DSW_IN_RING_SIZE (DSW_MAX_EVENTS)
62 #define DSW_MAX_LOAD (INT16_MAX)
63 #define DSW_LOAD_FROM_PERCENT(x) ((int16_t)(((x)*DSW_MAX_LOAD)/100))
64 #define DSW_LOAD_TO_PERCENT(x) ((100*x)/DSW_MAX_LOAD)
66 /* The thought behind keeping the load update interval shorter than
67 * the migration interval is that the load from newly migrated flows
68 * should 'show up' on the load measurement before new migrations are
69 * considered. This is to avoid having too many flows, from too many
70 * source ports, to be migrated too quickly to a lightly loaded port -
71 * in particular since this might cause the system to oscillate.
73 #define DSW_LOAD_UPDATE_INTERVAL (DSW_MIGRATION_INTERVAL/4)
74 #define DSW_OLD_LOAD_WEIGHT (1)
76 #define DSW_MIGRATION_INTERVAL (1000)
81 /* Keeping a pointer here to avoid container_of() calls, which
82 * are expensive since they are very frequent and will result
83 * in an integer multiplication (since the port id is an index
84 * into the dsw_evdev port array).
86 struct dsw_evdev *dsw;
88 uint16_t dequeue_depth;
89 uint16_t enqueue_depth;
91 int32_t inflight_credits;
93 int32_t new_event_threshold;
95 uint16_t pending_releases;
97 uint16_t next_parallel_flow_id;
99 uint16_t ops_since_bg_task;
103 /* For port load measurement. */
104 uint64_t next_load_update;
105 uint64_t load_update_interval;
106 uint64_t measurement_start;
108 uint64_t busy_cycles;
109 uint64_t total_busy_cycles;
111 uint16_t out_buffer_len[DSW_MAX_PORTS];
112 struct rte_event out_buffer[DSW_MAX_PORTS][DSW_MAX_PORT_OUT_BUFFER];
114 struct rte_event_ring *in_ring __rte_cache_aligned;
116 /* Estimate of current port load. */
117 rte_atomic16_t load __rte_cache_aligned;
118 } __rte_cache_aligned;
121 uint8_t schedule_type;
122 uint8_t serving_ports[DSW_MAX_PORTS];
123 uint16_t num_serving_ports;
125 uint8_t flow_to_port_map[DSW_MAX_FLOWS] __rte_cache_aligned;
129 struct rte_eventdev_data *data;
131 struct dsw_port ports[DSW_MAX_PORTS];
133 struct dsw_queue queues[DSW_MAX_QUEUES];
135 int32_t max_inflight;
137 rte_atomic32_t credits_on_loan __rte_cache_aligned;
140 uint16_t dsw_event_enqueue(void *port, const struct rte_event *event);
141 uint16_t dsw_event_enqueue_burst(void *port,
142 const struct rte_event events[],
143 uint16_t events_len);
144 uint16_t dsw_event_enqueue_new_burst(void *port,
145 const struct rte_event events[],
146 uint16_t events_len);
147 uint16_t dsw_event_enqueue_forward_burst(void *port,
148 const struct rte_event events[],
149 uint16_t events_len);
151 uint16_t dsw_event_dequeue(void *port, struct rte_event *ev, uint64_t wait);
152 uint16_t dsw_event_dequeue_burst(void *port, struct rte_event *events,
153 uint16_t num, uint64_t wait);
155 static inline struct dsw_evdev *
156 dsw_pmd_priv(const struct rte_eventdev *eventdev)
158 return eventdev->data->dev_private;
161 #define DSW_LOG_DP(level, fmt, args...) \
162 RTE_LOG_DP(level, EVENTDEV, "[%s] %s() line %u: " fmt, \
164 __func__, __LINE__, ## args)
166 #define DSW_LOG_DP_PORT(level, port_id, fmt, args...) \
167 DSW_LOG_DP(level, "<Port %d> " fmt, port_id, ## args)