1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
7 #include <rte_common.h>
8 #include <cryptodev_pmd.h>
12 #include <ethdev_driver.h>
13 #include <rte_event_eth_rx_adapter.h>
14 #include <rte_kvargs.h>
15 #include <rte_lcore.h>
17 #include <rte_malloc.h>
18 #include <rte_memory.h>
19 #include <rte_bus_vdev.h>
21 #include "ssovf_evdev.h"
22 #include "timvf_evdev.h"
23 #include "otx_cryptodev_hw_access.h"
25 static uint8_t timvf_enable_stats;
27 RTE_LOG_REGISTER_DEFAULT(otx_logtype_ssovf, NOTICE);
29 /* SSOPF Mailbox messages */
31 struct ssovf_mbox_dev_info {
32 uint64_t min_deq_timeout_ns;
33 uint64_t max_deq_timeout_ns;
34 uint32_t max_num_events;
38 ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
40 struct octeontx_mbox_hdr hdr = {0};
41 uint16_t len = sizeof(struct ssovf_mbox_dev_info);
43 hdr.coproc = SSO_COPROC;
44 hdr.msg = SSO_GET_DEV_INFO;
48 return octeontx_mbox_send(&hdr, NULL, 0, info, len);
51 struct ssovf_mbox_getwork_wait {
56 ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
58 struct octeontx_mbox_hdr hdr = {0};
59 struct ssovf_mbox_getwork_wait tmo_set;
60 uint16_t len = sizeof(struct ssovf_mbox_getwork_wait);
63 hdr.coproc = SSO_COPROC;
64 hdr.msg = SSO_SET_GETWORK_WAIT;
67 tmo_set.wait_ns = timeout_ns;
68 ret = octeontx_mbox_send(&hdr, &tmo_set, len, NULL, 0);
70 ssovf_log_err("Failed to set getwork timeout(%d)", ret);
75 struct ssovf_mbox_grp_pri {
77 uint8_t wgt_left; /* Read only */
84 ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
86 struct octeontx_mbox_hdr hdr = {0};
87 struct ssovf_mbox_grp_pri grp;
88 uint16_t len = sizeof(struct ssovf_mbox_grp_pri);
91 hdr.coproc = SSO_COPROC;
92 hdr.msg = SSO_GRP_SET_PRIORITY;
98 grp.priority = prio / 32; /* Normalize to 0 to 7 */
100 ret = octeontx_mbox_send(&hdr, &grp, len, NULL, 0);
102 ssovf_log_err("Failed to set grp=%d prio=%d", queue, prio);
107 struct ssovf_mbox_convert_ns_getworks_iter {
109 uint32_t getwork_iter;/* Get_work iterations for the given wait_ns */
113 ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
115 struct octeontx_mbox_hdr hdr = {0};
116 struct ssovf_mbox_convert_ns_getworks_iter ns2iter;
117 uint16_t len = sizeof(ns2iter);
120 hdr.coproc = SSO_COPROC;
121 hdr.msg = SSO_CONVERT_NS_GETWORK_ITER;
124 memset(&ns2iter, 0, len);
125 ns2iter.wait_ns = ns;
126 ret = octeontx_mbox_send(&hdr, &ns2iter, len, &ns2iter, len);
127 if (ret < 0 || (ret != len)) {
128 ssovf_log_err("Failed to get tmo ticks ns=%"PRId64"", ns);
132 *tmo_ticks = ns2iter.getwork_iter;
137 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
139 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
141 dev_info->driver_name = RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD);
142 dev_info->min_dequeue_timeout_ns = edev->min_deq_timeout_ns;
143 dev_info->max_dequeue_timeout_ns = edev->max_deq_timeout_ns;
144 dev_info->max_event_queues = edev->max_event_queues;
145 dev_info->max_event_queue_flows = (1ULL << 20);
146 dev_info->max_event_queue_priority_levels = 8;
147 dev_info->max_event_priority_levels = 1;
148 dev_info->max_event_ports = edev->max_event_ports;
149 dev_info->max_event_port_dequeue_depth = 1;
150 dev_info->max_event_port_enqueue_depth = 1;
151 dev_info->max_num_events = edev->max_num_events;
152 dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
153 RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
154 RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES|
155 RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
156 RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
157 RTE_EVENT_DEV_CAP_NONSEQ_MODE |
158 RTE_EVENT_DEV_CAP_CARRY_FLOW_ID |
159 RTE_EVENT_DEV_CAP_MAINTENANCE_FREE;
164 ssovf_configure(const struct rte_eventdev *dev)
166 struct rte_event_dev_config *conf = &dev->data->dev_conf;
167 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
171 deq_tmo_ns = conf->dequeue_timeout_ns;
173 deq_tmo_ns = edev->min_deq_timeout_ns;
175 if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {
176 edev->is_timeout_deq = 1;
177 deq_tmo_ns = edev->min_deq_timeout_ns;
179 edev->nb_event_queues = conf->nb_event_queues;
180 edev->nb_event_ports = conf->nb_event_ports;
182 return ssovf_mbox_getwork_tmo_set(deq_tmo_ns);
186 ssovf_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
187 struct rte_event_queue_conf *queue_conf)
190 RTE_SET_USED(queue_id);
192 queue_conf->nb_atomic_flows = (1ULL << 20);
193 queue_conf->nb_atomic_order_sequences = (1ULL << 20);
194 queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;
195 queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
199 ssovf_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
202 RTE_SET_USED(queue_id);
206 ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
207 const struct rte_event_queue_conf *queue_conf)
210 ssovf_func_trace("queue=%d prio=%d", queue_id, queue_conf->priority);
212 return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
216 ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
217 struct rte_event_port_conf *port_conf)
219 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
221 RTE_SET_USED(port_id);
222 port_conf->new_event_threshold = edev->max_num_events;
223 port_conf->dequeue_depth = 1;
224 port_conf->enqueue_depth = 1;
225 port_conf->event_port_cfg = 0;
229 ssovf_port_release(void *port)
235 ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
236 const struct rte_event_port_conf *port_conf)
241 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
243 ssovf_func_trace("port=%d", port_id);
244 RTE_SET_USED(port_conf);
246 /* Free memory prior to re-allocation if needed */
247 if (dev->data->ports[port_id] != NULL) {
248 ssovf_port_release(dev->data->ports[port_id]);
249 dev->data->ports[port_id] = NULL;
252 /* Allocate event port memory */
253 ws = rte_zmalloc_socket("eventdev ssows",
254 sizeof(struct ssows), RTE_CACHE_LINE_SIZE,
255 dev->data->socket_id);
257 ssovf_log_err("Failed to alloc memory for port=%d", port_id);
261 ws->base = ssovf_bar(OCTEONTX_SSO_HWS, port_id, 0);
262 if (ws->base == NULL) {
264 ssovf_log_err("Failed to get hws base addr port=%d", port_id);
268 reg_off = SSOW_VHWS_OP_GET_WORK0;
269 reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */
270 reg_off |= 1 << 16; /* Wait */
271 ws->getwork = ws->base + reg_off;
273 ws->lookup_mem = octeontx_fastpath_lookup_mem_get();
275 for (q = 0; q < edev->nb_event_queues; q++) {
276 ws->grps[q] = ssovf_bar(OCTEONTX_SSO_GROUP, q, 2);
277 if (ws->grps[q] == NULL) {
279 ssovf_log_err("Failed to get grp%d base addr", q);
284 dev->data->ports[port_id] = ws;
285 ssovf_log_dbg("port=%d ws=%p", port_id, ws);
290 ssovf_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
291 const uint8_t priorities[], uint16_t nb_links)
295 struct ssows *ws = port;
297 ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_links);
299 RTE_SET_USED(priorities);
301 for (link = 0; link < nb_links; link++) {
303 val |= (1ULL << 24); /* Set membership */
304 ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
306 return (int)nb_links;
310 ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
315 struct ssows *ws = port;
317 ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_unlinks);
320 for (unlink = 0; unlink < nb_unlinks; unlink++) {
321 val = queues[unlink];
322 val &= ~(1ULL << 24); /* Clear membership */
323 ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
325 return (int)nb_unlinks;
329 ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
333 return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
337 ssows_dump(struct ssows *ws, FILE *f)
339 uint8_t *base = ws->base;
342 fprintf(f, "\t---------------port%d---------------\n", ws->port);
343 val = ssovf_read64(base + SSOW_VHWS_TAG);
344 fprintf(f, "\ttag=0x%x tt=%d head=%d tail=%d grp=%d index=%d tail=%d\n",
345 (uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
346 (int)(val >> 34) & 0x1, (int)(val >> 35) & 0x1,
347 (int)(val >> 36) & 0x3ff, (int)(val >> 48) & 0x3ff,
348 (int)(val >> 63) & 0x1);
350 val = ssovf_read64(base + SSOW_VHWS_WQP);
351 fprintf(f, "\twqp=0x%"PRIx64"\n", val);
353 val = ssovf_read64(base + SSOW_VHWS_LINKS);
354 fprintf(f, "\tindex=%d valid=%d revlink=%d tail=%d head=%d grp=%d\n",
355 (int)(val & 0x3ff), (int)(val >> 10) & 0x1,
356 (int)(val >> 11) & 0x3ff, (int)(val >> 26) & 0x1,
357 (int)(val >> 27) & 0x1, (int)(val >> 28) & 0x3ff);
359 val = ssovf_read64(base + SSOW_VHWS_PENDTAG);
360 fprintf(f, "\tptag=0x%x ptt=%d pgwi=%d pdesc=%d pgw=%d pgww=%d ps=%d\n",
361 (uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
362 (int)(val >> 56) & 0x1, (int)(val >> 58) & 0x1,
363 (int)(val >> 61) & 0x1, (int)(val >> 62) & 0x1,
364 (int)(val >> 63) & 0x1);
366 val = ssovf_read64(base + SSOW_VHWS_PENDWQP);
367 fprintf(f, "\tpwqp=0x%"PRIx64"\n", val);
371 ssovf_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
372 const struct rte_eth_dev *eth_dev, uint32_t *caps)
377 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
379 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
381 *caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT;
387 ssovf_eth_rx_adapter_queue_add(const struct rte_eventdev *dev,
388 const struct rte_eth_dev *eth_dev, int32_t rx_queue_id,
389 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
391 const struct octeontx_nic *nic = eth_dev->data->dev_private;
392 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
393 uint16_t free_idx = UINT16_MAX;
394 struct octeontx_rxq *rxq;
395 pki_mod_qos_t pki_qos;
396 uint8_t found = false;
400 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
404 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
407 /* eth_octeontx only supports one rq. */
408 rx_queue_id = rx_queue_id == -1 ? 0 : rx_queue_id;
409 rxq = eth_dev->data->rx_queues[rx_queue_id];
410 /* Add rxq pool to list of used pools and reduce available events. */
411 for (i = 0; i < edev->rxq_pools; i++) {
412 if (edev->rxq_pool_array[i] == (uintptr_t)rxq->pool) {
413 edev->rxq_pool_rcnt[i]++;
416 } else if (free_idx == UINT16_MAX &&
417 edev->rxq_pool_array[i] == 0) {
425 if (edev->available_events < rxq->pool->size) {
427 "Max available events %"PRIu32" requested events in rxq pool %"PRIu32"",
428 edev->available_events, rxq->pool->size);
432 if (free_idx != UINT16_MAX) {
435 old_ptr = edev->rxq_pool_array;
437 edev->rxq_pool_array = rte_realloc(
438 edev->rxq_pool_array,
439 sizeof(uint64_t) * edev->rxq_pools, 0);
440 if (edev->rxq_pool_array == NULL) {
442 edev->rxq_pool_array = old_ptr;
446 old_ptr = edev->rxq_pool_rcnt;
447 edev->rxq_pool_rcnt = rte_realloc(
449 sizeof(uint8_t) * edev->rxq_pools, 0);
450 if (edev->rxq_pool_rcnt == NULL) {
452 edev->rxq_pool_rcnt = old_ptr;
455 idx = edev->rxq_pools - 1;
458 edev->rxq_pool_array[idx] = (uintptr_t)rxq->pool;
459 edev->rxq_pool_rcnt[idx] = 1;
460 edev->available_events -= rxq->pool->size;
463 memset(&pki_qos, 0, sizeof(pki_mod_qos_t));
465 pki_qos.port_type = 0;
467 pki_qos.mmask.f_tag_type = 1;
468 pki_qos.mmask.f_port_add = 1;
469 pki_qos.mmask.f_grp_ok = 1;
470 pki_qos.mmask.f_grp_bad = 1;
471 pki_qos.mmask.f_grptag_ok = 1;
472 pki_qos.mmask.f_grptag_bad = 1;
474 pki_qos.qos_entry.tag_type = queue_conf->ev.sched_type;
475 pki_qos.qos_entry.port_add = 0;
476 pki_qos.qos_entry.ggrp_ok = queue_conf->ev.queue_id;
477 pki_qos.qos_entry.ggrp_bad = queue_conf->ev.queue_id;
478 pki_qos.qos_entry.grptag_bad = 0;
479 pki_qos.qos_entry.grptag_ok = 0;
481 ret = octeontx_pki_port_modify_qos(nic->port_id, &pki_qos);
483 ssovf_log_err("failed to modify QOS, port=%d, q=%d",
484 nic->port_id, queue_conf->ev.queue_id);
486 edev->rx_offload_flags = nic->rx_offload_flags;
487 edev->tx_offload_flags = nic->tx_offload_flags;
492 ssovf_eth_rx_adapter_queue_del(const struct rte_eventdev *dev,
493 const struct rte_eth_dev *eth_dev, int32_t rx_queue_id)
495 const struct octeontx_nic *nic = eth_dev->data->dev_private;
496 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
497 struct octeontx_rxq *rxq;
498 pki_del_qos_t pki_qos;
499 uint8_t found = false;
502 rx_queue_id = rx_queue_id == -1 ? 0 : rx_queue_id;
503 rxq = eth_dev->data->rx_queues[rx_queue_id];
504 for (i = 0; i < edev->rxq_pools; i++) {
505 if (edev->rxq_pool_array[i] == (uintptr_t)rxq->pool) {
512 edev->rxq_pool_rcnt[i]--;
513 if (edev->rxq_pool_rcnt[i] == 0)
514 edev->rxq_pool_array[i] = 0;
515 edev->available_events += rxq->pool->size;
518 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
522 pki_qos.port_type = 0;
524 memset(&pki_qos, 0, sizeof(pki_del_qos_t));
525 ret = octeontx_pki_port_delete_qos(nic->port_id, &pki_qos);
527 ssovf_log_err("Failed to delete QOS port=%d, q=%d",
528 nic->port_id, rx_queue_id);
533 ssovf_eth_rx_adapter_start(const struct rte_eventdev *dev,
534 const struct rte_eth_dev *eth_dev)
537 RTE_SET_USED(eth_dev);
544 ssovf_eth_rx_adapter_stop(const struct rte_eventdev *dev,
545 const struct rte_eth_dev *eth_dev)
548 RTE_SET_USED(eth_dev);
554 ssovf_eth_tx_adapter_caps_get(const struct rte_eventdev *dev,
555 const struct rte_eth_dev *eth_dev, uint32_t *caps)
560 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
564 *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT;
570 ssovf_eth_tx_adapter_create(uint8_t id, const struct rte_eventdev *dev)
578 ssovf_eth_tx_adapter_free(uint8_t id, const struct rte_eventdev *dev)
586 ssovf_eth_tx_adapter_queue_add(uint8_t id, const struct rte_eventdev *dev,
587 const struct rte_eth_dev *eth_dev, int32_t tx_queue_id)
591 RTE_SET_USED(eth_dev);
592 RTE_SET_USED(tx_queue_id);
597 ssovf_eth_tx_adapter_queue_del(uint8_t id, const struct rte_eventdev *dev,
598 const struct rte_eth_dev *eth_dev, int32_t tx_queue_id)
602 RTE_SET_USED(eth_dev);
603 RTE_SET_USED(tx_queue_id);
608 ssovf_eth_tx_adapter_start(uint8_t id, const struct rte_eventdev *dev)
616 ssovf_eth_tx_adapter_stop(uint8_t id, const struct rte_eventdev *dev)
625 ssovf_dump(struct rte_eventdev *dev, FILE *f)
627 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
630 /* Dump SSOWVF debug registers */
631 for (port = 0; port < edev->nb_event_ports; port++)
632 ssows_dump(dev->data->ports[port], f);
636 ssovf_start(struct rte_eventdev *dev)
638 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
644 for (i = 0; i < edev->nb_event_ports; i++) {
645 ws = dev->data->ports[i];
650 for (i = 0; i < edev->nb_event_queues; i++) {
651 /* Consume all the events through HWS0 */
652 ssows_flush_events(dev->data->ports[0], i, NULL, NULL);
654 base = ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
655 base += SSO_VHGRP_QCTL;
656 ssovf_write64(1, base); /* Enable SSO group */
659 ssovf_fastpath_fns_set(dev);
664 ssows_handle_event(void *arg, struct rte_event event)
666 struct rte_eventdev *dev = arg;
668 if (dev->dev_ops->dev_stop_flush != NULL)
669 dev->dev_ops->dev_stop_flush(dev->data->dev_id, event,
670 dev->data->dev_stop_flush_arg);
674 ssovf_stop(struct rte_eventdev *dev)
676 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
682 for (i = 0; i < edev->nb_event_ports; i++) {
683 ws = dev->data->ports[i];
688 for (i = 0; i < edev->nb_event_queues; i++) {
689 /* Consume all the events through HWS0 */
690 ssows_flush_events(dev->data->ports[0], i,
691 ssows_handle_event, dev);
693 base = ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
694 base += SSO_VHGRP_QCTL;
695 ssovf_write64(0, base); /* Disable SSO group */
700 ssovf_close(struct rte_eventdev *dev)
702 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
703 uint8_t all_queues[RTE_EVENT_MAX_QUEUES_PER_DEV];
706 for (i = 0; i < edev->nb_event_queues; i++)
709 for (i = 0; i < edev->nb_event_ports; i++)
710 ssovf_port_unlink(dev, dev->data->ports[i], all_queues,
711 edev->nb_event_queues);
716 ssovf_parsekv(const char *key __rte_unused, const char *value, void *opaque)
719 *flag = !!atoi(value);
724 ssovf_timvf_caps_get(const struct rte_eventdev *dev, uint64_t flags,
725 uint32_t *caps, const struct event_timer_adapter_ops **ops)
727 return timvf_timer_adapter_caps_get(dev, flags, caps, ops,
732 ssovf_crypto_adapter_caps_get(const struct rte_eventdev *dev,
733 const struct rte_cryptodev *cdev, uint32_t *caps)
738 *caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD |
739 RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA;
745 ssovf_crypto_adapter_qp_add(const struct rte_eventdev *dev,
746 const struct rte_cryptodev *cdev,
747 int32_t queue_pair_id,
748 const struct rte_event *event)
750 struct cpt_instance *qp;
755 if (queue_pair_id == -1) {
756 for (qp_id = 0; qp_id < cdev->data->nb_queue_pairs; qp_id++) {
757 qp = cdev->data->queue_pairs[qp_id];
761 qp = cdev->data->queue_pairs[queue_pair_id];
765 ssovf_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev);
771 ssovf_crypto_adapter_qp_del(const struct rte_eventdev *dev,
772 const struct rte_cryptodev *cdev,
773 int32_t queue_pair_id)
775 struct cpt_instance *qp;
780 if (queue_pair_id == -1) {
781 for (qp_id = 0; qp_id < cdev->data->nb_queue_pairs; qp_id++) {
782 qp = cdev->data->queue_pairs[qp_id];
786 qp = cdev->data->queue_pairs[queue_pair_id];
793 /* Initialize and register event driver with DPDK Application */
794 static struct eventdev_ops ssovf_ops = {
795 .dev_infos_get = ssovf_info_get,
796 .dev_configure = ssovf_configure,
797 .queue_def_conf = ssovf_queue_def_conf,
798 .queue_setup = ssovf_queue_setup,
799 .queue_release = ssovf_queue_release,
800 .port_def_conf = ssovf_port_def_conf,
801 .port_setup = ssovf_port_setup,
802 .port_release = ssovf_port_release,
803 .port_link = ssovf_port_link,
804 .port_unlink = ssovf_port_unlink,
805 .timeout_ticks = ssovf_timeout_ticks,
807 .eth_rx_adapter_caps_get = ssovf_eth_rx_adapter_caps_get,
808 .eth_rx_adapter_queue_add = ssovf_eth_rx_adapter_queue_add,
809 .eth_rx_adapter_queue_del = ssovf_eth_rx_adapter_queue_del,
810 .eth_rx_adapter_start = ssovf_eth_rx_adapter_start,
811 .eth_rx_adapter_stop = ssovf_eth_rx_adapter_stop,
813 .eth_tx_adapter_caps_get = ssovf_eth_tx_adapter_caps_get,
814 .eth_tx_adapter_create = ssovf_eth_tx_adapter_create,
815 .eth_tx_adapter_free = ssovf_eth_tx_adapter_free,
816 .eth_tx_adapter_queue_add = ssovf_eth_tx_adapter_queue_add,
817 .eth_tx_adapter_queue_del = ssovf_eth_tx_adapter_queue_del,
818 .eth_tx_adapter_start = ssovf_eth_tx_adapter_start,
819 .eth_tx_adapter_stop = ssovf_eth_tx_adapter_stop,
821 .timer_adapter_caps_get = ssovf_timvf_caps_get,
823 .crypto_adapter_caps_get = ssovf_crypto_adapter_caps_get,
824 .crypto_adapter_queue_pair_add = ssovf_crypto_adapter_qp_add,
825 .crypto_adapter_queue_pair_del = ssovf_crypto_adapter_qp_del,
827 .dev_selftest = test_eventdev_octeontx,
830 .dev_start = ssovf_start,
831 .dev_stop = ssovf_stop,
832 .dev_close = ssovf_close
836 ssovf_vdev_probe(struct rte_vdev_device *vdev)
838 struct ssovf_info oinfo;
839 struct ssovf_mbox_dev_info info;
840 struct ssovf_evdev *edev;
841 struct rte_eventdev *eventdev;
842 static int ssovf_init_once;
847 static const char *const args[] = {
848 TIMVF_ENABLE_STATS_ARG,
852 name = rte_vdev_device_name(vdev);
853 /* More than one instance is not supported */
854 if (ssovf_init_once) {
855 ssovf_log_err("Request to create >1 %s instance", name);
859 params = rte_vdev_device_args(vdev);
860 if (params != NULL && params[0] != '\0') {
861 struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
865 "Ignoring unsupported params supplied '%s'",
868 ret = rte_kvargs_process(kvlist, TIMVF_ENABLE_STATS_ARG,
870 &timvf_enable_stats);
872 ssovf_log_err("%s: Error in timvf stats", name);
873 rte_kvargs_free(kvlist);
878 rte_kvargs_free(kvlist);
881 eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
883 if (eventdev == NULL) {
884 ssovf_log_err("Failed to create eventdev vdev %s", name);
887 eventdev->dev_ops = &ssovf_ops;
889 timvf_set_eventdevice(eventdev);
891 /* For secondary processes, the primary has done all the work */
892 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
893 ssovf_fastpath_fns_set(eventdev);
897 octeontx_mbox_init();
898 ret = ssovf_info(&oinfo);
900 ssovf_log_err("Failed to probe and validate ssovfs %d", ret);
904 edev = ssovf_pmd_priv(eventdev);
905 edev->max_event_ports = oinfo.total_ssowvfs;
906 edev->max_event_queues = oinfo.total_ssovfs;
907 edev->is_timeout_deq = 0;
909 ret = ssovf_mbox_dev_info(&info);
910 if (ret < 0 || ret != sizeof(struct ssovf_mbox_dev_info)) {
911 ssovf_log_err("Failed to get mbox devinfo %d", ret);
915 edev->min_deq_timeout_ns = info.min_deq_timeout_ns;
916 edev->max_deq_timeout_ns = info.max_deq_timeout_ns;
917 edev->max_num_events = info.max_num_events;
918 edev->available_events = info.max_num_events;
920 ssovf_log_dbg("min_deq_tmo=%" PRId64 " max_deq_tmo=%" PRId64
922 info.min_deq_timeout_ns, info.max_deq_timeout_ns,
923 info.max_num_events);
925 if (!edev->max_event_ports || !edev->max_event_queues) {
926 ssovf_log_err("Not enough eventdev resource queues=%d ports=%d",
927 edev->max_event_queues, edev->max_event_ports);
932 ssovf_log_info("Initializing %s domain=%d max_queues=%d max_ports=%d",
933 name, oinfo.domain, edev->max_event_queues,
934 edev->max_event_ports);
937 event_dev_probing_finish(eventdev);
941 rte_event_pmd_vdev_uninit(name);
946 ssovf_vdev_remove(struct rte_vdev_device *vdev)
950 name = rte_vdev_device_name(vdev);
951 ssovf_log_info("Closing %s", name);
952 return rte_event_pmd_vdev_uninit(name);
955 static struct rte_vdev_driver vdev_ssovf_pmd = {
956 .probe = ssovf_vdev_probe,
957 .remove = ssovf_vdev_remove
960 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_OCTEONTX_PMD, vdev_ssovf_pmd);