1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #ifndef __OTX2_WORKER_H__
6 #define __OTX2_WORKER_H__
8 #include <rte_common.h>
9 #include <rte_branch_prediction.h>
11 #include <otx2_common.h>
12 #include "otx2_evdev.h"
13 #include "otx2_evdev_crypto_adptr_dp.h"
14 #include "otx2_ethdev_sec_tx.h"
18 static __rte_always_inline uint16_t
19 otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
20 const uint32_t flags, const void * const lookup_mem)
22 union otx2_sso_event event;
27 otx2_write64(BIT_ULL(16) | /* wait for work. */
28 1, /* Use Mask set 0. */
31 if (flags & NIX_RX_OFFLOAD_PTYPE_F)
32 rte_prefetch_non_temporal(lookup_mem);
35 " ldr %[tag], [%[tag_loc]] \n"
36 " ldr %[wqp], [%[wqp_loc]] \n"
37 " tbz %[tag], 63, done%= \n"
40 " ldr %[tag], [%[tag_loc]] \n"
41 " ldr %[wqp], [%[wqp_loc]] \n"
42 " tbnz %[tag], 63, rty%= \n"
44 " prfm pldl1keep, [%[wqp], #8] \n"
45 " sub %[mbuf], %[wqp], #0x80 \n"
46 " prfm pldl1keep, [%[mbuf]] \n"
47 : [tag] "=&r" (event.get_work0),
48 [wqp] "=&r" (get_work1),
50 : [tag_loc] "r" (ws->tag_op),
51 [wqp_loc] "r" (ws->wqp_op)
54 event.get_work0 = otx2_read64(ws->tag_op);
55 while ((BIT_ULL(63)) & event.get_work0)
56 event.get_work0 = otx2_read64(ws->tag_op);
58 get_work1 = otx2_read64(ws->wqp_op);
59 rte_prefetch0((const void *)get_work1);
60 mbuf = (uint64_t)((char *)get_work1 - sizeof(struct rte_mbuf));
61 rte_prefetch0((const void *)mbuf);
64 event.get_work0 = (event.get_work0 & (0x3ull << 32)) << 6 |
65 (event.get_work0 & (0x3FFull << 36)) << 4 |
66 (event.get_work0 & 0xffffffff);
67 ws->cur_tt = event.sched_type;
68 ws->cur_grp = event.queue_id;
70 if (event.sched_type != SSO_TT_EMPTY) {
71 if ((flags & NIX_RX_OFFLOAD_SECURITY_F) &&
72 (event.event_type == RTE_EVENT_TYPE_CRYPTODEV)) {
73 get_work1 = otx2_handle_crypto_event(get_work1);
74 } else if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
75 otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
76 (uint32_t) event.get_work0, flags,
78 /* Extracting tstamp, if PTP enabled*/
79 tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)
82 otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf,
84 (uint64_t *)tstamp_ptr);
89 ev->event = event.get_work0;
95 /* Used in cleaning up workslot. */
96 static __rte_always_inline uint16_t
97 otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev,
100 union otx2_sso_event event;
105 #ifdef RTE_ARCH_ARM64
107 " ldr %[tag], [%[tag_loc]] \n"
108 " ldr %[wqp], [%[wqp_loc]] \n"
109 " tbz %[tag], 63, done%= \n"
112 " ldr %[tag], [%[tag_loc]] \n"
113 " ldr %[wqp], [%[wqp_loc]] \n"
114 " tbnz %[tag], 63, rty%= \n"
116 " prfm pldl1keep, [%[wqp], #8] \n"
117 " sub %[mbuf], %[wqp], #0x80 \n"
118 " prfm pldl1keep, [%[mbuf]] \n"
119 : [tag] "=&r" (event.get_work0),
120 [wqp] "=&r" (get_work1),
122 : [tag_loc] "r" (ws->tag_op),
123 [wqp_loc] "r" (ws->wqp_op)
126 event.get_work0 = otx2_read64(ws->tag_op);
127 while ((BIT_ULL(63)) & event.get_work0)
128 event.get_work0 = otx2_read64(ws->tag_op);
130 get_work1 = otx2_read64(ws->wqp_op);
131 rte_prefetch_non_temporal((const void *)get_work1);
132 mbuf = (uint64_t)((char *)get_work1 - sizeof(struct rte_mbuf));
133 rte_prefetch_non_temporal((const void *)mbuf);
136 event.get_work0 = (event.get_work0 & (0x3ull << 32)) << 6 |
137 (event.get_work0 & (0x3FFull << 36)) << 4 |
138 (event.get_work0 & 0xffffffff);
139 ws->cur_tt = event.sched_type;
140 ws->cur_grp = event.queue_id;
142 if (event.sched_type != SSO_TT_EMPTY &&
143 event.event_type == RTE_EVENT_TYPE_ETHDEV) {
144 otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
145 (uint32_t) event.get_work0, flags, NULL);
146 /* Extracting tstamp, if PTP enabled*/
147 tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)get_work1)
148 + OTX2_SSO_WQE_SG_PTR);
149 otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
150 flags, (uint64_t *)tstamp_ptr);
154 ev->event = event.get_work0;
160 static __rte_always_inline void
161 otx2_ssogws_add_work(struct otx2_ssogws *ws, const uint64_t event_ptr,
162 const uint32_t tag, const uint8_t new_tt,
167 add_work0 = tag | ((uint64_t)(new_tt) << 32);
168 otx2_store_pair(add_work0, event_ptr, ws->grps_base[grp]);
171 static __rte_always_inline void
172 otx2_ssogws_swtag_desched(struct otx2_ssogws *ws, uint32_t tag, uint8_t new_tt,
177 val = tag | ((uint64_t)(new_tt & 0x3) << 32) | ((uint64_t)grp << 34);
178 otx2_write64(val, ws->swtag_desched_op);
181 static __rte_always_inline void
182 otx2_ssogws_swtag_norm(struct otx2_ssogws *ws, uint32_t tag, uint8_t new_tt)
186 val = tag | ((uint64_t)(new_tt & 0x3) << 32);
187 otx2_write64(val, ws->swtag_norm_op);
190 static __rte_always_inline void
191 otx2_ssogws_swtag_untag(struct otx2_ssogws *ws)
193 otx2_write64(0, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +
194 SSOW_LF_GWS_OP_SWTAG_UNTAG);
195 ws->cur_tt = SSO_SYNC_UNTAGGED;
198 static __rte_always_inline void
199 otx2_ssogws_swtag_flush(struct otx2_ssogws *ws)
201 otx2_write64(0, ws->swtag_flush_op);
202 ws->cur_tt = SSO_SYNC_EMPTY;
205 static __rte_always_inline void
206 otx2_ssogws_desched(struct otx2_ssogws *ws)
208 otx2_write64(0, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +
209 SSOW_LF_GWS_OP_DESCHED);
212 static __rte_always_inline void
213 otx2_ssogws_swtag_wait(struct otx2_ssogws *ws)
215 #ifdef RTE_ARCH_ARM64
218 asm volatile(" ldr %[swtb], [%[swtp_loc]] \n"
219 " tbz %[swtb], 62, done%= \n"
222 " ldr %[swtb], [%[swtp_loc]] \n"
223 " tbnz %[swtb], 62, rty%= \n"
225 : [swtb] "=&r" (swtp)
226 : [swtp_loc] "r" (ws->tag_op));
228 /* Wait for the SWTAG/SWTAG_FULL operation */
229 while (otx2_read64(ws->tag_op) & BIT_ULL(62))
234 static __rte_always_inline void
235 otx2_ssogws_head_wait(struct otx2_ssogws *ws)
237 #ifdef RTE_ARCH_ARM64
241 " ldr %[tag], [%[tag_op]] \n"
242 " tbnz %[tag], 35, done%= \n"
245 " ldr %[tag], [%[tag_op]] \n"
246 " tbz %[tag], 35, rty%= \n"
249 : [tag_op] "r" (ws->tag_op)
252 /* Wait for the HEAD to be set */
253 while (!(otx2_read64(ws->tag_op) & BIT_ULL(35)))
258 static __rte_always_inline const struct otx2_eth_txq *
259 otx2_ssogws_xtract_meta(struct rte_mbuf *m,
260 const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT])
262 return (const struct otx2_eth_txq *)txq_data[m->port][
263 rte_event_eth_tx_adapter_txq_get(m)];
266 static __rte_always_inline void
267 otx2_ssogws_prepare_pkt(const struct otx2_eth_txq *txq, struct rte_mbuf *m,
268 uint64_t *cmd, const uint32_t flags)
270 otx2_lmt_mov(cmd, txq->cmd, otx2_nix_tx_ext_subs(flags));
271 otx2_nix_xmit_prepare(m, cmd, flags);
274 static __rte_always_inline uint16_t
275 otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[],
276 uint64_t *cmd, const uint64_t
277 txq_data[][RTE_MAX_QUEUES_PER_PORT],
278 const uint32_t flags)
280 struct rte_mbuf *m = ev[0].mbuf;
281 const struct otx2_eth_txq *txq;
283 if ((flags & NIX_TX_OFFLOAD_SECURITY_F) &&
284 (m->ol_flags & PKT_TX_SEC_OFFLOAD)) {
285 txq = otx2_ssogws_xtract_meta(m, txq_data);
286 return otx2_sec_event_tx(ws, ev, m, txq, flags);
289 /* Perform header writes before barrier for TSO */
290 otx2_nix_xmit_prepare_tso(m, flags);
291 /* Lets commit any changes in the packet here in case of single seg as
292 * no further changes to mbuf will be done.
293 * While for multi seg all mbufs used are set to NULL in
294 * otx2_nix_prepare_mseg() after preparing the sg list and these changes
295 * should be committed before LMTST.
296 * Also in no fast free case some mbuf fields are updated in
297 * otx2_nix_prefree_seg
298 * Hence otx2_nix_xmit_submit_lmt_release/otx2_nix_xmit_mseg_one_release
299 * has store barrier for multiseg.
301 if (!(flags & NIX_TX_MULTI_SEG_F) &&
302 !(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))
304 txq = otx2_ssogws_xtract_meta(m, txq_data);
305 otx2_ssogws_prepare_pkt(txq, m, cmd, flags);
307 if (flags & NIX_TX_MULTI_SEG_F) {
308 const uint16_t segdw = otx2_nix_prepare_mseg(m, cmd, flags);
309 otx2_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0],
310 m->ol_flags, segdw, flags);
311 if (!ev->sched_type) {
312 otx2_nix_xmit_mseg_prep_lmt(cmd, txq->lmt_addr, segdw);
313 otx2_ssogws_head_wait(ws);
314 if (otx2_nix_xmit_submit_lmt_release(txq->io_addr) == 0)
315 otx2_nix_xmit_mseg_one(cmd, txq->lmt_addr,
316 txq->io_addr, segdw);
318 otx2_nix_xmit_mseg_one_release(cmd, txq->lmt_addr,
319 txq->io_addr, segdw);
322 /* Passing no of segdw as 4: HDR + EXT + SG + SMEM */
323 otx2_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0],
324 m->ol_flags, 4, flags);
326 if (!ev->sched_type) {
327 otx2_nix_xmit_prep_lmt(cmd, txq->lmt_addr, flags);
328 otx2_ssogws_head_wait(ws);
329 if (otx2_nix_xmit_submit_lmt(txq->io_addr) == 0)
330 otx2_nix_xmit_one(cmd, txq->lmt_addr,
331 txq->io_addr, flags);
333 otx2_nix_xmit_one(cmd, txq->lmt_addr, txq->io_addr,
338 otx2_write64(0, ws->swtag_flush_op);