4 * Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <rte_memzone.h>
38 #include <rte_kvargs.h>
40 #include <rte_errno.h>
41 #include <rte_event_ring.h>
42 #include <rte_service_component.h>
47 #define EVENTDEV_NAME_SW_PMD event_sw
48 #define NUMA_NODE_ARG "numa_node"
49 #define SCHED_QUANTA_ARG "sched_quanta"
50 #define CREDIT_QUANTA_ARG "credit_quanta"
53 sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info);
56 sw_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
57 const uint8_t priorities[], uint16_t num)
59 struct sw_port *p = port;
60 struct sw_evdev *sw = sw_pmd_priv(dev);
63 RTE_SET_USED(priorities);
64 for (i = 0; i < num; i++) {
65 struct sw_qid *q = &sw->qids[queues[i]];
67 /* check for qid map overflow */
68 if (q->cq_num_mapped_cqs >= RTE_DIM(q->cq_map)) {
73 if (p->is_directed && p->num_qids_mapped > 0) {
78 if (q->type == SW_SCHED_TYPE_DIRECT) {
79 /* check directed qids only map to one port */
80 if (p->num_qids_mapped > 0) {
84 /* check port only takes a directed flow */
91 p->num_qids_mapped = 1;
92 } else if (q->type == RTE_SCHED_TYPE_ORDERED) {
93 p->num_ordered_qids++;
95 } else if (q->type == RTE_SCHED_TYPE_ATOMIC ||
96 q->type == RTE_SCHED_TYPE_PARALLEL) {
100 q->cq_map[q->cq_num_mapped_cqs] = p->id;
102 q->cq_num_mapped_cqs++;
108 sw_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
111 struct sw_port *p = port;
112 struct sw_evdev *sw = sw_pmd_priv(dev);
116 for (i = 0; i < nb_unlinks; i++) {
117 struct sw_qid *q = &sw->qids[queues[i]];
118 for (j = 0; j < q->cq_num_mapped_cqs; j++) {
119 if (q->cq_map[j] == p->id) {
121 q->cq_map[q->cq_num_mapped_cqs - 1];
123 q->cq_num_mapped_cqs--;
126 p->num_qids_mapped--;
128 if (q->type == RTE_SCHED_TYPE_ORDERED)
129 p->num_ordered_qids--;
139 sw_port_setup(struct rte_eventdev *dev, uint8_t port_id,
140 const struct rte_event_port_conf *conf)
142 struct sw_evdev *sw = sw_pmd_priv(dev);
143 struct sw_port *p = &sw->ports[port_id];
144 char buf[RTE_RING_NAMESIZE];
147 struct rte_event_dev_info info;
148 sw_info_get(dev, &info);
150 /* detect re-configuring and return credits to instance if needed */
151 if (p->initialized) {
152 /* taking credits from pool is done one quanta at a time, and
153 * credits may be spend (counted in p->inflights) or still
154 * available in the port (p->inflight_credits). We must return
155 * the sum to no leak credits
157 int possible_inflights = p->inflight_credits + p->inflights;
158 rte_atomic32_sub(&sw->inflights, possible_inflights);
161 *p = (struct sw_port){0}; /* zero entire structure */
165 /* check to see if rings exists - port_setup() can be called multiple
166 * times legally (assuming device is stopped). If ring exists, free it
167 * to so it gets re-created with the correct size
169 snprintf(buf, sizeof(buf), "sw%d_p%u_%s", dev->data->dev_id,
170 port_id, "rx_worker_ring");
171 struct rte_event_ring *existing_ring = rte_event_ring_lookup(buf);
173 rte_event_ring_free(existing_ring);
175 p->rx_worker_ring = rte_event_ring_create(buf, MAX_SW_PROD_Q_DEPTH,
176 dev->data->socket_id,
177 RING_F_SP_ENQ | RING_F_SC_DEQ | RING_F_EXACT_SZ);
178 if (p->rx_worker_ring == NULL) {
179 SW_LOG_ERR("Error creating RX worker ring for port %d\n",
184 p->inflight_max = conf->new_event_threshold;
186 /* check if ring exists, same as rx_worker above */
187 snprintf(buf, sizeof(buf), "sw%d_p%u, %s", dev->data->dev_id,
188 port_id, "cq_worker_ring");
189 existing_ring = rte_event_ring_lookup(buf);
191 rte_event_ring_free(existing_ring);
193 p->cq_worker_ring = rte_event_ring_create(buf, conf->dequeue_depth,
194 dev->data->socket_id,
195 RING_F_SP_ENQ | RING_F_SC_DEQ | RING_F_EXACT_SZ);
196 if (p->cq_worker_ring == NULL) {
197 rte_event_ring_free(p->rx_worker_ring);
198 SW_LOG_ERR("Error creating CQ worker ring for port %d\n",
202 sw->cq_ring_space[port_id] = conf->dequeue_depth;
204 /* set hist list contents to empty */
205 for (i = 0; i < SW_PORT_HIST_LIST; i++) {
206 p->hist_list[i].fid = -1;
207 p->hist_list[i].qid = -1;
209 dev->data->ports[port_id] = p;
217 sw_port_release(void *port)
219 struct sw_port *p = (void *)port;
223 rte_event_ring_free(p->rx_worker_ring);
224 rte_event_ring_free(p->cq_worker_ring);
225 memset(p, 0, sizeof(*p));
229 qid_init(struct sw_evdev *sw, unsigned int idx, int type,
230 const struct rte_event_queue_conf *queue_conf)
233 int dev_id = sw->data->dev_id;
234 int socket_id = sw->data->socket_id;
235 char buf[IQ_RING_NAMESIZE];
236 struct sw_qid *qid = &sw->qids[idx];
238 for (i = 0; i < SW_IQS_MAX; i++) {
239 snprintf(buf, sizeof(buf), "q_%u_iq_%d", idx, i);
240 qid->iq[i] = iq_ring_create(buf, socket_id);
242 SW_LOG_DBG("ring create failed");
247 /* Initialize the FID structures to no pinning (-1), and zero packets */
248 const struct sw_fid_t fid = {.cq = -1, .pcount = 0};
249 for (i = 0; i < RTE_DIM(qid->fids); i++)
254 qid->priority = queue_conf->priority;
256 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
257 char ring_name[RTE_RING_NAMESIZE];
258 uint32_t window_size;
260 /* rte_ring and window_size_mask require require window_size to
263 window_size = rte_align32pow2(
264 queue_conf->nb_atomic_order_sequences);
266 qid->window_size = window_size - 1;
270 "invalid reorder_window_size for ordered queue\n"
275 snprintf(buf, sizeof(buf), "sw%d_iq_%d_rob", dev_id, i);
276 qid->reorder_buffer = rte_zmalloc_socket(buf,
277 window_size * sizeof(qid->reorder_buffer[0]),
279 if (!qid->reorder_buffer) {
280 SW_LOG_DBG("reorder_buffer malloc failed\n");
284 memset(&qid->reorder_buffer[0],
286 window_size * sizeof(qid->reorder_buffer[0]));
288 snprintf(ring_name, sizeof(ring_name), "sw%d_q%d_freelist",
291 /* lookup the ring, and if it already exists, free it */
292 struct rte_ring *cleanup = rte_ring_lookup(ring_name);
294 rte_ring_free(cleanup);
296 qid->reorder_buffer_freelist = rte_ring_create(ring_name,
299 RING_F_SP_ENQ | RING_F_SC_DEQ);
300 if (!qid->reorder_buffer_freelist) {
301 SW_LOG_DBG("freelist ring create failed");
305 /* Populate the freelist with reorder buffer entries. Enqueue
306 * 'window_size - 1' entries because the rte_ring holds only
309 for (i = 0; i < window_size - 1; i++) {
310 if (rte_ring_sp_enqueue(qid->reorder_buffer_freelist,
311 &qid->reorder_buffer[i]) < 0)
315 qid->reorder_buffer_index = 0;
319 qid->initialized = 1;
324 for (i = 0; i < SW_IQS_MAX; i++) {
326 iq_ring_destroy(qid->iq[i]);
329 if (qid->reorder_buffer) {
330 rte_free(qid->reorder_buffer);
331 qid->reorder_buffer = NULL;
334 if (qid->reorder_buffer_freelist) {
335 rte_ring_free(qid->reorder_buffer_freelist);
336 qid->reorder_buffer_freelist = NULL;
343 sw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
344 const struct rte_event_queue_conf *conf)
348 type = conf->schedule_type;
350 if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg) {
351 type = SW_SCHED_TYPE_DIRECT;
352 } else if (RTE_EVENT_QUEUE_CFG_ALL_TYPES
353 & conf->event_queue_cfg) {
354 SW_LOG_ERR("QUEUE_CFG_ALL_TYPES not supported\n");
358 struct sw_evdev *sw = sw_pmd_priv(dev);
359 return qid_init(sw, queue_id, type, conf);
363 sw_queue_release(struct rte_eventdev *dev, uint8_t id)
365 struct sw_evdev *sw = sw_pmd_priv(dev);
366 struct sw_qid *qid = &sw->qids[id];
369 for (i = 0; i < SW_IQS_MAX; i++)
370 iq_ring_destroy(qid->iq[i]);
372 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
373 rte_free(qid->reorder_buffer);
374 rte_ring_free(qid->reorder_buffer_freelist);
376 memset(qid, 0, sizeof(*qid));
380 sw_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
381 struct rte_event_queue_conf *conf)
384 RTE_SET_USED(queue_id);
386 static const struct rte_event_queue_conf default_conf = {
387 .nb_atomic_flows = 4096,
388 .nb_atomic_order_sequences = 1,
389 .schedule_type = RTE_SCHED_TYPE_ATOMIC,
390 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
393 *conf = default_conf;
397 sw_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
398 struct rte_event_port_conf *port_conf)
401 RTE_SET_USED(port_id);
403 port_conf->new_event_threshold = 1024;
404 port_conf->dequeue_depth = 16;
405 port_conf->enqueue_depth = 16;
409 sw_dev_configure(const struct rte_eventdev *dev)
411 struct sw_evdev *sw = sw_pmd_priv(dev);
412 const struct rte_eventdev_data *data = dev->data;
413 const struct rte_event_dev_config *conf = &data->dev_conf;
415 sw->qid_count = conf->nb_event_queues;
416 sw->port_count = conf->nb_event_ports;
417 sw->nb_events_limit = conf->nb_events_limit;
418 rte_atomic32_set(&sw->inflights, 0);
420 if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
429 sw_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
430 const struct rte_eth_dev *eth_dev,
434 RTE_SET_USED(eth_dev);
435 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
440 sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info)
444 static const struct rte_event_dev_info evdev_sw_info = {
445 .driver_name = SW_PMD_NAME,
446 .max_event_queues = RTE_EVENT_MAX_QUEUES_PER_DEV,
447 .max_event_queue_flows = SW_QID_NUM_FIDS,
448 .max_event_queue_priority_levels = SW_Q_PRIORITY_MAX,
449 .max_event_priority_levels = SW_IQS_MAX,
450 .max_event_ports = SW_PORTS_MAX,
451 .max_event_port_dequeue_depth = MAX_SW_CONS_Q_DEPTH,
452 .max_event_port_enqueue_depth = MAX_SW_PROD_Q_DEPTH,
453 .max_num_events = SW_INFLIGHT_EVENTS_TOTAL,
454 .event_dev_cap = (RTE_EVENT_DEV_CAP_QUEUE_QOS |
455 RTE_EVENT_DEV_CAP_BURST_MODE |
456 RTE_EVENT_DEV_CAP_EVENT_QOS),
459 *info = evdev_sw_info;
463 sw_dump(struct rte_eventdev *dev, FILE *f)
465 const struct sw_evdev *sw = sw_pmd_priv(dev);
467 static const char * const q_type_strings[] = {
468 "Ordered", "Atomic", "Parallel", "Directed"
471 fprintf(f, "EventDev %s: ports %d, qids %d\n", "todo-fix-name",
472 sw->port_count, sw->qid_count);
474 fprintf(f, "\trx %"PRIu64"\n\tdrop %"PRIu64"\n\ttx %"PRIu64"\n",
475 sw->stats.rx_pkts, sw->stats.rx_dropped, sw->stats.tx_pkts);
476 fprintf(f, "\tsched calls: %"PRIu64"\n", sw->sched_called);
477 fprintf(f, "\tsched cq/qid call: %"PRIu64"\n", sw->sched_cq_qid_called);
478 fprintf(f, "\tsched no IQ enq: %"PRIu64"\n", sw->sched_no_iq_enqueues);
479 fprintf(f, "\tsched no CQ enq: %"PRIu64"\n", sw->sched_no_cq_enqueues);
480 uint32_t inflights = rte_atomic32_read(&sw->inflights);
481 uint32_t credits = sw->nb_events_limit - inflights;
482 fprintf(f, "\tinflight %d, credits: %d\n", inflights, credits);
484 #define COL_RED "\x1b[31m"
485 #define COL_RESET "\x1b[0m"
487 for (i = 0; i < sw->port_count; i++) {
489 const struct sw_port *p = &sw->ports[i];
490 if (!p->initialized) {
491 fprintf(f, " %sPort %d not initialized.%s\n",
492 COL_RED, i, COL_RESET);
495 fprintf(f, " Port %d %s\n", i,
496 p->is_directed ? " (SingleCons)" : "");
497 fprintf(f, "\trx %"PRIu64"\tdrop %"PRIu64"\ttx %"PRIu64
498 "\t%sinflight %d%s\n", sw->ports[i].stats.rx_pkts,
499 sw->ports[i].stats.rx_dropped,
500 sw->ports[i].stats.tx_pkts,
501 (p->inflights == p->inflight_max) ?
503 sw->ports[i].inflights, COL_RESET);
505 fprintf(f, "\tMax New: %u"
506 "\tAvg cycles PP: %"PRIu64"\tCredits: %u\n",
507 sw->ports[i].inflight_max,
508 sw->ports[i].avg_pkt_ticks,
509 sw->ports[i].inflight_credits);
510 fprintf(f, "\tReceive burst distribution:\n");
511 float zp_percent = p->zero_polls * 100.0 / p->total_polls;
512 fprintf(f, zp_percent < 10 ? "\t\t0:%.02f%% " : "\t\t0:%.0f%% ",
514 for (max = (int)RTE_DIM(p->poll_buckets); max-- > 0;)
515 if (p->poll_buckets[max] != 0)
517 for (j = 0; j <= max; j++) {
518 if (p->poll_buckets[j] != 0) {
519 float poll_pc = p->poll_buckets[j] * 100.0 /
521 fprintf(f, "%u-%u:%.02f%% ",
522 ((j << SW_DEQ_STAT_BUCKET_SHIFT) + 1),
523 ((j+1) << SW_DEQ_STAT_BUCKET_SHIFT),
529 if (p->rx_worker_ring) {
530 uint64_t used = rte_event_ring_count(p->rx_worker_ring);
531 uint64_t space = rte_event_ring_free_count(
533 const char *col = (space == 0) ? COL_RED : COL_RESET;
534 fprintf(f, "\t%srx ring used: %4"PRIu64"\tfree: %4"
535 PRIu64 COL_RESET"\n", col, used, space);
537 fprintf(f, "\trx ring not initialized.\n");
539 if (p->cq_worker_ring) {
540 uint64_t used = rte_event_ring_count(p->cq_worker_ring);
541 uint64_t space = rte_event_ring_free_count(
543 const char *col = (space == 0) ? COL_RED : COL_RESET;
544 fprintf(f, "\t%scq ring used: %4"PRIu64"\tfree: %4"
545 PRIu64 COL_RESET"\n", col, used, space);
547 fprintf(f, "\tcq ring not initialized.\n");
550 for (i = 0; i < sw->qid_count; i++) {
551 const struct sw_qid *qid = &sw->qids[i];
552 if (!qid->initialized) {
553 fprintf(f, " %sQueue %d not initialized.%s\n",
554 COL_RED, i, COL_RESET);
557 int affinities_per_port[SW_PORTS_MAX] = {0};
558 uint32_t inflights = 0;
560 fprintf(f, " Queue %d (%s)\n", i, q_type_strings[qid->type]);
561 fprintf(f, "\trx %"PRIu64"\tdrop %"PRIu64"\ttx %"PRIu64"\n",
562 qid->stats.rx_pkts, qid->stats.rx_dropped,
564 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
565 struct rte_ring *rob_buf_free =
566 qid->reorder_buffer_freelist;
568 fprintf(f, "\tReorder entries in use: %u\n",
569 rte_ring_free_count(rob_buf_free));
572 "\tReorder buffer not initialized\n");
576 for (flow = 0; flow < RTE_DIM(qid->fids); flow++)
577 if (qid->fids[flow].cq != -1) {
578 affinities_per_port[qid->fids[flow].cq]++;
579 inflights += qid->fids[flow].pcount;
583 fprintf(f, "\tPer Port Stats:\n");
584 for (port = 0; port < sw->port_count; port++) {
585 fprintf(f, "\t Port %d: Pkts: %"PRIu64, port,
587 fprintf(f, "\tFlows: %d\n", affinities_per_port[port]);
591 uint32_t iq_printed = 0;
592 for (iq = 0; iq < SW_IQS_MAX; iq++) {
594 fprintf(f, "\tiq %d is not initialized.\n", iq);
598 uint32_t used = iq_ring_count(qid->iq[iq]);
599 uint32_t free = iq_ring_free_count(qid->iq[iq]);
600 const char *col = (free == 0) ? COL_RED : COL_RESET;
602 fprintf(f, "\t%siq %d: Used %d\tFree %d"
603 COL_RESET"\n", col, iq, used, free);
608 fprintf(f, "\t-- iqs empty --\n");
613 sw_start(struct rte_eventdev *dev)
616 struct sw_evdev *sw = sw_pmd_priv(dev);
618 rte_service_component_runstate_set(sw->service_id, 1);
620 /* check a service core is mapped to this service */
621 if (!rte_service_runstate_get(sw->service_id)) {
622 SW_LOG_ERR("Warning: No Service core enabled on service %s\n",
627 /* check all ports are set up */
628 for (i = 0; i < sw->port_count; i++)
629 if (sw->ports[i].rx_worker_ring == NULL) {
630 SW_LOG_ERR("Port %d not configured\n", i);
634 /* check all queues are configured and mapped to ports*/
635 for (i = 0; i < sw->qid_count; i++)
636 if (sw->qids[i].iq[0] == NULL ||
637 sw->qids[i].cq_num_mapped_cqs == 0) {
638 SW_LOG_ERR("Queue %d not configured\n", i);
642 /* build up our prioritized array of qids */
643 /* We don't use qsort here, as if all/multiple entries have the same
644 * priority, the result is non-deterministic. From "man 3 qsort":
645 * "If two members compare as equal, their order in the sorted
646 * array is undefined."
649 for (j = 0; j <= RTE_EVENT_DEV_PRIORITY_LOWEST; j++) {
650 for (i = 0; i < sw->qid_count; i++) {
651 if (sw->qids[i].priority == j) {
652 sw->qids_prioritized[qidx] = &sw->qids[i];
658 if (sw_xstats_init(sw) < 0)
668 sw_stop(struct rte_eventdev *dev)
670 struct sw_evdev *sw = sw_pmd_priv(dev);
671 sw_xstats_uninit(sw);
677 sw_close(struct rte_eventdev *dev)
679 struct sw_evdev *sw = sw_pmd_priv(dev);
682 for (i = 0; i < sw->qid_count; i++)
683 sw_queue_release(dev, i);
686 for (i = 0; i < sw->port_count; i++)
687 sw_port_release(&sw->ports[i]);
690 memset(&sw->stats, 0, sizeof(sw->stats));
691 sw->sched_called = 0;
692 sw->sched_no_iq_enqueues = 0;
693 sw->sched_no_cq_enqueues = 0;
694 sw->sched_cq_qid_called = 0;
700 assign_numa_node(const char *key __rte_unused, const char *value, void *opaque)
702 int *socket_id = opaque;
703 *socket_id = atoi(value);
704 if (*socket_id >= RTE_MAX_NUMA_NODES)
710 set_sched_quanta(const char *key __rte_unused, const char *value, void *opaque)
712 int *quanta = opaque;
713 *quanta = atoi(value);
714 if (*quanta < 0 || *quanta >= 4096)
720 set_credit_quanta(const char *key __rte_unused, const char *value, void *opaque)
722 int *credit = opaque;
723 *credit = atoi(value);
724 if (*credit < 0 || *credit >= 128)
730 static int32_t sw_sched_service_func(void *args)
732 struct rte_eventdev *dev = args;
733 sw_event_schedule(dev);
738 sw_probe(struct rte_vdev_device *vdev)
740 static const struct rte_eventdev_ops evdev_sw_ops = {
741 .dev_configure = sw_dev_configure,
742 .dev_infos_get = sw_info_get,
743 .dev_close = sw_close,
744 .dev_start = sw_start,
748 .queue_def_conf = sw_queue_def_conf,
749 .queue_setup = sw_queue_setup,
750 .queue_release = sw_queue_release,
751 .port_def_conf = sw_port_def_conf,
752 .port_setup = sw_port_setup,
753 .port_release = sw_port_release,
754 .port_link = sw_port_link,
755 .port_unlink = sw_port_unlink,
757 .eth_rx_adapter_caps_get = sw_eth_rx_adapter_caps_get,
759 .xstats_get = sw_xstats_get,
760 .xstats_get_names = sw_xstats_get_names,
761 .xstats_get_by_name = sw_xstats_get_by_name,
762 .xstats_reset = sw_xstats_reset,
765 static const char *const args[] = {
773 struct rte_eventdev *dev;
775 int socket_id = rte_socket_id();
776 int sched_quanta = SW_DEFAULT_SCHED_QUANTA;
777 int credit_quanta = SW_DEFAULT_CREDIT_QUANTA;
779 name = rte_vdev_device_name(vdev);
780 params = rte_vdev_device_args(vdev);
781 if (params != NULL && params[0] != '\0') {
782 struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
786 "Ignoring unsupported parameters when creating device '%s'\n",
789 int ret = rte_kvargs_process(kvlist, NUMA_NODE_ARG,
790 assign_numa_node, &socket_id);
793 "%s: Error parsing numa node parameter",
795 rte_kvargs_free(kvlist);
799 ret = rte_kvargs_process(kvlist, SCHED_QUANTA_ARG,
800 set_sched_quanta, &sched_quanta);
803 "%s: Error parsing sched quanta parameter",
805 rte_kvargs_free(kvlist);
809 ret = rte_kvargs_process(kvlist, CREDIT_QUANTA_ARG,
810 set_credit_quanta, &credit_quanta);
813 "%s: Error parsing credit quanta parameter",
815 rte_kvargs_free(kvlist);
819 rte_kvargs_free(kvlist);
824 "Creating eventdev sw device %s, numa_node=%d, sched_quanta=%d, credit_quanta=%d\n",
825 name, socket_id, sched_quanta, credit_quanta);
827 dev = rte_event_pmd_vdev_init(name,
828 sizeof(struct sw_evdev), socket_id);
830 SW_LOG_ERR("eventdev vdev init() failed");
833 dev->dev_ops = &evdev_sw_ops;
834 dev->enqueue = sw_event_enqueue;
835 dev->enqueue_burst = sw_event_enqueue_burst;
836 dev->enqueue_new_burst = sw_event_enqueue_burst;
837 dev->enqueue_forward_burst = sw_event_enqueue_burst;
838 dev->dequeue = sw_event_dequeue;
839 dev->dequeue_burst = sw_event_dequeue_burst;
841 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
844 sw = dev->data->dev_private;
845 sw->data = dev->data;
847 /* copy values passed from vdev command line to instance */
848 sw->credit_update_quanta = credit_quanta;
849 sw->sched_quanta = sched_quanta;
851 /* register service with EAL */
852 struct rte_service_spec service;
853 memset(&service, 0, sizeof(struct rte_service_spec));
854 snprintf(service.name, sizeof(service.name), "%s_service", name);
855 snprintf(sw->service_name, sizeof(sw->service_name), "%s_service",
857 service.socket_id = socket_id;
858 service.callback = sw_sched_service_func;
859 service.callback_userdata = (void *)dev;
861 int32_t ret = rte_service_component_register(&service, &sw->service_id);
863 SW_LOG_ERR("service register() failed");
867 dev->data->service_inited = 1;
868 dev->data->service_id = sw->service_id;
874 sw_remove(struct rte_vdev_device *vdev)
878 name = rte_vdev_device_name(vdev);
882 SW_LOG_INFO("Closing eventdev sw device %s\n", name);
884 return rte_event_pmd_vdev_uninit(name);
887 static struct rte_vdev_driver evdev_sw_pmd_drv = {
892 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_SW_PMD, evdev_sw_pmd_drv);
893 RTE_PMD_REGISTER_PARAM_STRING(event_sw, NUMA_NODE_ARG "=<int> "
894 SCHED_QUANTA_ARG "=<int>" CREDIT_QUANTA_ARG "=<int>");