1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016-2017 Intel Corporation
8 #include <rte_bus_vdev.h>
9 #include <rte_kvargs.h>
11 #include <rte_errno.h>
12 #include <rte_event_ring.h>
13 #include <rte_service_component.h>
18 #define EVENTDEV_NAME_SW_PMD event_sw
19 #define NUMA_NODE_ARG "numa_node"
20 #define SCHED_QUANTA_ARG "sched_quanta"
21 #define CREDIT_QUANTA_ARG "credit_quanta"
24 sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info);
27 sw_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
28 const uint8_t priorities[], uint16_t num)
30 struct sw_port *p = port;
31 struct sw_evdev *sw = sw_pmd_priv(dev);
34 RTE_SET_USED(priorities);
35 for (i = 0; i < num; i++) {
36 struct sw_qid *q = &sw->qids[queues[i]];
39 /* check for qid map overflow */
40 if (q->cq_num_mapped_cqs >= RTE_DIM(q->cq_map)) {
45 if (p->is_directed && p->num_qids_mapped > 0) {
50 for (j = 0; j < q->cq_num_mapped_cqs; j++) {
51 if (q->cq_map[j] == p->id)
55 /* check if port is already linked */
56 if (j < q->cq_num_mapped_cqs)
59 if (q->type == SW_SCHED_TYPE_DIRECT) {
60 /* check directed qids only map to one port */
61 if (p->num_qids_mapped > 0) {
65 /* check port only takes a directed flow */
72 p->num_qids_mapped = 1;
73 } else if (q->type == RTE_SCHED_TYPE_ORDERED) {
74 p->num_ordered_qids++;
76 } else if (q->type == RTE_SCHED_TYPE_ATOMIC ||
77 q->type == RTE_SCHED_TYPE_PARALLEL) {
81 q->cq_map[q->cq_num_mapped_cqs] = p->id;
83 q->cq_num_mapped_cqs++;
89 sw_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
92 struct sw_port *p = port;
93 struct sw_evdev *sw = sw_pmd_priv(dev);
97 for (i = 0; i < nb_unlinks; i++) {
98 struct sw_qid *q = &sw->qids[queues[i]];
99 for (j = 0; j < q->cq_num_mapped_cqs; j++) {
100 if (q->cq_map[j] == p->id) {
102 q->cq_map[q->cq_num_mapped_cqs - 1];
104 q->cq_num_mapped_cqs--;
107 p->num_qids_mapped--;
109 if (q->type == RTE_SCHED_TYPE_ORDERED)
110 p->num_ordered_qids--;
120 sw_port_setup(struct rte_eventdev *dev, uint8_t port_id,
121 const struct rte_event_port_conf *conf)
123 struct sw_evdev *sw = sw_pmd_priv(dev);
124 struct sw_port *p = &sw->ports[port_id];
125 char buf[RTE_RING_NAMESIZE];
128 struct rte_event_dev_info info;
129 sw_info_get(dev, &info);
131 /* detect re-configuring and return credits to instance if needed */
132 if (p->initialized) {
133 /* taking credits from pool is done one quanta at a time, and
134 * credits may be spend (counted in p->inflights) or still
135 * available in the port (p->inflight_credits). We must return
136 * the sum to no leak credits
138 int possible_inflights = p->inflight_credits + p->inflights;
139 rte_atomic32_sub(&sw->inflights, possible_inflights);
142 *p = (struct sw_port){0}; /* zero entire structure */
146 /* check to see if rings exists - port_setup() can be called multiple
147 * times legally (assuming device is stopped). If ring exists, free it
148 * to so it gets re-created with the correct size
150 snprintf(buf, sizeof(buf), "sw%d_p%u_%s", dev->data->dev_id,
151 port_id, "rx_worker_ring");
152 struct rte_event_ring *existing_ring = rte_event_ring_lookup(buf);
154 rte_event_ring_free(existing_ring);
156 p->rx_worker_ring = rte_event_ring_create(buf, MAX_SW_PROD_Q_DEPTH,
157 dev->data->socket_id,
158 RING_F_SP_ENQ | RING_F_SC_DEQ | RING_F_EXACT_SZ);
159 if (p->rx_worker_ring == NULL) {
160 SW_LOG_ERR("Error creating RX worker ring for port %d\n",
165 p->inflight_max = conf->new_event_threshold;
166 p->implicit_release = !conf->disable_implicit_release;
168 /* check if ring exists, same as rx_worker above */
169 snprintf(buf, sizeof(buf), "sw%d_p%u, %s", dev->data->dev_id,
170 port_id, "cq_worker_ring");
171 existing_ring = rte_event_ring_lookup(buf);
173 rte_event_ring_free(existing_ring);
175 p->cq_worker_ring = rte_event_ring_create(buf, conf->dequeue_depth,
176 dev->data->socket_id,
177 RING_F_SP_ENQ | RING_F_SC_DEQ | RING_F_EXACT_SZ);
178 if (p->cq_worker_ring == NULL) {
179 rte_event_ring_free(p->rx_worker_ring);
180 SW_LOG_ERR("Error creating CQ worker ring for port %d\n",
184 sw->cq_ring_space[port_id] = conf->dequeue_depth;
186 /* set hist list contents to empty */
187 for (i = 0; i < SW_PORT_HIST_LIST; i++) {
188 p->hist_list[i].fid = -1;
189 p->hist_list[i].qid = -1;
191 dev->data->ports[port_id] = p;
199 sw_port_release(void *port)
201 struct sw_port *p = (void *)port;
205 rte_event_ring_free(p->rx_worker_ring);
206 rte_event_ring_free(p->cq_worker_ring);
207 memset(p, 0, sizeof(*p));
211 qid_init(struct sw_evdev *sw, unsigned int idx, int type,
212 const struct rte_event_queue_conf *queue_conf)
215 int dev_id = sw->data->dev_id;
216 int socket_id = sw->data->socket_id;
217 char buf[IQ_ROB_NAMESIZE];
218 struct sw_qid *qid = &sw->qids[idx];
220 for (i = 0; i < SW_IQS_MAX; i++)
221 iq_init(sw, &qid->iq[i]);
223 /* Initialize the FID structures to no pinning (-1), and zero packets */
224 const struct sw_fid_t fid = {.cq = -1, .pcount = 0};
225 for (i = 0; i < RTE_DIM(qid->fids); i++)
230 qid->priority = queue_conf->priority;
232 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
233 char ring_name[RTE_RING_NAMESIZE];
234 uint32_t window_size;
236 /* rte_ring and window_size_mask require require window_size to
239 window_size = rte_align32pow2(
240 queue_conf->nb_atomic_order_sequences);
242 qid->window_size = window_size - 1;
246 "invalid reorder_window_size for ordered queue\n"
251 snprintf(buf, sizeof(buf), "sw%d_iq_%d_rob", dev_id, i);
252 qid->reorder_buffer = rte_zmalloc_socket(buf,
253 window_size * sizeof(qid->reorder_buffer[0]),
255 if (!qid->reorder_buffer) {
256 SW_LOG_DBG("reorder_buffer malloc failed\n");
260 memset(&qid->reorder_buffer[0],
262 window_size * sizeof(qid->reorder_buffer[0]));
264 snprintf(ring_name, sizeof(ring_name), "sw%d_q%d_freelist",
267 /* lookup the ring, and if it already exists, free it */
268 struct rte_ring *cleanup = rte_ring_lookup(ring_name);
270 rte_ring_free(cleanup);
272 qid->reorder_buffer_freelist = rte_ring_create(ring_name,
275 RING_F_SP_ENQ | RING_F_SC_DEQ);
276 if (!qid->reorder_buffer_freelist) {
277 SW_LOG_DBG("freelist ring create failed");
281 /* Populate the freelist with reorder buffer entries. Enqueue
282 * 'window_size - 1' entries because the rte_ring holds only
285 for (i = 0; i < window_size - 1; i++) {
286 if (rte_ring_sp_enqueue(qid->reorder_buffer_freelist,
287 &qid->reorder_buffer[i]) < 0)
291 qid->reorder_buffer_index = 0;
295 qid->initialized = 1;
300 for (i = 0; i < SW_IQS_MAX; i++) {
302 iq_free_chunk(sw, qid->iq[i].head);
305 if (qid->reorder_buffer) {
306 rte_free(qid->reorder_buffer);
307 qid->reorder_buffer = NULL;
310 if (qid->reorder_buffer_freelist) {
311 rte_ring_free(qid->reorder_buffer_freelist);
312 qid->reorder_buffer_freelist = NULL;
319 sw_queue_release(struct rte_eventdev *dev, uint8_t id)
321 struct sw_evdev *sw = sw_pmd_priv(dev);
322 struct sw_qid *qid = &sw->qids[id];
325 for (i = 0; i < SW_IQS_MAX; i++) {
326 if (!qid->iq[i].head)
328 iq_free_chunk(sw, qid->iq[i].head);
331 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
332 rte_free(qid->reorder_buffer);
333 rte_ring_free(qid->reorder_buffer_freelist);
335 memset(qid, 0, sizeof(*qid));
339 sw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
340 const struct rte_event_queue_conf *conf)
344 type = conf->schedule_type;
346 if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg) {
347 type = SW_SCHED_TYPE_DIRECT;
348 } else if (RTE_EVENT_QUEUE_CFG_ALL_TYPES
349 & conf->event_queue_cfg) {
350 SW_LOG_ERR("QUEUE_CFG_ALL_TYPES not supported\n");
354 struct sw_evdev *sw = sw_pmd_priv(dev);
356 if (sw->qids[queue_id].initialized)
357 sw_queue_release(dev, queue_id);
359 return qid_init(sw, queue_id, type, conf);
363 sw_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
364 struct rte_event_queue_conf *conf)
367 RTE_SET_USED(queue_id);
369 static const struct rte_event_queue_conf default_conf = {
370 .nb_atomic_flows = 4096,
371 .nb_atomic_order_sequences = 1,
372 .schedule_type = RTE_SCHED_TYPE_ATOMIC,
373 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
376 *conf = default_conf;
380 sw_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
381 struct rte_event_port_conf *port_conf)
384 RTE_SET_USED(port_id);
386 port_conf->new_event_threshold = 1024;
387 port_conf->dequeue_depth = 16;
388 port_conf->enqueue_depth = 16;
389 port_conf->disable_implicit_release = 0;
393 sw_dev_configure(const struct rte_eventdev *dev)
395 struct sw_evdev *sw = sw_pmd_priv(dev);
396 const struct rte_eventdev_data *data = dev->data;
397 const struct rte_event_dev_config *conf = &data->dev_conf;
400 sw->qid_count = conf->nb_event_queues;
401 sw->port_count = conf->nb_event_ports;
402 sw->nb_events_limit = conf->nb_events_limit;
403 rte_atomic32_set(&sw->inflights, 0);
405 /* Number of chunks sized for worst-case spread of events across IQs */
406 num_chunks = ((SW_INFLIGHT_EVENTS_TOTAL/SW_EVS_PER_Q_CHUNK)+1) +
407 sw->qid_count*SW_IQS_MAX*2;
409 /* If this is a reconfiguration, free the previous IQ allocation */
411 rte_free(sw->chunks);
413 sw->chunks = rte_malloc_socket(NULL,
414 sizeof(struct sw_queue_chunk) *
417 sw->data->socket_id);
421 sw->chunk_list_head = NULL;
422 for (i = 0; i < num_chunks; i++)
423 iq_free_chunk(sw, &sw->chunks[i]);
425 if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
434 sw_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
435 const struct rte_eth_dev *eth_dev,
439 RTE_SET_USED(eth_dev);
440 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
445 sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info)
449 static const struct rte_event_dev_info evdev_sw_info = {
450 .driver_name = SW_PMD_NAME,
451 .max_event_queues = RTE_EVENT_MAX_QUEUES_PER_DEV,
452 .max_event_queue_flows = SW_QID_NUM_FIDS,
453 .max_event_queue_priority_levels = SW_Q_PRIORITY_MAX,
454 .max_event_priority_levels = SW_IQS_MAX,
455 .max_event_ports = SW_PORTS_MAX,
456 .max_event_port_dequeue_depth = MAX_SW_CONS_Q_DEPTH,
457 .max_event_port_enqueue_depth = MAX_SW_PROD_Q_DEPTH,
458 .max_num_events = SW_INFLIGHT_EVENTS_TOTAL,
460 RTE_EVENT_DEV_CAP_QUEUE_QOS |
461 RTE_EVENT_DEV_CAP_BURST_MODE |
462 RTE_EVENT_DEV_CAP_EVENT_QOS |
463 RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE),
466 *info = evdev_sw_info;
470 sw_dump(struct rte_eventdev *dev, FILE *f)
472 const struct sw_evdev *sw = sw_pmd_priv(dev);
474 static const char * const q_type_strings[] = {
475 "Ordered", "Atomic", "Parallel", "Directed"
478 fprintf(f, "EventDev %s: ports %d, qids %d\n", "todo-fix-name",
479 sw->port_count, sw->qid_count);
481 fprintf(f, "\trx %"PRIu64"\n\tdrop %"PRIu64"\n\ttx %"PRIu64"\n",
482 sw->stats.rx_pkts, sw->stats.rx_dropped, sw->stats.tx_pkts);
483 fprintf(f, "\tsched calls: %"PRIu64"\n", sw->sched_called);
484 fprintf(f, "\tsched cq/qid call: %"PRIu64"\n", sw->sched_cq_qid_called);
485 fprintf(f, "\tsched no IQ enq: %"PRIu64"\n", sw->sched_no_iq_enqueues);
486 fprintf(f, "\tsched no CQ enq: %"PRIu64"\n", sw->sched_no_cq_enqueues);
487 uint32_t inflights = rte_atomic32_read(&sw->inflights);
488 uint32_t credits = sw->nb_events_limit - inflights;
489 fprintf(f, "\tinflight %d, credits: %d\n", inflights, credits);
491 #define COL_RED "\x1b[31m"
492 #define COL_RESET "\x1b[0m"
494 for (i = 0; i < sw->port_count; i++) {
496 const struct sw_port *p = &sw->ports[i];
497 if (!p->initialized) {
498 fprintf(f, " %sPort %d not initialized.%s\n",
499 COL_RED, i, COL_RESET);
502 fprintf(f, " Port %d %s\n", i,
503 p->is_directed ? " (SingleCons)" : "");
504 fprintf(f, "\trx %"PRIu64"\tdrop %"PRIu64"\ttx %"PRIu64
505 "\t%sinflight %d%s\n", sw->ports[i].stats.rx_pkts,
506 sw->ports[i].stats.rx_dropped,
507 sw->ports[i].stats.tx_pkts,
508 (p->inflights == p->inflight_max) ?
510 sw->ports[i].inflights, COL_RESET);
512 fprintf(f, "\tMax New: %u"
513 "\tAvg cycles PP: %"PRIu64"\tCredits: %u\n",
514 sw->ports[i].inflight_max,
515 sw->ports[i].avg_pkt_ticks,
516 sw->ports[i].inflight_credits);
517 fprintf(f, "\tReceive burst distribution:\n");
518 float zp_percent = p->zero_polls * 100.0 / p->total_polls;
519 fprintf(f, zp_percent < 10 ? "\t\t0:%.02f%% " : "\t\t0:%.0f%% ",
521 for (max = (int)RTE_DIM(p->poll_buckets); max-- > 0;)
522 if (p->poll_buckets[max] != 0)
524 for (j = 0; j <= max; j++) {
525 if (p->poll_buckets[j] != 0) {
526 float poll_pc = p->poll_buckets[j] * 100.0 /
528 fprintf(f, "%u-%u:%.02f%% ",
529 ((j << SW_DEQ_STAT_BUCKET_SHIFT) + 1),
530 ((j+1) << SW_DEQ_STAT_BUCKET_SHIFT),
536 if (p->rx_worker_ring) {
537 uint64_t used = rte_event_ring_count(p->rx_worker_ring);
538 uint64_t space = rte_event_ring_free_count(
540 const char *col = (space == 0) ? COL_RED : COL_RESET;
541 fprintf(f, "\t%srx ring used: %4"PRIu64"\tfree: %4"
542 PRIu64 COL_RESET"\n", col, used, space);
544 fprintf(f, "\trx ring not initialized.\n");
546 if (p->cq_worker_ring) {
547 uint64_t used = rte_event_ring_count(p->cq_worker_ring);
548 uint64_t space = rte_event_ring_free_count(
550 const char *col = (space == 0) ? COL_RED : COL_RESET;
551 fprintf(f, "\t%scq ring used: %4"PRIu64"\tfree: %4"
552 PRIu64 COL_RESET"\n", col, used, space);
554 fprintf(f, "\tcq ring not initialized.\n");
557 for (i = 0; i < sw->qid_count; i++) {
558 const struct sw_qid *qid = &sw->qids[i];
559 if (!qid->initialized) {
560 fprintf(f, " %sQueue %d not initialized.%s\n",
561 COL_RED, i, COL_RESET);
564 int affinities_per_port[SW_PORTS_MAX] = {0};
565 uint32_t inflights = 0;
567 fprintf(f, " Queue %d (%s)\n", i, q_type_strings[qid->type]);
568 fprintf(f, "\trx %"PRIu64"\tdrop %"PRIu64"\ttx %"PRIu64"\n",
569 qid->stats.rx_pkts, qid->stats.rx_dropped,
571 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
572 struct rte_ring *rob_buf_free =
573 qid->reorder_buffer_freelist;
575 fprintf(f, "\tReorder entries in use: %u\n",
576 rte_ring_free_count(rob_buf_free));
579 "\tReorder buffer not initialized\n");
583 for (flow = 0; flow < RTE_DIM(qid->fids); flow++)
584 if (qid->fids[flow].cq != -1) {
585 affinities_per_port[qid->fids[flow].cq]++;
586 inflights += qid->fids[flow].pcount;
590 fprintf(f, "\tPer Port Stats:\n");
591 for (port = 0; port < sw->port_count; port++) {
592 fprintf(f, "\t Port %d: Pkts: %"PRIu64, port,
594 fprintf(f, "\tFlows: %d\n", affinities_per_port[port]);
598 uint32_t iq_printed = 0;
599 for (iq = 0; iq < SW_IQS_MAX; iq++) {
600 if (!qid->iq[iq].head) {
601 fprintf(f, "\tiq %d is not initialized.\n", iq);
605 uint32_t used = iq_count(&qid->iq[iq]);
606 const char *col = COL_RESET;
608 fprintf(f, "\t%siq %d: Used %d"
609 COL_RESET"\n", col, iq, used);
614 fprintf(f, "\t-- iqs empty --\n");
619 sw_start(struct rte_eventdev *dev)
622 struct sw_evdev *sw = sw_pmd_priv(dev);
624 rte_service_component_runstate_set(sw->service_id, 1);
626 /* check a service core is mapped to this service */
627 if (!rte_service_runstate_get(sw->service_id)) {
628 SW_LOG_ERR("Warning: No Service core enabled on service %s\n",
633 /* check all ports are set up */
634 for (i = 0; i < sw->port_count; i++)
635 if (sw->ports[i].rx_worker_ring == NULL) {
636 SW_LOG_ERR("Port %d not configured\n", i);
640 /* check all queues are configured and mapped to ports*/
641 for (i = 0; i < sw->qid_count; i++)
642 if (sw->qids[i].iq[0].head == NULL ||
643 sw->qids[i].cq_num_mapped_cqs == 0) {
644 SW_LOG_ERR("Queue %d not configured\n", i);
648 /* build up our prioritized array of qids */
649 /* We don't use qsort here, as if all/multiple entries have the same
650 * priority, the result is non-deterministic. From "man 3 qsort":
651 * "If two members compare as equal, their order in the sorted
652 * array is undefined."
655 for (j = 0; j <= RTE_EVENT_DEV_PRIORITY_LOWEST; j++) {
656 for (i = 0; i < sw->qid_count; i++) {
657 if (sw->qids[i].priority == j) {
658 sw->qids_prioritized[qidx] = &sw->qids[i];
664 if (sw_xstats_init(sw) < 0)
674 sw_stop(struct rte_eventdev *dev)
676 struct sw_evdev *sw = sw_pmd_priv(dev);
677 sw_xstats_uninit(sw);
683 sw_close(struct rte_eventdev *dev)
685 struct sw_evdev *sw = sw_pmd_priv(dev);
688 for (i = 0; i < sw->qid_count; i++)
689 sw_queue_release(dev, i);
692 for (i = 0; i < sw->port_count; i++)
693 sw_port_release(&sw->ports[i]);
696 memset(&sw->stats, 0, sizeof(sw->stats));
697 sw->sched_called = 0;
698 sw->sched_no_iq_enqueues = 0;
699 sw->sched_no_cq_enqueues = 0;
700 sw->sched_cq_qid_called = 0;
706 assign_numa_node(const char *key __rte_unused, const char *value, void *opaque)
708 int *socket_id = opaque;
709 *socket_id = atoi(value);
710 if (*socket_id >= RTE_MAX_NUMA_NODES)
716 set_sched_quanta(const char *key __rte_unused, const char *value, void *opaque)
718 int *quanta = opaque;
719 *quanta = atoi(value);
720 if (*quanta < 0 || *quanta >= 4096)
726 set_credit_quanta(const char *key __rte_unused, const char *value, void *opaque)
728 int *credit = opaque;
729 *credit = atoi(value);
730 if (*credit < 0 || *credit >= 128)
736 static int32_t sw_sched_service_func(void *args)
738 struct rte_eventdev *dev = args;
739 sw_event_schedule(dev);
744 sw_probe(struct rte_vdev_device *vdev)
746 static const struct rte_eventdev_ops evdev_sw_ops = {
747 .dev_configure = sw_dev_configure,
748 .dev_infos_get = sw_info_get,
749 .dev_close = sw_close,
750 .dev_start = sw_start,
754 .queue_def_conf = sw_queue_def_conf,
755 .queue_setup = sw_queue_setup,
756 .queue_release = sw_queue_release,
757 .port_def_conf = sw_port_def_conf,
758 .port_setup = sw_port_setup,
759 .port_release = sw_port_release,
760 .port_link = sw_port_link,
761 .port_unlink = sw_port_unlink,
763 .eth_rx_adapter_caps_get = sw_eth_rx_adapter_caps_get,
765 .xstats_get = sw_xstats_get,
766 .xstats_get_names = sw_xstats_get_names,
767 .xstats_get_by_name = sw_xstats_get_by_name,
768 .xstats_reset = sw_xstats_reset,
771 static const char *const args[] = {
779 struct rte_eventdev *dev;
781 int socket_id = rte_socket_id();
782 int sched_quanta = SW_DEFAULT_SCHED_QUANTA;
783 int credit_quanta = SW_DEFAULT_CREDIT_QUANTA;
785 name = rte_vdev_device_name(vdev);
786 params = rte_vdev_device_args(vdev);
787 if (params != NULL && params[0] != '\0') {
788 struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
792 "Ignoring unsupported parameters when creating device '%s'\n",
795 int ret = rte_kvargs_process(kvlist, NUMA_NODE_ARG,
796 assign_numa_node, &socket_id);
799 "%s: Error parsing numa node parameter",
801 rte_kvargs_free(kvlist);
805 ret = rte_kvargs_process(kvlist, SCHED_QUANTA_ARG,
806 set_sched_quanta, &sched_quanta);
809 "%s: Error parsing sched quanta parameter",
811 rte_kvargs_free(kvlist);
815 ret = rte_kvargs_process(kvlist, CREDIT_QUANTA_ARG,
816 set_credit_quanta, &credit_quanta);
819 "%s: Error parsing credit quanta parameter",
821 rte_kvargs_free(kvlist);
825 rte_kvargs_free(kvlist);
830 "Creating eventdev sw device %s, numa_node=%d, sched_quanta=%d, credit_quanta=%d\n",
831 name, socket_id, sched_quanta, credit_quanta);
833 dev = rte_event_pmd_vdev_init(name,
834 sizeof(struct sw_evdev), socket_id);
836 SW_LOG_ERR("eventdev vdev init() failed");
839 dev->dev_ops = &evdev_sw_ops;
840 dev->enqueue = sw_event_enqueue;
841 dev->enqueue_burst = sw_event_enqueue_burst;
842 dev->enqueue_new_burst = sw_event_enqueue_burst;
843 dev->enqueue_forward_burst = sw_event_enqueue_burst;
844 dev->dequeue = sw_event_dequeue;
845 dev->dequeue_burst = sw_event_dequeue_burst;
847 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
850 sw = dev->data->dev_private;
851 sw->data = dev->data;
853 /* copy values passed from vdev command line to instance */
854 sw->credit_update_quanta = credit_quanta;
855 sw->sched_quanta = sched_quanta;
857 /* register service with EAL */
858 struct rte_service_spec service;
859 memset(&service, 0, sizeof(struct rte_service_spec));
860 snprintf(service.name, sizeof(service.name), "%s_service", name);
861 snprintf(sw->service_name, sizeof(sw->service_name), "%s_service",
863 service.socket_id = socket_id;
864 service.callback = sw_sched_service_func;
865 service.callback_userdata = (void *)dev;
867 int32_t ret = rte_service_component_register(&service, &sw->service_id);
869 SW_LOG_ERR("service register() failed");
873 dev->data->service_inited = 1;
874 dev->data->service_id = sw->service_id;
880 sw_remove(struct rte_vdev_device *vdev)
884 name = rte_vdev_device_name(vdev);
888 SW_LOG_INFO("Closing eventdev sw device %s\n", name);
890 return rte_event_pmd_vdev_uninit(name);
893 static struct rte_vdev_driver evdev_sw_pmd_drv = {
898 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_SW_PMD, evdev_sw_pmd_drv);
899 RTE_PMD_REGISTER_PARAM_STRING(event_sw, NUMA_NODE_ARG "=<int> "
900 SCHED_QUANTA_ARG "=<int>" CREDIT_QUANTA_ARG "=<int>");