1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include <rte_atomic.h>
6 #include <rte_bus_pci.h>
7 #include <rte_common.h>
8 #include <rte_devargs.h>
11 #include <rte_kvargs.h>
12 #include <rte_malloc.h>
13 #include <rte_mbuf_pool_ops.h>
18 #define CNXK_NPA_DEV_NAME RTE_STR(cnxk_npa_dev_)
19 #define CNXK_NPA_DEV_NAME_LEN (sizeof(CNXK_NPA_DEV_NAME) + PCI_PRI_STR_SIZE)
20 #define CNXK_NPA_MAX_POOLS_PARAM "max_pools"
22 static inline uint32_t
23 npa_aura_size_to_u32(uint8_t val)
25 if (val == NPA_AURA_SZ_0)
27 if (val >= NPA_AURA_SZ_MAX)
30 return 1 << (val + 6);
34 parse_max_pools_handler(const char *key, const char *value, void *extra_args)
39 val = rte_align32pow2(atoi(value));
40 if (val < npa_aura_size_to_u32(NPA_AURA_SZ_128))
42 if (val > npa_aura_size_to_u32(NPA_AURA_SZ_1M))
45 *(uint32_t *)extra_args = val;
49 static inline uint32_t
50 parse_max_pools(struct rte_devargs *devargs)
52 uint32_t max_pools = npa_aura_size_to_u32(NPA_AURA_SZ_128);
53 struct rte_kvargs *kvlist;
57 kvlist = rte_kvargs_parse(devargs->args, NULL);
61 rte_kvargs_process(kvlist, CNXK_NPA_MAX_POOLS_PARAM,
62 &parse_max_pools_handler, &max_pools);
63 rte_kvargs_free(kvlist);
69 cnxk_mempool_plt_parse_devargs(struct rte_pci_device *pci_dev)
71 roc_idev_npa_maxpools_set(parse_max_pools(pci_dev->device.devargs));
76 npa_dev_to_name(struct rte_pci_device *pci_dev, char *name)
78 snprintf(name, CNXK_NPA_DEV_NAME_LEN, CNXK_NPA_DEV_NAME PCI_PRI_FMT,
79 pci_dev->addr.domain, pci_dev->addr.bus, pci_dev->addr.devid,
80 pci_dev->addr.function);
86 npa_init(struct rte_pci_device *pci_dev)
88 char name[CNXK_NPA_DEV_NAME_LEN];
89 const struct rte_memzone *mz;
93 mz = rte_memzone_reserve_aligned(npa_dev_to_name(pci_dev, name),
94 sizeof(*dev), SOCKET_ID_ANY, 0,
100 dev->pci_dev = pci_dev;
102 rc = roc_npa_dev_init(dev);
109 rte_memzone_free(mz);
111 plt_err("failed to initialize npa device rc=%d", rc);
116 npa_fini(struct rte_pci_device *pci_dev)
118 char name[CNXK_NPA_DEV_NAME_LEN];
119 const struct rte_memzone *mz;
122 mz = rte_memzone_lookup(npa_dev_to_name(pci_dev, name));
126 rc = roc_npa_dev_fini(mz->addr);
129 plt_err("Failed to remove npa dev, rc=%d", rc);
132 rte_memzone_free(mz);
138 npa_remove(struct rte_pci_device *pci_dev)
140 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
143 return npa_fini(pci_dev);
147 npa_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
151 RTE_SET_USED(pci_drv);
157 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
160 return npa_init(pci_dev);
163 static const struct rte_pci_id npa_pci_map[] = {
165 .class_id = RTE_CLASS_ANY_ID,
166 .vendor_id = PCI_VENDOR_ID_CAVIUM,
167 .device_id = PCI_DEVID_CNXK_RVU_NPA_PF,
168 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
169 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KA,
172 .class_id = RTE_CLASS_ANY_ID,
173 .vendor_id = PCI_VENDOR_ID_CAVIUM,
174 .device_id = PCI_DEVID_CNXK_RVU_NPA_PF,
175 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
176 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KAS,
179 .class_id = RTE_CLASS_ANY_ID,
180 .vendor_id = PCI_VENDOR_ID_CAVIUM,
181 .device_id = PCI_DEVID_CNXK_RVU_NPA_PF,
182 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
183 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CNF10KA,
186 .class_id = RTE_CLASS_ANY_ID,
187 .vendor_id = PCI_VENDOR_ID_CAVIUM,
188 .device_id = PCI_DEVID_CNXK_RVU_NPA_VF,
189 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
190 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KA,
193 .class_id = RTE_CLASS_ANY_ID,
194 .vendor_id = PCI_VENDOR_ID_CAVIUM,
195 .device_id = PCI_DEVID_CNXK_RVU_NPA_VF,
196 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
197 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KAS,
200 .class_id = RTE_CLASS_ANY_ID,
201 .vendor_id = PCI_VENDOR_ID_CAVIUM,
202 .device_id = PCI_DEVID_CNXK_RVU_NPA_VF,
203 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
204 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CNF10KA,
211 static struct rte_pci_driver npa_pci = {
212 .id_table = npa_pci_map,
213 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
215 .remove = npa_remove,
218 RTE_PMD_REGISTER_PCI(mempool_cnxk, npa_pci);
219 RTE_PMD_REGISTER_PCI_TABLE(mempool_cnxk, npa_pci_map);
220 RTE_PMD_REGISTER_KMOD_DEP(mempool_cnxk, "vfio-pci");
221 RTE_PMD_REGISTER_PARAM_STRING(mempool_cnxk,
222 CNXK_NPA_MAX_POOLS_PARAM "=<128-1048576>");
224 RTE_INIT(cnxk_mempool_parse_devargs)
226 roc_npa_lf_init_cb_register(cnxk_mempool_plt_parse_devargs);