1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include <rte_atomic.h>
6 #include <rte_bus_pci.h>
7 #include <rte_common.h>
8 #include <rte_devargs.h>
11 #include <rte_kvargs.h>
12 #include <rte_malloc.h>
13 #include <rte_mbuf_pool_ops.h>
19 npa_remove(struct rte_pci_device *pci_dev)
21 RTE_SET_USED(pci_dev);
27 npa_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
29 RTE_SET_USED(pci_drv);
30 RTE_SET_USED(pci_dev);
35 static const struct rte_pci_id npa_pci_map[] = {
37 .class_id = RTE_CLASS_ANY_ID,
38 .vendor_id = PCI_VENDOR_ID_CAVIUM,
39 .device_id = PCI_DEVID_CNXK_RVU_NPA_PF,
40 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
41 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KA,
44 .class_id = RTE_CLASS_ANY_ID,
45 .vendor_id = PCI_VENDOR_ID_CAVIUM,
46 .device_id = PCI_DEVID_CNXK_RVU_NPA_PF,
47 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
48 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KAS,
51 .class_id = RTE_CLASS_ANY_ID,
52 .vendor_id = PCI_VENDOR_ID_CAVIUM,
53 .device_id = PCI_DEVID_CNXK_RVU_NPA_VF,
54 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
55 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KA,
58 .class_id = RTE_CLASS_ANY_ID,
59 .vendor_id = PCI_VENDOR_ID_CAVIUM,
60 .device_id = PCI_DEVID_CNXK_RVU_NPA_VF,
61 .subsystem_vendor_id = PCI_VENDOR_ID_CAVIUM,
62 .subsystem_device_id = PCI_SUBSYSTEM_DEVID_CN10KAS,
69 static struct rte_pci_driver npa_pci = {
70 .id_table = npa_pci_map,
71 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
76 RTE_PMD_REGISTER_PCI(mempool_cnxk, npa_pci);
77 RTE_PMD_REGISTER_PCI_TABLE(mempool_cnxk, npa_pci_map);
78 RTE_PMD_REGISTER_KMOD_DEP(mempool_cnxk, "vfio-pci");