1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include <rte_mempool.h>
8 #include "cnxk_mempool.h"
11 cnxk_mempool_enq(struct rte_mempool *mp, void *const *obj_table, unsigned int n)
15 /* Ensure mbuf init changes are written before the free pointers
16 * are enqueued to the stack.
19 for (index = 0; index < n; index++)
20 roc_npa_aura_op_free(mp->pool_id, 0,
21 (uint64_t)obj_table[index]);
27 cnxk_mempool_deq(struct rte_mempool *mp, void **obj_table, unsigned int n)
32 for (index = 0; index < n; index++, obj_table++) {
35 /* Retry few times before failing */
37 obj = roc_npa_aura_op_alloc(mp->pool_id, 0);
38 } while (retry-- && (obj == 0));
41 cnxk_mempool_enq(mp, obj_table - index, index);
44 *obj_table = (void *)obj;
51 cnxk_mempool_get_count(const struct rte_mempool *mp)
53 return (unsigned int)roc_npa_aura_op_available(mp->pool_id);
57 cnxk_mempool_calc_mem_size(const struct rte_mempool *mp, uint32_t obj_num,
58 uint32_t pg_shift, size_t *min_chunk_size,
63 /* Need space for one more obj on each chunk to fulfill
64 * alignment requirements.
66 total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
67 return rte_mempool_op_calc_mem_size_helper(
68 mp, obj_num, pg_shift, total_elt_sz, min_chunk_size, align);
72 cnxk_mempool_alloc(struct rte_mempool *mp)
74 uint64_t aura_handle = 0;
75 struct npa_aura_s aura;
76 struct npa_pool_s pool;
81 block_size = mp->elt_size + mp->header_size + mp->trailer_size;
82 block_count = mp->size;
83 if (mp->header_size % ROC_ALIGN != 0) {
84 plt_err("Header size should be multiple of %dB", ROC_ALIGN);
88 if (block_size % ROC_ALIGN != 0) {
89 plt_err("Block size should be multiple of %dB", ROC_ALIGN);
93 memset(&aura, 0, sizeof(struct npa_aura_s));
94 memset(&pool, 0, sizeof(struct npa_pool_s));
96 pool.buf_offset = mp->header_size / ROC_ALIGN;
98 /* Use driver specific mp->pool_config to override aura config */
99 if (mp->pool_config != NULL)
100 memcpy(&aura, mp->pool_config, sizeof(struct npa_aura_s));
102 rc = roc_npa_pool_create(&aura_handle, block_size, block_count, &aura,
105 plt_err("Failed to alloc pool or aura rc=%d", rc);
109 /* Store aura_handle for future queue operations */
110 mp->pool_id = aura_handle;
111 plt_npa_dbg("block_sz=%lu block_count=%d aura_handle=0x%" PRIx64,
112 block_size, block_count, aura_handle);
120 cnxk_mempool_free(struct rte_mempool *mp)
124 plt_npa_dbg("aura_handle=0x%" PRIx64, mp->pool_id);
125 rc = roc_npa_pool_destroy(mp->pool_id);
127 plt_err("Failed to free pool or aura rc=%d", rc);
131 cnxk_mempool_populate(struct rte_mempool *mp, unsigned int max_objs,
132 void *vaddr, rte_iova_t iova, size_t len,
133 rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
135 size_t total_elt_sz, off;
138 if (iova == RTE_BAD_IOVA)
141 total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
143 /* Align object start address to a multiple of total_elt_sz */
144 off = total_elt_sz - ((((uintptr_t)vaddr - 1) % total_elt_sz) + 1);
149 vaddr = (char *)vaddr + off;
152 num_elts = len / total_elt_sz;
154 plt_npa_dbg("iova %" PRIx64 ", aligned iova %" PRIx64 "", iova - off,
156 plt_npa_dbg("length %" PRIu64 ", aligned length %" PRIu64 "",
157 (uint64_t)(len + off), (uint64_t)len);
158 plt_npa_dbg("element size %" PRIu64 "", (uint64_t)total_elt_sz);
159 plt_npa_dbg("requested objects %" PRIu64 ", possible objects %" PRIu64
160 "", (uint64_t)max_objs, (uint64_t)num_elts);
162 roc_npa_aura_op_range_set(mp->pool_id, iova,
163 iova + num_elts * total_elt_sz);
165 if (roc_npa_pool_range_update_check(mp->pool_id) < 0)
168 return rte_mempool_op_populate_helper(
169 mp, RTE_MEMPOOL_POPULATE_F_ALIGN_OBJ, max_objs, vaddr, iova,
170 len, obj_cb, obj_cb_arg);