1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
5 #include <rte_mbuf_pool_ops.h>
6 #include <rte_mempool.h>
9 #include "cnxk_mempool.h"
12 cnxk_mempool_enq(struct rte_mempool *mp, void *const *obj_table, unsigned int n)
16 /* Ensure mbuf init changes are written before the free pointers
17 * are enqueued to the stack.
20 for (index = 0; index < n; index++)
21 roc_npa_aura_op_free(mp->pool_id, 0,
22 (uint64_t)obj_table[index]);
28 cnxk_mempool_deq(struct rte_mempool *mp, void **obj_table, unsigned int n)
33 for (index = 0; index < n; index++, obj_table++) {
36 /* Retry few times before failing */
38 obj = roc_npa_aura_op_alloc(mp->pool_id, 0);
39 } while (retry-- && (obj == 0));
42 cnxk_mempool_enq(mp, obj_table - index, index);
45 *obj_table = (void *)obj;
52 cnxk_mempool_get_count(const struct rte_mempool *mp)
54 return (unsigned int)roc_npa_aura_op_available(mp->pool_id);
58 cnxk_mempool_calc_mem_size(const struct rte_mempool *mp, uint32_t obj_num,
59 uint32_t pg_shift, size_t *min_chunk_size,
64 /* Need space for one more obj on each chunk to fulfill
65 * alignment requirements.
67 total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
68 return rte_mempool_op_calc_mem_size_helper(
69 mp, obj_num, pg_shift, total_elt_sz, min_chunk_size, align);
73 cnxk_mempool_alloc(struct rte_mempool *mp)
75 uint64_t aura_handle = 0;
76 struct npa_aura_s aura;
77 struct npa_pool_s pool;
82 block_size = mp->elt_size + mp->header_size + mp->trailer_size;
83 block_count = mp->size;
84 if (mp->header_size % ROC_ALIGN != 0) {
85 plt_err("Header size should be multiple of %dB", ROC_ALIGN);
89 if (block_size % ROC_ALIGN != 0) {
90 plt_err("Block size should be multiple of %dB", ROC_ALIGN);
94 memset(&aura, 0, sizeof(struct npa_aura_s));
95 memset(&pool, 0, sizeof(struct npa_pool_s));
97 pool.buf_offset = mp->header_size / ROC_ALIGN;
99 /* Use driver specific mp->pool_config to override aura config */
100 if (mp->pool_config != NULL)
101 memcpy(&aura, mp->pool_config, sizeof(struct npa_aura_s));
103 rc = roc_npa_pool_create(&aura_handle, block_size, block_count, &aura,
106 plt_err("Failed to alloc pool or aura rc=%d", rc);
110 /* Store aura_handle for future queue operations */
111 mp->pool_id = aura_handle;
112 plt_npa_dbg("block_sz=%lu block_count=%d aura_handle=0x%" PRIx64,
113 block_size, block_count, aura_handle);
121 cnxk_mempool_free(struct rte_mempool *mp)
125 plt_npa_dbg("aura_handle=0x%" PRIx64, mp->pool_id);
126 rc = roc_npa_pool_destroy(mp->pool_id);
128 plt_err("Failed to free pool or aura rc=%d", rc);
132 cnxk_mempool_populate(struct rte_mempool *mp, unsigned int max_objs,
133 void *vaddr, rte_iova_t iova, size_t len,
134 rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
136 size_t total_elt_sz, off;
139 if (iova == RTE_BAD_IOVA)
142 total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
144 /* Align object start address to a multiple of total_elt_sz */
145 off = total_elt_sz - ((((uintptr_t)vaddr - 1) % total_elt_sz) + 1);
150 vaddr = (char *)vaddr + off;
153 num_elts = len / total_elt_sz;
155 plt_npa_dbg("iova %" PRIx64 ", aligned iova %" PRIx64 "", iova - off,
157 plt_npa_dbg("length %" PRIu64 ", aligned length %" PRIu64 "",
158 (uint64_t)(len + off), (uint64_t)len);
159 plt_npa_dbg("element size %" PRIu64 "", (uint64_t)total_elt_sz);
160 plt_npa_dbg("requested objects %" PRIu64 ", possible objects %" PRIu64
161 "", (uint64_t)max_objs, (uint64_t)num_elts);
163 roc_npa_aura_op_range_set(mp->pool_id, iova,
164 iova + num_elts * total_elt_sz);
166 if (roc_npa_pool_range_update_check(mp->pool_id) < 0)
169 return rte_mempool_op_populate_helper(
170 mp, RTE_MEMPOOL_POPULATE_F_ALIGN_OBJ, max_objs, vaddr, iova,
171 len, obj_cb, obj_cb_arg);
175 cnxk_mempool_plt_init(void)
179 if (roc_model_is_cn9k()) {
180 rte_mbuf_set_platform_mempool_ops("cn9k_mempool_ops");
181 } else if (roc_model_is_cn10k()) {
182 rte_mbuf_set_platform_mempool_ops("cn10k_mempool_ops");
183 rc = cn10k_mempool_plt_init();
188 RTE_INIT(cnxk_mempool_ops_init)
190 roc_plt_init_cb_register(cnxk_mempool_plt_init);