1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
4 * Copyright 2016-2019 NXP
8 #ifndef _DPAA2_HW_DPBP_H_
9 #define _DPAA2_HW_DPBP_H_
11 #define DPAA2_MAX_BUF_POOLS 8
13 #define DPAA2_INVALID_MBUF_SEQN 0
17 /**< The address from where DPAA2 will carve out the buffers */
19 /**< Physical address of the memory provided in addr */
21 /**< Number of buffers */
23 /**< Size including headroom for each buffer */
25 /**< Buffer alignment (in bytes) */
27 /**< Autogenerated buffer pool ID for internal use */
31 uint32_t size; /**< Size of the Pool */
32 uint32_t num_bufs; /**< Number of buffers in Pool */
33 uint16_t bpid; /**< Pool ID, from pool configuration */
34 uint8_t *h_bpool_mem; /**< Internal context data */
35 struct dpaa2_dpbp_dev *dpbp_node; /**< Hardware context */
39 * Buffer pool list configuration structure. User need to give DPAA2 the
40 * valid number of 'num_buf_pools'.
42 struct dpaa2_bp_list_cfg {
43 struct buf_pool_cfg buf_pool; /* Configuration of each buffer pool*/
46 struct dpaa2_bp_list {
47 struct dpaa2_bp_list *next;
48 struct rte_mempool *mp; /**< DPDK RTE EAL pool reference */
49 int32_t dpaa2_ops_index; /**< Index into DPDK Mempool ops table */
50 struct buf_pool buf_pool;
53 struct dpaa2_bp_info {
54 uint32_t meta_data_size;
56 struct dpaa2_bp_list *bp_list;
59 #define mempool_to_bpinfo(mp) ((struct dpaa2_bp_info *)(mp)->pool_data)
60 #define mempool_to_bpid(mp) ((mempool_to_bpinfo(mp))->bpid)
62 extern struct dpaa2_bp_info *rte_dpaa2_bpid_info;
65 int rte_dpaa2_mbuf_alloc_bulk(struct rte_mempool *pool,
66 void **obj_table, unsigned int count);
68 #endif /* _DPAA2_HW_DPBP_H_ */