1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
14 #include <rte_atomic.h>
16 #include <rte_bus_pci.h>
17 #include <rte_errno.h>
18 #include <rte_memory.h>
19 #include <rte_malloc.h>
20 #include <rte_spinlock.h>
23 #include "octeontx_mbox.h"
24 #include "octeontx_fpavf.h"
26 /* FPA Mbox Message */
29 #define FPA_CONFIGSET 0x1
30 #define FPA_CONFIGGET 0x2
31 #define FPA_START_COUNT 0x3
32 #define FPA_STOP_COUNT 0x4
33 #define FPA_ATTACHAURA 0x5
34 #define FPA_DETACHAURA 0x6
35 #define FPA_SETAURALVL 0x7
36 #define FPA_GETAURALVL 0x8
38 #define FPA_COPROC 0x1
41 struct octeontx_mbox_fpa_cfg {
44 uint64_t pool_stack_base;
45 uint64_t pool_stack_end;
49 struct __rte_packed gen_req {
53 struct __rte_packed idn_req {
57 struct __rte_packed gen_resp {
62 struct __rte_packed dcfg_resp {
68 uint8_t net_port_count;
69 uint8_t virt_port_count;
72 #define FPA_MAX_POOL 32
73 #define FPA_PF_PAGE_SZ 4096
75 #define FPA_LN_SIZE 128
76 #define FPA_ROUND_UP(x, size) \
77 ((((unsigned long)(x)) + size-1) & (~(size-1)))
78 #define FPA_OBJSZ_2_CACHE_LINE(sz) (((sz) + RTE_CACHE_LINE_MASK) >> 7)
79 #define FPA_CACHE_LINE_2_OBJSZ(sz) ((sz) << 7)
81 #define POOL_ENA (0x1 << 0)
82 #define POOL_DIS (0x0 << 0)
83 #define POOL_SET_NAT_ALIGN (0x1 << 1)
84 #define POOL_DIS_NAT_ALIGN (0x0 << 1)
85 #define POOL_STYPE(x) (((x) & 0x1) << 2)
86 #define POOL_LTYPE(x) (((x) & 0x3) << 3)
87 #define POOL_BUF_OFFSET(x) (((x) & 0x7fffULL) << 16)
88 #define POOL_BUF_SIZE(x) (((x) & 0x7ffULL) << 32)
91 void *pool_stack_base;
93 uint64_t stack_ln_ptr;
95 uint16_t vf_id; /* gpool_id */
96 uint16_t sz128; /* Block size in cache lines */
100 struct octeontx_fpadev {
102 uint8_t total_gpool_cnt;
103 struct fpavf_res pool[FPA_VF_MAX];
106 static struct octeontx_fpadev fpadev;
108 int octeontx_logtype_fpavf;
109 int octeontx_logtype_fpavf_mbox;
111 RTE_INIT(otx_pool_init_log)
113 octeontx_logtype_fpavf = rte_log_register("pmd.mempool.octeontx");
114 if (octeontx_logtype_fpavf >= 0)
115 rte_log_set_level(octeontx_logtype_fpavf, RTE_LOG_NOTICE);
118 /* lock is taken by caller */
120 octeontx_fpa_gpool_alloc(unsigned int object_size)
122 uint16_t global_domain = octeontx_get_global_domain();
123 struct fpavf_res *res = NULL;
127 sz128 = FPA_OBJSZ_2_CACHE_LINE(object_size);
129 for (i = 0; i < FPA_VF_MAX; i++) {
131 /* Skip VF that is not mapped Or _inuse */
132 if ((fpadev.pool[i].bar0 == NULL) ||
133 (fpadev.pool[i].is_inuse == true) ||
134 (fpadev.pool[i].domain_id != global_domain))
137 res = &fpadev.pool[i];
139 RTE_ASSERT(res->domain_id != (uint16_t)~0);
140 RTE_ASSERT(res->vf_id != (uint16_t)~0);
141 RTE_ASSERT(res->stack_ln_ptr != 0);
143 if (res->sz128 == 0) {
145 fpavf_log_dbg("gpool %d blk_sz %d\n", res->vf_id,
155 static __rte_always_inline struct fpavf_res *
156 octeontx_get_fpavf(uint16_t gpool)
158 uint16_t global_domain = octeontx_get_global_domain();
161 for (i = 0; i < FPA_VF_MAX; i++) {
162 if (fpadev.pool[i].domain_id != global_domain)
164 if (fpadev.pool[i].vf_id != gpool)
167 return &fpadev.pool[i];
173 /* lock is taken by caller */
174 static __rte_always_inline uintptr_t
175 octeontx_fpa_gpool2handle(uint16_t gpool)
177 struct fpavf_res *res = NULL;
179 RTE_ASSERT(gpool < FPA_VF_MAX);
180 res = octeontx_get_fpavf(gpool);
184 return (uintptr_t)res->bar0 | gpool;
187 static __rte_always_inline bool
188 octeontx_fpa_handle_valid(uintptr_t handle)
190 struct fpavf_res *res = NULL;
195 if (unlikely(!handle))
199 gpool = octeontx_fpa_bufpool_gpool(handle);
201 /* get the bar address */
202 handle &= ~(uint64_t)FPA_GPOOL_MASK;
203 for (i = 0; i < FPA_VF_MAX; i++) {
204 if ((uintptr_t)fpadev.pool[i].bar0 != handle)
208 if (gpool != fpadev.pool[i].vf_id)
211 res = &fpadev.pool[i];
213 if (res->sz128 == 0 || res->domain_id == (uint16_t)~0 ||
214 res->stack_ln_ptr == 0)
225 octeontx_fpapf_pool_setup(unsigned int gpool, unsigned int buf_size,
226 signed short buf_offset, unsigned int max_buf_count)
229 rte_iova_t phys_addr;
231 struct fpavf_res *fpa = NULL;
233 struct octeontx_mbox_hdr hdr;
234 struct dcfg_resp resp;
235 struct octeontx_mbox_fpa_cfg cfg;
238 fpa = octeontx_get_fpavf(gpool);
242 memsz = FPA_ROUND_UP(max_buf_count / fpa->stack_ln_ptr, FPA_LN_SIZE) *
245 /* Round-up to page size */
246 memsz = (memsz + FPA_PF_PAGE_SZ - 1) & ~(uintptr_t)(FPA_PF_PAGE_SZ-1);
247 memptr = rte_malloc(NULL, memsz, RTE_CACHE_LINE_SIZE);
248 if (memptr == NULL) {
253 /* Configure stack */
254 fpa->pool_stack_base = memptr;
255 phys_addr = rte_malloc_virt2iova(memptr);
257 buf_size /= FPA_LN_SIZE;
260 hdr.coproc = FPA_COPROC;
261 hdr.msg = FPA_CONFIGSET;
262 hdr.vfid = fpa->vf_id;
265 buf_offset /= FPA_LN_SIZE;
266 reg = POOL_BUF_SIZE(buf_size) | POOL_BUF_OFFSET(buf_offset) |
267 POOL_LTYPE(0x2) | POOL_STYPE(0) | POOL_SET_NAT_ALIGN |
270 cfg.aid = FPA_AURA_IDX(gpool);
272 cfg.pool_stack_base = phys_addr;
273 cfg.pool_stack_end = phys_addr + memsz;
274 cfg.aura_cfg = (1 << 9);
276 ret = octeontx_mbox_send(&hdr, &cfg,
277 sizeof(struct octeontx_mbox_fpa_cfg),
278 &resp, sizeof(resp));
284 fpavf_log_dbg(" vfid %d gpool %d aid %d pool_cfg 0x%x pool_stack_base %" PRIx64 " pool_stack_end %" PRIx64" aura_cfg %" PRIx64 "\n",
285 fpa->vf_id, gpool, cfg.aid, (unsigned int)cfg.pool_cfg,
286 cfg.pool_stack_base, cfg.pool_stack_end, cfg.aura_cfg);
288 /* Now pool is in_use */
289 fpa->is_inuse = true;
299 octeontx_fpapf_pool_destroy(unsigned int gpool_index)
301 struct octeontx_mbox_hdr hdr;
302 struct dcfg_resp resp;
303 struct octeontx_mbox_fpa_cfg cfg;
304 struct fpavf_res *fpa = NULL;
307 fpa = octeontx_get_fpavf(gpool_index);
311 hdr.coproc = FPA_COPROC;
312 hdr.msg = FPA_CONFIGSET;
313 hdr.vfid = fpa->vf_id;
316 /* reset and free the pool */
319 cfg.pool_stack_base = 0;
320 cfg.pool_stack_end = 0;
323 ret = octeontx_mbox_send(&hdr, &cfg,
324 sizeof(struct octeontx_mbox_fpa_cfg),
325 &resp, sizeof(resp));
333 /* anycase free pool stack memory */
334 rte_free(fpa->pool_stack_base);
335 fpa->pool_stack_base = NULL;
340 octeontx_fpapf_aura_attach(unsigned int gpool_index)
342 struct octeontx_mbox_hdr hdr;
343 struct dcfg_resp resp;
344 struct octeontx_mbox_fpa_cfg cfg;
347 if (gpool_index >= FPA_MAX_POOL) {
351 hdr.coproc = FPA_COPROC;
352 hdr.msg = FPA_ATTACHAURA;
353 hdr.vfid = gpool_index;
355 memset(&cfg, 0x0, sizeof(struct octeontx_mbox_fpa_cfg));
356 cfg.aid = FPA_AURA_IDX(gpool_index);
358 ret = octeontx_mbox_send(&hdr, &cfg,
359 sizeof(struct octeontx_mbox_fpa_cfg),
360 &resp, sizeof(resp));
362 fpavf_log_err("Could not attach fpa ");
363 fpavf_log_err("aura %d to pool %d. Err=%d. FuncErr=%d\n",
364 FPA_AURA_IDX(gpool_index), gpool_index, ret,
374 octeontx_fpapf_aura_detach(unsigned int gpool_index)
376 struct octeontx_mbox_fpa_cfg cfg = {0};
377 struct octeontx_mbox_hdr hdr = {0};
380 if (gpool_index >= FPA_MAX_POOL) {
385 cfg.aid = FPA_AURA_IDX(gpool_index);
386 hdr.coproc = FPA_COPROC;
387 hdr.msg = FPA_DETACHAURA;
388 hdr.vfid = gpool_index;
389 ret = octeontx_mbox_send(&hdr, &cfg, sizeof(cfg), NULL, 0);
391 fpavf_log_err("Couldn't detach FPA aura %d Err=%d FuncErr=%d\n",
392 FPA_AURA_IDX(gpool_index), ret,
402 octeontx_fpavf_pool_set_range(uintptr_t handle, unsigned long memsz,
403 void *memva, uint16_t gpool)
407 if (unlikely(!handle))
410 va_end = (uintptr_t)memva + memsz;
411 va_end &= ~RTE_CACHE_LINE_MASK;
414 fpavf_write64((uintptr_t)memva,
415 (void *)((uintptr_t)handle +
416 FPA_VF_VHPOOL_START_ADDR(gpool)));
417 fpavf_write64(va_end,
418 (void *)((uintptr_t)handle +
419 FPA_VF_VHPOOL_END_ADDR(gpool)));
424 octeontx_fpapf_start_count(uint16_t gpool_index)
427 struct octeontx_mbox_hdr hdr = {0};
429 if (gpool_index >= FPA_MAX_POOL) {
434 hdr.coproc = FPA_COPROC;
435 hdr.msg = FPA_START_COUNT;
436 hdr.vfid = gpool_index;
437 ret = octeontx_mbox_send(&hdr, NULL, 0, NULL, 0);
439 fpavf_log_err("Could not start buffer counting for ");
440 fpavf_log_err("FPA pool %d. Err=%d. FuncErr=%d\n",
441 gpool_index, ret, hdr.res_code);
450 static __rte_always_inline int
451 octeontx_fpavf_free(unsigned int gpool)
453 struct fpavf_res *res = octeontx_get_fpavf(gpool);
456 if (gpool >= FPA_MAX_POOL) {
463 res->is_inuse = false;
469 static __rte_always_inline int
470 octeontx_gpool_free(uint16_t gpool)
472 struct fpavf_res *res = octeontx_get_fpavf(gpool);
474 if (res && res->sz128 != 0) {
482 * Return buffer size for a given pool
485 octeontx_fpa_bufpool_block_size(uintptr_t handle)
487 struct fpavf_res *res = NULL;
490 if (unlikely(!octeontx_fpa_handle_valid(handle)))
494 gpool = octeontx_fpa_bufpool_gpool(handle);
495 res = octeontx_get_fpavf(gpool);
496 return res ? FPA_CACHE_LINE_2_OBJSZ(res->sz128) : 0;
500 octeontx_fpa_bufpool_free_count(uintptr_t handle)
502 uint64_t cnt, limit, avail;
507 if (unlikely(!octeontx_fpa_handle_valid(handle)))
511 gpool = octeontx_fpa_bufpool_gpool(handle);
513 gaura = octeontx_fpa_bufpool_gaura(handle);
515 /* Get pool bar address from handle */
516 pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK;
518 cnt = fpavf_read64((void *)((uintptr_t)pool_bar +
519 FPA_VF_VHAURA_CNT(gaura)));
520 limit = fpavf_read64((void *)((uintptr_t)pool_bar +
521 FPA_VF_VHAURA_CNT_LIMIT(gaura)));
523 avail = fpavf_read64((void *)((uintptr_t)pool_bar +
524 FPA_VF_VHPOOL_AVAILABLE(gpool)));
526 return RTE_MIN(avail, (limit - cnt));
530 octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count,
531 unsigned int buf_offset, int node_id)
535 uintptr_t gpool_handle;
539 RTE_SET_USED(node_id);
540 RTE_BUILD_BUG_ON(sizeof(struct rte_mbuf) > OCTEONTX_FPAVF_BUF_OFFSET);
542 octeontx_mbox_init();
543 object_size = RTE_CACHE_LINE_ROUNDUP(object_size);
544 if (object_size > FPA_MAX_OBJ_SIZE) {
549 rte_spinlock_lock(&fpadev.lock);
550 res = octeontx_fpa_gpool_alloc(object_size);
553 if (unlikely(res < 0)) {
561 /* get pool handle */
562 gpool_handle = octeontx_fpa_gpool2handle(gpool);
563 if (!octeontx_fpa_handle_valid(gpool_handle)) {
565 goto error_gpool_free;
568 /* Get pool bar address from handle */
569 pool_bar = gpool_handle & ~(uint64_t)FPA_GPOOL_MASK;
571 res = octeontx_fpapf_pool_setup(gpool, object_size, buf_offset,
575 goto error_gpool_free;
578 /* populate AURA fields */
579 res = octeontx_fpapf_aura_attach(gpool);
582 goto error_pool_destroy;
585 gaura = FPA_AURA_IDX(gpool);
588 rte_spinlock_unlock(&fpadev.lock);
590 /* populate AURA registers */
591 fpavf_write64(object_count, (void *)((uintptr_t)pool_bar +
592 FPA_VF_VHAURA_CNT(gaura)));
593 fpavf_write64(object_count, (void *)((uintptr_t)pool_bar +
594 FPA_VF_VHAURA_CNT_LIMIT(gaura)));
595 fpavf_write64(object_count + 1, (void *)((uintptr_t)pool_bar +
596 FPA_VF_VHAURA_CNT_THRESHOLD(gaura)));
598 octeontx_fpapf_start_count(gpool);
603 octeontx_fpavf_free(gpool);
604 octeontx_fpapf_pool_destroy(gpool);
606 octeontx_gpool_free(gpool);
608 rte_spinlock_unlock(&fpadev.lock);
610 return (uintptr_t)NULL;
614 * Destroy a buffer pool.
617 octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
619 void **node, **curr, *head = NULL;
627 RTE_SET_USED(node_id);
629 /* Wait for all outstanding writes to be committed */
632 if (unlikely(!octeontx_fpa_handle_valid(handle)))
636 gpool = octeontx_fpa_bufpool_gpool(handle);
638 gaura = octeontx_fpa_bufpool_gaura(handle);
640 /* Get pool bar address from handle */
641 pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK;
643 /* Check for no outstanding buffers */
644 cnt = fpavf_read64((void *)((uintptr_t)pool_bar +
645 FPA_VF_VHAURA_CNT(gaura)));
647 fpavf_log_dbg("buffer exist in pool cnt %" PRId64 "\n", cnt);
651 rte_spinlock_lock(&fpadev.lock);
653 avail = fpavf_read64((void *)((uintptr_t)pool_bar +
654 FPA_VF_VHPOOL_AVAILABLE(gpool)));
656 /* Prepare to empty the entire POOL */
657 fpavf_write64(avail, (void *)((uintptr_t)pool_bar +
658 FPA_VF_VHAURA_CNT_LIMIT(gaura)));
659 fpavf_write64(avail + 1, (void *)((uintptr_t)pool_bar +
660 FPA_VF_VHAURA_CNT_THRESHOLD(gaura)));
663 /* Invalidate the POOL */
664 octeontx_gpool_free(gpool);
666 /* Process all buffers in the pool */
669 /* Yank a buffer from the pool */
670 node = (void *)(uintptr_t)
671 fpavf_read64((void *)
672 (pool_bar + FPA_VF_VHAURA_OP_ALLOC(gaura)));
675 fpavf_log_err("GAURA[%u] missing %" PRIx64 " buf\n",
680 /* Imsert it into an ordered linked list */
681 for (curr = &head; curr[0] != NULL; curr = curr[0]) {
682 if ((uintptr_t)node <= (uintptr_t)curr[0])
689 /* Verify the linked list to be a perfect series */
690 sz = octeontx_fpa_bufpool_block_size(handle) << 7;
691 for (curr = head; curr != NULL && curr[0] != NULL;
693 if (curr == curr[0] ||
694 ((uintptr_t)curr != ((uintptr_t)curr[0] - sz))) {
695 fpavf_log_err("POOL# %u buf sequence err (%p vs. %p)\n",
696 gpool, curr, curr[0]);
700 /* Disable pool operation */
701 fpavf_write64(~0ul, (void *)((uintptr_t)pool_bar +
702 FPA_VF_VHPOOL_START_ADDR(gpool)));
703 fpavf_write64(~0ul, (void *)((uintptr_t)pool_bar +
704 FPA_VF_VHPOOL_END_ADDR(gpool)));
706 (void)octeontx_fpapf_pool_destroy(gpool);
708 /* Deactivate the AURA */
709 fpavf_write64(0, (void *)((uintptr_t)pool_bar +
710 FPA_VF_VHAURA_CNT_LIMIT(gaura)));
711 fpavf_write64(0, (void *)((uintptr_t)pool_bar +
712 FPA_VF_VHAURA_CNT_THRESHOLD(gaura)));
714 ret = octeontx_fpapf_aura_detach(gpool);
716 fpavf_log_err("Failed to dettach gaura %u. error code=%d\n",
721 (void)octeontx_fpavf_free(gpool);
723 rte_spinlock_unlock(&fpadev.lock);
728 octeontx_fpavf_setup(void)
731 static bool init_once;
734 rte_spinlock_init(&fpadev.lock);
735 fpadev.total_gpool_cnt = 0;
737 for (i = 0; i < FPA_VF_MAX; i++) {
739 fpadev.pool[i].domain_id = ~0;
740 fpadev.pool[i].stack_ln_ptr = 0;
741 fpadev.pool[i].sz128 = 0;
742 fpadev.pool[i].bar0 = NULL;
743 fpadev.pool[i].pool_stack_base = NULL;
744 fpadev.pool[i].is_inuse = false;
751 octeontx_fpavf_identify(void *bar0)
756 uint64_t stack_ln_ptr;
757 static uint16_t vf_idx;
759 val = fpavf_read64((void *)((uintptr_t)bar0 +
760 FPA_VF_VHAURA_CNT_THRESHOLD(0)));
762 domain_id = (val >> 8) & 0xffff;
763 vf_id = (val >> 24) & 0xffff;
765 stack_ln_ptr = fpavf_read64((void *)((uintptr_t)bar0 +
766 FPA_VF_VHPOOL_THRESHOLD(0)));
767 if (vf_idx >= FPA_VF_MAX) {
768 fpavf_log_err("vf_id(%d) greater than max vf (32)\n", vf_id);
772 fpadev.pool[vf_idx].domain_id = domain_id;
773 fpadev.pool[vf_idx].vf_id = vf_id;
774 fpadev.pool[vf_idx].bar0 = bar0;
775 fpadev.pool[vf_idx].stack_ln_ptr = stack_ln_ptr;
781 /* FPAVF pcie device aka mempool probe */
783 fpavf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
787 struct fpavf_res *fpa = NULL;
789 RTE_SET_USED(pci_drv);
792 /* For secondary processes, the primary has done all the work */
793 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
796 if (pci_dev->mem_resource[0].addr == NULL) {
797 fpavf_log_err("Empty bars %p ", pci_dev->mem_resource[0].addr);
800 idreg = pci_dev->mem_resource[0].addr;
802 octeontx_fpavf_setup();
804 res = octeontx_fpavf_identify(idreg);
808 fpa = &fpadev.pool[res];
809 fpadev.total_gpool_cnt++;
812 fpavf_log_dbg("total_fpavfs %d bar0 %p domain %d vf %d stk_ln_ptr 0x%x",
813 fpadev.total_gpool_cnt, fpa->bar0, fpa->domain_id,
814 fpa->vf_id, (unsigned int)fpa->stack_ln_ptr);
819 static const struct rte_pci_id pci_fpavf_map[] = {
821 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
822 PCI_DEVICE_ID_OCTEONTX_FPA_VF)
829 static struct rte_pci_driver pci_fpavf = {
830 .id_table = pci_fpavf_map,
831 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
832 .probe = fpavf_probe,
835 RTE_PMD_REGISTER_PCI(octeontx_fpavf, pci_fpavf);