1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2018 Atomic Rules LLC
10 #include <rte_memory.h>
13 /* The DDM or Downstream Data Mover is an internal Arkville hardware
14 * module for moving packet from host memory to the TX packet streams.
15 * This module is *not* intended for end-user manipulation, hence
16 * there is minimal documentation.
19 /* struct defining Tx meta data -- fixed in FPGA -- 16 bytes */
23 uint16_t data_len; /* of this MBUF */
24 #define ARK_DDM_EOP 0x01
25 #define ARK_DDM_SOP 0x02
26 uint8_t flags; /* bit 0 indicates last mbuf in chain. */
32 * DDM core hardware structures
33 * These are overlay structures to a memory mapped FPGA device. These
34 * structs will never be instantiated in ram memory
36 #define ARK_DDM_CFG 0x0000
37 #define ARK_DDM_CONST 0xfacecafe
38 struct ark_ddm_cfg_t {
40 volatile uint32_t tlp_stats_clear;
42 volatile uint32_t tag_max;
43 volatile uint32_t command;
44 volatile uint32_t stop_flushed;
47 #define ARK_DDM_STATS 0x0020
48 struct ark_ddm_stats_t {
49 volatile uint64_t tx_byte_count;
50 volatile uint64_t tx_pkt_count;
51 volatile uint64_t tx_mbuf_count;
54 #define ARK_DDM_MRDQ 0x0040
55 struct ark_ddm_mrdq_t {
56 volatile uint32_t mrd_q1;
57 volatile uint32_t mrd_q2;
58 volatile uint32_t mrd_q3;
59 volatile uint32_t mrd_q4;
60 volatile uint32_t mrd_full;
63 #define ARK_DDM_CPLDQ 0x0068
64 struct ark_ddm_cpldq_t {
65 volatile uint32_t cpld_q1;
66 volatile uint32_t cpld_q2;
67 volatile uint32_t cpld_q3;
68 volatile uint32_t cpld_q4;
69 volatile uint32_t cpld_full;
72 #define ARK_DDM_MRD_PS 0x0090
73 struct ark_ddm_mrd_ps_t {
74 volatile uint32_t mrd_ps_min;
75 volatile uint32_t mrd_ps_max;
76 volatile uint32_t mrd_full_ps_min;
77 volatile uint32_t mrd_full_ps_max;
78 volatile uint32_t mrd_dw_ps_min;
79 volatile uint32_t mrd_dw_ps_max;
82 #define ARK_DDM_QUEUE_STATS 0x00a8
83 struct ark_ddm_qstats_t {
84 volatile uint64_t byte_count;
85 volatile uint64_t pkt_count;
86 volatile uint64_t mbuf_count;
89 #define ARK_DDM_CPLD_PS 0x00c0
90 struct ark_ddm_cpld_ps_t {
91 volatile uint32_t cpld_ps_min;
92 volatile uint32_t cpld_ps_max;
93 volatile uint32_t cpld_full_ps_min;
94 volatile uint32_t cpld_full_ps_max;
95 volatile uint32_t cpld_dw_ps_min;
96 volatile uint32_t cpld_dw_ps_max;
99 #define ARK_DDM_SETUP 0x00e0
100 struct ark_ddm_setup_t {
101 rte_iova_t cons_write_index_addr;
102 uint32_t write_index_interval; /* 4ns each */
103 volatile uint32_t cons_index;
106 #define ARK_DDM_EXPECTED_SIZE 256
107 #define ARK_DDM_QOFFSET ARK_DDM_EXPECTED_SIZE
108 /* Consolidated structure */
110 struct ark_ddm_cfg_t cfg;
111 uint8_t reserved0[(ARK_DDM_STATS - ARK_DDM_CFG) -
112 sizeof(struct ark_ddm_cfg_t)];
113 struct ark_ddm_stats_t stats;
114 uint8_t reserved1[(ARK_DDM_MRDQ - ARK_DDM_STATS) -
115 sizeof(struct ark_ddm_stats_t)];
116 struct ark_ddm_mrdq_t mrdq;
117 uint8_t reserved2[(ARK_DDM_CPLDQ - ARK_DDM_MRDQ) -
118 sizeof(struct ark_ddm_mrdq_t)];
119 struct ark_ddm_cpldq_t cpldq;
120 uint8_t reserved3[(ARK_DDM_MRD_PS - ARK_DDM_CPLDQ) -
121 sizeof(struct ark_ddm_cpldq_t)];
122 struct ark_ddm_mrd_ps_t mrd_ps;
123 struct ark_ddm_qstats_t queue_stats;
124 struct ark_ddm_cpld_ps_t cpld_ps;
125 uint8_t reserved5[(ARK_DDM_SETUP - ARK_DDM_CPLD_PS) -
126 sizeof(struct ark_ddm_cpld_ps_t)];
127 struct ark_ddm_setup_t setup;
128 uint8_t reserved_p[(ARK_DDM_EXPECTED_SIZE - ARK_DDM_SETUP) -
129 sizeof(struct ark_ddm_setup_t)];
133 /* DDM function prototype */
134 int ark_ddm_verify(struct ark_ddm_t *ddm);
135 void ark_ddm_start(struct ark_ddm_t *ddm);
136 int ark_ddm_stop(struct ark_ddm_t *ddm, const int wait);
137 void ark_ddm_reset(struct ark_ddm_t *ddm);
138 void ark_ddm_stats_reset(struct ark_ddm_t *ddm);
139 void ark_ddm_setup(struct ark_ddm_t *ddm, rte_iova_t cons_addr,
141 void ark_ddm_dump_stats(struct ark_ddm_t *ddm, const char *msg);
142 void ark_ddm_dump(struct ark_ddm_t *ddm, const char *msg);
143 int ark_ddm_is_stopped(struct ark_ddm_t *ddm);
144 uint64_t ark_ddm_queue_byte_count(struct ark_ddm_t *ddm);
145 uint64_t ark_ddm_queue_pkt_count(struct ark_ddm_t *ddm);
146 void ark_ddm_queue_reset_stats(struct ark_ddm_t *ddm);