1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2021 Atomic Rules LLC
7 #include "ark_ethdev_tx.h"
8 #include "ark_global.h"
13 #define ARK_TX_META_SIZE 32
14 #define ARK_TX_META_OFFSET (RTE_PKTMBUF_HEADROOM - ARK_TX_META_SIZE)
15 #define ARK_TX_MAX_NOCHAIN (RTE_MBUF_DEFAULT_DATAROOM)
17 #ifndef RTE_LIBRTE_ARK_MIN_TX_PKTLEN
18 #define ARK_MIN_TX_PKTLEN 0
20 #define ARK_MIN_TX_PKTLEN RTE_LIBRTE_ARK_MIN_TX_PKTLEN
23 /* ************************************************************************* */
25 union ark_tx_meta *meta_q;
26 struct rte_mbuf **bufs;
28 /* handles for hw objects */
29 struct ark_mpu_t *mpu;
30 struct ark_ddm_t *ddm;
32 /* Stats HW tracks bytes and packets, need to count send errors */
35 tx_user_meta_hook_fn tx_user_meta_hook;
41 /* 3 indexes to the paired data rings. */
42 int32_t prod_index; /* where to put the next one */
43 int32_t free_index; /* mbuf has been freed */
45 /* The queue Id is used to identify the HW Q */
47 /* The queue Index within the dpdk device structures */
50 /* next cache line - fields written by device */
51 RTE_MARKER cacheline1 __rte_cache_min_aligned;
52 volatile int32_t cons_index; /* hw is done, can be freed */
53 } __rte_cache_aligned;
55 /* Forward declarations */
56 static int eth_ark_tx_jumbo(struct ark_tx_queue *queue,
57 struct rte_mbuf *mbuf,
58 uint32_t *user_meta, uint8_t meta_cnt);
59 static int eth_ark_tx_hw_queue_config(struct ark_tx_queue *queue);
60 static void free_completed_tx(struct ark_tx_queue *queue);
62 /* ************************************************************************* */
64 eth_ark_tx_desc_fill(struct ark_tx_queue *queue,
65 struct rte_mbuf *mbuf,
68 uint8_t meta_cnt /* 0 to 5 */
72 union ark_tx_meta *meta;
76 tx_idx = queue->prod_index & queue->queue_mask;
77 meta = &queue->meta_q[tx_idx];
78 meta->data_len = rte_pktmbuf_data_len(mbuf);
80 meta->meta_cnt = meta_cnt / 2;
81 meta->user1 = meta_cnt ? (*user_meta++) : 0;
84 queue->bufs[tx_idx] = mbuf;
86 /* 1 or 2 user meta data entries, user words 1,2 and 3,4 */
87 for (m = 1; m < meta_cnt; m += 2) {
88 tx_idx = queue->prod_index & queue->queue_mask;
89 meta = &queue->meta_q[tx_idx];
90 meta->usermeta0 = *user_meta++;
91 meta->usermeta1 = *user_meta++;
95 tx_idx = queue->prod_index & queue->queue_mask;
96 meta = &queue->meta_q[tx_idx];
97 meta->physaddr = rte_mbuf_data_iova(mbuf);
102 /* ************************************************************************* */
104 eth_ark_xmit_pkts(void *vtxq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
106 struct ark_tx_queue *queue;
107 struct rte_mbuf *mbuf;
108 uint32_t user_meta[5];
111 int32_t prod_index_limit;
113 uint8_t user_len = 0;
114 const uint32_t min_pkt_len = ARK_MIN_TX_PKTLEN;
115 tx_user_meta_hook_fn tx_user_meta_hook;
117 queue = (struct ark_tx_queue *)vtxq;
118 tx_user_meta_hook = queue->tx_user_meta_hook;
120 /* free any packets after the HW is done with them */
121 free_completed_tx(queue);
123 /* leave 4 elements mpu data */
124 prod_index_limit = queue->queue_size + queue->free_index - 4;
127 (nb < nb_pkts) && (prod_index_limit - queue->prod_index) > 0;
132 unlikely(rte_pktmbuf_pkt_len(mbuf) < min_pkt_len)) {
133 /* this packet even if it is small can be split,
134 * be sure to add to the end mbuf
136 uint16_t to_add = min_pkt_len -
137 rte_pktmbuf_pkt_len(mbuf);
139 rte_pktmbuf_append(mbuf, to_add);
142 /* This packet is in error,
143 * we cannot send it so just
144 * count it and delete it.
146 queue->tx_errors += 1;
147 rte_pktmbuf_free(mbuf);
150 memset(appended, 0, to_add);
153 if (tx_user_meta_hook)
154 tx_user_meta_hook(mbuf, user_meta, &user_len,
155 queue->ext_user_data);
156 if (unlikely(mbuf->nb_segs != 1)) {
157 stat = eth_ark_tx_jumbo(queue, mbuf,
158 user_meta, user_len);
159 if (unlikely(stat != 0))
160 break; /* Queue is full */
162 eth_ark_tx_desc_fill(queue, mbuf,
163 ARK_DDM_SOP | ARK_DDM_EOP,
164 user_meta, user_len);
168 if (ARK_DEBUG_CORE && nb != nb_pkts) {
169 ARK_PMD_LOG(DEBUG, "TX: Failure to send:"
174 " free: %" PRIU32 "\n",
179 ark_mpu_dump(queue->mpu,
184 /* let FPGA know producer index. */
186 ark_mpu_set_producer(queue->mpu, queue->prod_index);
191 /* ************************************************************************* */
193 eth_ark_tx_jumbo(struct ark_tx_queue *queue, struct rte_mbuf *mbuf,
194 uint32_t *user_meta, uint8_t meta_cnt)
196 struct rte_mbuf *next;
197 int32_t free_queue_space;
198 uint8_t flags = ARK_DDM_SOP;
200 free_queue_space = queue->queue_mask -
201 (queue->prod_index - queue->free_index);
202 /* We need up to 4 mbufs for first header and 2 for subsequent ones */
203 if (unlikely(free_queue_space < (2 + (2 * mbuf->nb_segs))))
206 while (mbuf != NULL) {
208 flags |= (next == NULL) ? ARK_DDM_EOP : 0;
210 eth_ark_tx_desc_fill(queue, mbuf, flags, user_meta, meta_cnt);
212 flags &= ~ARK_DDM_SOP; /* drop SOP flags */
213 meta_cnt = 0; /* Meta only on SOP */
220 /* ************************************************************************* */
222 eth_ark_tx_queue_setup(struct rte_eth_dev *dev,
225 unsigned int socket_id,
226 const struct rte_eth_txconf *tx_conf __rte_unused)
228 struct ark_adapter *ark = dev->data->dev_private;
229 struct ark_tx_queue *queue;
232 int qidx = queue_idx;
234 if (!rte_is_power_of_2(nb_desc)) {
236 "DPDK Arkville configuration queue size"
237 " must be power of two %u (%s)\n",
242 /* Each packet requires at least 2 mpu elements - double desc count */
243 nb_desc = 2 * nb_desc;
245 /* Allocate queue struct */
246 queue = rte_zmalloc_socket("Ark_txqueue",
247 sizeof(struct ark_tx_queue),
251 ARK_PMD_LOG(ERR, "Failed to allocate tx "
252 "queue memory in %s\n",
257 /* we use zmalloc no need to initialize fields */
258 queue->queue_size = nb_desc;
259 queue->queue_mask = nb_desc - 1;
260 queue->phys_qid = qidx;
261 queue->queue_index = queue_idx;
262 dev->data->tx_queues[queue_idx] = queue;
263 queue->tx_user_meta_hook = ark->user_ext.tx_user_meta_hook;
264 queue->ext_user_data = ark->user_data[dev->data->port_id];
267 rte_zmalloc_socket("Ark_txqueue meta",
268 nb_desc * sizeof(union ark_tx_meta),
272 rte_zmalloc_socket("Ark_txqueue bufs",
273 nb_desc * sizeof(struct rte_mbuf *),
277 if (queue->meta_q == 0 || queue->bufs == 0) {
278 ARK_PMD_LOG(ERR, "Failed to allocate "
279 "queue memory in %s\n", __func__);
280 rte_free(queue->meta_q);
281 rte_free(queue->bufs);
286 queue->ddm = RTE_PTR_ADD(ark->ddm.v, qidx * ARK_DDM_QOFFSET);
287 queue->mpu = RTE_PTR_ADD(ark->mputx.v, qidx * ARK_MPU_QOFFSET);
289 status = eth_ark_tx_hw_queue_config(queue);
291 if (unlikely(status != 0)) {
292 rte_free(queue->meta_q);
293 rte_free(queue->bufs);
295 return -1; /* ERROR CODE */
301 /* ************************************************************************* */
303 eth_ark_tx_hw_queue_config(struct ark_tx_queue *queue)
305 rte_iova_t queue_base, ring_base, cons_index_addr;
307 /* Verify HW -- MPU */
308 if (ark_mpu_verify(queue->mpu, sizeof(union ark_tx_meta)))
311 queue_base = rte_malloc_virt2iova(queue);
312 ring_base = rte_malloc_virt2iova(queue->meta_q);
314 queue_base + offsetof(struct ark_tx_queue, cons_index);
316 ark_mpu_stop(queue->mpu);
317 ark_mpu_reset(queue->mpu);
319 /* Stop and Reset and configure MPU */
320 ark_mpu_configure(queue->mpu, ring_base, queue->queue_size, 1);
322 /* Completion address in UDM */
323 ark_ddm_queue_setup(queue->ddm, cons_index_addr);
324 ark_ddm_queue_reset_stats(queue->ddm);
329 /* ************************************************************************* */
331 eth_ark_tx_queue_release(void *vtx_queue)
333 struct ark_tx_queue *queue;
335 queue = (struct ark_tx_queue *)vtx_queue;
337 ark_ddm_queue_enable(queue->ddm, 0);
338 ark_mpu_stop(queue->mpu);
340 queue->cons_index = queue->prod_index;
341 free_completed_tx(queue);
343 rte_free(queue->meta_q);
344 rte_free(queue->bufs);
348 /* ************************************************************************* */
350 eth_ark_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
352 struct ark_tx_queue *queue;
355 queue = dev->data->tx_queues[queue_id];
357 /* Wait for DDM to send out all packets. */
358 while (queue->cons_index != queue->prod_index) {
364 ark_ddm_queue_enable(queue->ddm, 0);
365 ark_mpu_stop(queue->mpu);
366 free_completed_tx(queue);
368 dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
374 eth_ark_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
376 struct ark_tx_queue *queue;
378 queue = dev->data->tx_queues[queue_id];
379 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_STARTED)
382 ark_mpu_start(queue->mpu);
383 ark_ddm_queue_enable(queue->ddm, 1);
384 dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
389 /* ************************************************************************* */
391 free_completed_tx(struct ark_tx_queue *queue)
393 struct rte_mbuf *mbuf;
394 union ark_tx_meta *meta;
397 top_index = queue->cons_index; /* read once */
398 while ((top_index - queue->free_index) > 0) {
399 meta = &queue->meta_q[queue->free_index & queue->queue_mask];
400 if (likely((meta->flags & ARK_DDM_SOP) != 0)) {
401 mbuf = queue->bufs[queue->free_index &
403 /* ref count of the mbuf is checked in this call. */
404 rte_pktmbuf_free(mbuf);
406 queue->free_index += (meta->meta_cnt + 2);
410 /* ************************************************************************* */
412 eth_tx_queue_stats_get(void *vqueue, struct rte_eth_stats *stats)
414 struct ark_tx_queue *queue;
415 struct ark_ddm_t *ddm;
416 uint64_t bytes, pkts;
421 bytes = ark_ddm_queue_byte_count(ddm);
422 pkts = ark_ddm_queue_pkt_count(ddm);
424 stats->q_opackets[queue->queue_index] = pkts;
425 stats->q_obytes[queue->queue_index] = bytes;
426 stats->opackets += pkts;
427 stats->obytes += bytes;
428 stats->oerrors += queue->tx_errors;
432 eth_tx_queue_stats_reset(void *vqueue)
434 struct ark_tx_queue *queue;
435 struct ark_ddm_t *ddm;
440 ark_ddm_queue_reset_stats(ddm);
441 queue->tx_errors = 0;