4 * Copyright (c) 2015-2017 Atomic Rules LLC
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ark_api_num_queues(struct ark_mpu_t *mpu)
42 return mpu->hw.num_queues;
46 ark_api_num_queues_per_port(struct ark_mpu_t *mpu, uint16_t ark_ports)
48 return mpu->hw.num_queues / ark_ports;
52 ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size)
56 version = mpu->id.vernum & 0x0000fF00;
57 if ((mpu->id.idnum != 0x2055504d) ||
58 (mpu->hw.obj_size != obj_size) ||
59 (version != 0x00003100)) {
61 " MPU module not found as expected %08x"
62 " \"%c%c%c%c %c%c%c%c\"\n",
64 mpu->id.id[0], mpu->id.id[1],
65 mpu->id.id[2], mpu->id.id[3],
66 mpu->id.ver[0], mpu->id.ver[1],
67 mpu->id.ver[2], mpu->id.ver[3]);
69 " MPU HW num_queues: %u hw_depth %u,"
70 " obj_size: %u, obj_per_mrr: %u"
71 " Expected size %u\n",
83 ark_mpu_stop(struct ark_mpu_t *mpu)
85 mpu->cfg.command = MPU_CMD_STOP;
89 ark_mpu_start(struct ark_mpu_t *mpu)
91 mpu->cfg.command = MPU_CMD_RUN;
95 ark_mpu_reset(struct ark_mpu_t *mpu)
99 mpu->cfg.command = MPU_CMD_RESET;
101 while (mpu->cfg.command != MPU_CMD_IDLE) {
106 if (mpu->cfg.command != MPU_CMD_IDLE) {
107 mpu->cfg.command = MPU_CMD_FORCE_RESET;
110 ark_mpu_reset_stats(mpu);
111 return mpu->cfg.command != MPU_CMD_IDLE;
115 ark_mpu_reset_stats(struct ark_mpu_t *mpu)
117 mpu->stats.pci_request = 1; /* reset stats */
121 ark_mpu_configure(struct ark_mpu_t *mpu, phys_addr_t ring, uint32_t ring_size,
126 if (!rte_is_power_of_2(ring_size)) {
127 PMD_DRV_LOG(ERR, "ARK: Invalid ring size for MPU %d\n",
132 mpu->cfg.ring_base = ring;
133 mpu->cfg.ring_size = ring_size;
134 mpu->cfg.ring_mask = ring_size - 1;
135 mpu->cfg.min_host_move = is_tx ? 1 : mpu->hw.obj_per_mrr;
136 mpu->cfg.min_hw_move = mpu->hw.obj_per_mrr;
137 mpu->cfg.sw_prod_index = 0;
138 mpu->cfg.hw_cons_index = 0;
143 ark_mpu_dump(struct ark_mpu_t *mpu, const char *code, uint16_t qid)
145 /* DUMP to see that we have started */
146 PMD_DEBUG_LOG(DEBUG, "MPU: %s Q: %3u sw_prod %u, hw_cons: %u\n",
148 mpu->cfg.sw_prod_index, mpu->cfg.hw_cons_index);
149 PMD_DEBUG_LOG(DEBUG, "MPU: %s state: %d count %d, reserved %d"
150 " data 0x%08x_%08x 0x%08x_%08x\n",
152 mpu->debug.state, mpu->debug.count,
159 PMD_STATS_LOG(INFO, "MPU: %s Q: %3u"
160 ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64
161 ARK_SU64 ARK_SU64 ARK_SU64 "\n",
163 "PCI Request:", mpu->stats.pci_request,
164 "Queue_empty", mpu->stats.q_empty,
165 "Queue_q1", mpu->stats.q_q1,
166 "Queue_q2", mpu->stats.q_q2,
167 "Queue_q3", mpu->stats.q_q3,
168 "Queue_q4", mpu->stats.q_q4,
169 "Queue_full", mpu->stats.q_full
174 ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t q_id)
176 PMD_DEBUG_LOG(DEBUG, "MPU Setup Q: %u"
179 "ring_base", mpu->cfg.ring_base