1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2018 Atomic Rules LLC
10 static_assert(sizeof(struct ark_rx_meta) == 32, "Unexpected struct size ark_rx_meta");
13 ark_udm_verify(struct ark_udm_t *udm)
15 if (sizeof(struct ark_udm_t) != ARK_UDM_EXPECT_SIZE) {
17 "ARK: UDM structure looks incorrect %d vs %zd\n",
18 ARK_UDM_EXPECT_SIZE, sizeof(struct ark_udm_t));
22 if (udm->setup.const0 != ARK_UDM_CONST) {
24 "ARK: UDM module not found as expected 0x%08x\n",
32 ark_udm_stop(struct ark_udm_t *udm, const int wait)
40 while (wait && (udm->cfg.stop_flushed & 0x01) == 0) {
50 ark_udm_reset(struct ark_udm_t *udm)
54 status = ark_udm_stop(udm, 1);
56 ARK_PMD_LOG(NOTICE, "%s stop failed doing forced reset\n",
61 status = ark_udm_stop(udm, 0);
62 ARK_PMD_LOG(INFO, "%s stop status %d post failure"
63 " and forced reset\n",
73 ark_udm_start(struct ark_udm_t *udm)
75 udm->setup.r0 = 0x100;
80 ark_udm_stats_reset(struct ark_udm_t *udm)
82 udm->pcibp.pci_clear = 1;
83 udm->tlp_ps.tlp_clear = 1;
87 ark_udm_configure(struct ark_udm_t *udm,
90 uint32_t write_interval_ns)
92 /* headroom and data room are in DWords in the UDM */
93 udm->cfg.dataroom = dataroom / 4;
94 udm->cfg.headroom = headroom / 4;
97 udm->rt_cfg.write_interval = write_interval_ns / 4;
101 ark_udm_write_addr(struct ark_udm_t *udm, rte_iova_t addr)
103 udm->rt_cfg.hw_prod_addr = addr;
107 ark_udm_is_flushed(struct ark_udm_t *udm)
109 return (udm->cfg.stop_flushed & 0x01) != 0;
113 ark_udm_dropped(struct ark_udm_t *udm)
115 return udm->qstats.q_pkt_drop;
119 ark_udm_bytes(struct ark_udm_t *udm)
121 return udm->qstats.q_byte_count;
125 ark_udm_packets(struct ark_udm_t *udm)
127 return udm->qstats.q_ff_packet_count;
131 ark_udm_dump_stats(struct ark_udm_t *udm, const char *msg)
133 ARK_PMD_LOG(INFO, "UDM Stats: %s"
134 ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64 ARK_SU64 "\n",
136 "Pkts Received", udm->stats.rx_packet_count,
137 "Pkts Finalized", udm->stats.rx_sent_packets,
138 "Pkts Dropped", udm->tlp.pkt_drop,
139 "Bytes Count", udm->stats.rx_byte_count,
140 "MBuf Count", udm->stats.rx_mbuf_count);
144 ark_udm_dump_queue_stats(struct ark_udm_t *udm, const char *msg, uint16_t qid)
146 ARK_PMD_LOG(INFO, "UDM Queue %3u Stats: %s"
151 "Pkts Received", udm->qstats.q_packet_count,
152 "Pkts Finalized", udm->qstats.q_ff_packet_count,
153 "Pkts Dropped", udm->qstats.q_pkt_drop,
154 "Bytes Count", udm->qstats.q_byte_count,
155 "MBuf Count", udm->qstats.q_mbuf_count);
159 ark_udm_dump(struct ark_udm_t *udm, const char *msg)
161 ARK_PMD_LOG(DEBUG, "UDM Dump: %s Stopped: %d\n", msg,
162 udm->cfg.stop_flushed);
166 ark_udm_dump_setup(struct ark_udm_t *udm, uint16_t q_id)
168 ARK_PMD_LOG(DEBUG, "UDM Setup Q: %u"
169 ARK_SU64X ARK_SU32 "\n",
171 "hw_prod_addr", udm->rt_cfg.hw_prod_addr,
172 "prod_idx", udm->rt_cfg.prod_idx);
176 ark_udm_dump_perf(struct ark_udm_t *udm, const char *msg)
178 struct ark_udm_pcibp_t *bp = &udm->pcibp;
180 ARK_PMD_LOG(INFO, "UDM Performance %s"
181 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32 ARK_SU32
184 "PCI Empty", bp->pci_empty,
185 "PCI Q1", bp->pci_q1,
186 "PCI Q2", bp->pci_q2,
187 "PCI Q3", bp->pci_q3,
188 "PCI Q4", bp->pci_q4,
189 "PCI Full", bp->pci_full);
193 ark_udm_queue_stats_reset(struct ark_udm_t *udm)
195 udm->qstats.q_byte_count = 1;
199 ark_udm_queue_enable(struct ark_udm_t *udm, int enable)
201 udm->qstats.q_enable = enable ? 1 : 0;