1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Aquantia Corporation
5 #include <rte_ethdev_pci.h>
7 #include "atl_ethdev.h"
8 #include "atl_common.h"
9 #include "atl_hw_regs.h"
11 #include "hw_atl/hw_atl_llh.h"
12 #include "hw_atl/hw_atl_b0.h"
13 #include "hw_atl/hw_atl_b0_internal.h"
15 static int eth_atl_dev_init(struct rte_eth_dev *eth_dev);
16 static int eth_atl_dev_uninit(struct rte_eth_dev *eth_dev);
18 static int atl_dev_configure(struct rte_eth_dev *dev);
19 static int atl_dev_start(struct rte_eth_dev *dev);
20 static void atl_dev_stop(struct rte_eth_dev *dev);
21 static void atl_dev_close(struct rte_eth_dev *dev);
22 static int atl_dev_reset(struct rte_eth_dev *dev);
24 static int atl_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
27 static void atl_dev_info_get(struct rte_eth_dev *dev,
28 struct rte_eth_dev_info *dev_info);
30 static const uint32_t *atl_dev_supported_ptypes_get(struct rte_eth_dev *dev);
32 static int eth_atl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
33 struct rte_pci_device *pci_dev);
34 static int eth_atl_pci_remove(struct rte_pci_device *pci_dev);
36 static void atl_dev_info_get(struct rte_eth_dev *dev,
37 struct rte_eth_dev_info *dev_info);
40 int atl_logtype_driver;
43 * The set of PCI devices this driver supports
45 static const struct rte_pci_id pci_id_atl_map[] = {
46 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_0001) },
47 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_D100) },
48 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_D107) },
49 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_D108) },
50 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_D109) },
52 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC100) },
53 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC107) },
54 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC108) },
55 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC109) },
56 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC111) },
57 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC112) },
59 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC100S) },
60 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC107S) },
61 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC108S) },
62 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC109S) },
63 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC111S) },
64 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC112S) },
66 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC111E) },
67 { RTE_PCI_DEVICE(PCI_VENDOR_ID_AQUANTIA, AQ_DEVICE_ID_AQC112E) },
68 { .vendor_id = 0, /* sentinel */ },
71 static struct rte_pci_driver rte_atl_pmd = {
72 .id_table = pci_id_atl_map,
73 .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
74 RTE_PCI_DRV_IOVA_AS_VA,
75 .probe = eth_atl_pci_probe,
76 .remove = eth_atl_pci_remove,
79 #define ATL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_STRIP \
80 | DEV_RX_OFFLOAD_IPV4_CKSUM \
81 | DEV_RX_OFFLOAD_UDP_CKSUM \
82 | DEV_RX_OFFLOAD_TCP_CKSUM \
83 | DEV_RX_OFFLOAD_JUMBO_FRAME)
85 static const struct rte_eth_desc_lim rx_desc_lim = {
86 .nb_max = ATL_MAX_RING_DESC,
87 .nb_min = ATL_MIN_RING_DESC,
88 .nb_align = ATL_RXD_ALIGN,
91 static const struct eth_dev_ops atl_eth_dev_ops = {
92 .dev_configure = atl_dev_configure,
93 .dev_start = atl_dev_start,
94 .dev_stop = atl_dev_stop,
95 .dev_close = atl_dev_close,
96 .dev_reset = atl_dev_reset,
98 .fw_version_get = atl_fw_version_get,
99 .dev_infos_get = atl_dev_info_get,
100 .dev_supported_ptypes_get = atl_dev_supported_ptypes_get,
103 .rx_queue_start = atl_rx_queue_start,
104 .rx_queue_stop = atl_rx_queue_stop,
105 .rx_queue_setup = atl_rx_queue_setup,
106 .rx_queue_release = atl_rx_queue_release,
109 static inline int32_t
110 atl_reset_hw(struct aq_hw_s *hw)
112 return hw_atl_b0_hw_reset(hw);
116 eth_atl_dev_init(struct rte_eth_dev *eth_dev)
118 struct atl_adapter *adapter =
119 (struct atl_adapter *)eth_dev->data->dev_private;
120 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
121 struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
124 PMD_INIT_FUNC_TRACE();
126 eth_dev->dev_ops = &atl_eth_dev_ops;
127 eth_dev->rx_pkt_burst = &atl_recv_pkts;
128 eth_dev->tx_pkt_burst = &atl_xmit_pkts;
129 eth_dev->tx_pkt_prepare = &atl_prep_pkts;
131 /* For secondary processes, the primary process has done all the work */
132 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
135 /* Vendor and Device ID need to be set before init of shared code */
136 hw->device_id = pci_dev->id.device_id;
137 hw->vendor_id = pci_dev->id.vendor_id;
138 hw->mmio = (void *)pci_dev->mem_resource[0].addr;
140 /* Hardware configuration - hardcode */
141 adapter->hw_cfg.is_lro = false;
142 adapter->hw_cfg.wol = false;
144 hw->aq_nic_cfg = &adapter->hw_cfg;
146 /* Allocate memory for storing MAC addresses */
147 eth_dev->data->mac_addrs = rte_zmalloc("atlantic", ETHER_ADDR_LEN, 0);
148 if (eth_dev->data->mac_addrs == NULL) {
149 PMD_INIT_LOG(ERR, "MAC Malloc failed");
153 err = hw_atl_utils_initfw(hw, &hw->aq_fw_ops);
157 /* Copy the permanent MAC address */
158 if (hw->aq_fw_ops->get_mac_permanent(hw,
159 eth_dev->data->mac_addrs->addr_bytes) != 0)
166 eth_atl_dev_uninit(struct rte_eth_dev *eth_dev)
170 PMD_INIT_FUNC_TRACE();
172 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
175 hw = ATL_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
177 if (hw->adapter_stopped == 0)
178 atl_dev_close(eth_dev);
180 eth_dev->dev_ops = NULL;
181 eth_dev->rx_pkt_burst = NULL;
182 eth_dev->tx_pkt_burst = NULL;
184 rte_free(eth_dev->data->mac_addrs);
185 eth_dev->data->mac_addrs = NULL;
191 eth_atl_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
192 struct rte_pci_device *pci_dev)
194 return rte_eth_dev_pci_generic_probe(pci_dev,
195 sizeof(struct atl_adapter), eth_atl_dev_init);
199 eth_atl_pci_remove(struct rte_pci_device *pci_dev)
201 return rte_eth_dev_pci_generic_remove(pci_dev, eth_atl_dev_uninit);
205 atl_dev_configure(struct rte_eth_dev *dev __rte_unused)
211 * Configure device link speed and setup link.
212 * It returns 0 on success.
215 atl_dev_start(struct rte_eth_dev *dev)
217 struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
221 PMD_INIT_FUNC_TRACE();
223 /* set adapter started */
224 hw->adapter_stopped = 0;
226 /* reinitialize adapter
227 * this calls reset and start
229 status = atl_reset_hw(hw);
233 err = hw_atl_b0_hw_init(hw, dev->data->mac_addrs->addr_bytes);
235 hw_atl_b0_hw_start(hw);
236 /* initialize transmission unit */
239 /* This can fail when allocating mbufs for descriptor rings */
240 err = atl_rx_init(dev);
242 PMD_INIT_LOG(ERR, "Unable to initialize RX hardware");
246 PMD_INIT_LOG(DEBUG, "FW version: %u.%u.%u",
247 hw->fw_ver_actual >> 24,
248 (hw->fw_ver_actual >> 16) & 0xFF,
249 hw->fw_ver_actual & 0xFFFF);
250 PMD_INIT_LOG(DEBUG, "Driver version: %s", ATL_PMD_DRIVER_VERSION);
252 err = atl_start_queues(dev);
254 PMD_INIT_LOG(ERR, "Unable to start rxtx queues");
261 atl_stop_queues(dev);
266 * Stop device: disable rx and tx functions to allow for reconfiguring.
269 atl_dev_stop(struct rte_eth_dev *dev)
272 ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
276 hw->adapter_stopped = 1;
278 atl_stop_queues(dev);
280 /* Clear stored conf */
281 dev->data->scattered_rx = 0;
286 * Reset and stop device.
289 atl_dev_close(struct rte_eth_dev *dev)
291 PMD_INIT_FUNC_TRACE();
295 atl_free_queues(dev);
299 atl_dev_reset(struct rte_eth_dev *dev)
303 ret = eth_atl_dev_uninit(dev);
307 ret = eth_atl_dev_init(dev);
313 atl_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
315 struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
317 unsigned int ret = 0;
319 ret = hw_atl_utils_get_fw_version(hw, &fw_ver);
323 ret = snprintf(fw_version, fw_size, "%u.%u.%u", fw_ver >> 24,
324 (fw_ver >> 16) & 0xFFU, fw_ver & 0xFFFFU);
326 ret += 1; /* add string null-terminator */
335 atl_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
337 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
339 dev_info->max_rx_queues = AQ_HW_MAX_RX_QUEUES;
340 dev_info->max_tx_queues = AQ_HW_MAX_TX_QUEUES;
342 dev_info->min_rx_bufsize = 1024;
343 dev_info->max_rx_pktlen = HW_ATL_B0_MTU_JUMBO;
344 dev_info->max_mac_addrs = HW_ATL_B0_MAC_MAX;
345 dev_info->max_vfs = pci_dev->max_vfs;
347 dev_info->max_hash_mac_addrs = 0;
348 dev_info->max_vmdq_pools = 0;
349 dev_info->vmdq_queue_num = 0;
351 dev_info->rx_offload_capa = ATL_RX_OFFLOADS;
353 dev_info->default_rxconf = (struct rte_eth_rxconf) {
354 .rx_free_thresh = ATL_DEFAULT_RX_FREE_THRESH,
357 dev_info->rx_desc_lim = rx_desc_lim;
360 static const uint32_t *
361 atl_dev_supported_ptypes_get(struct rte_eth_dev *dev)
363 static const uint32_t ptypes[] = {
365 RTE_PTYPE_L2_ETHER_ARP,
366 RTE_PTYPE_L2_ETHER_VLAN,
376 if (dev->rx_pkt_burst == atl_recv_pkts)
382 RTE_PMD_REGISTER_PCI(net_atlantic, rte_atl_pmd);
383 RTE_PMD_REGISTER_PCI_TABLE(net_atlantic, pci_id_atl_map);
384 RTE_PMD_REGISTER_KMOD_DEP(net_atlantic, "* igb_uio | uio_pci_generic");
386 RTE_INIT(atl_init_log)
388 atl_logtype_init = rte_log_register("pmd.net.atlantic.init");
389 if (atl_logtype_init >= 0)
390 rte_log_set_level(atl_logtype_init, RTE_LOG_NOTICE);
391 atl_logtype_driver = rte_log_register("pmd.net.atlantic.driver");
392 if (atl_logtype_driver >= 0)
393 rte_log_set_level(atl_logtype_driver, RTE_LOG_NOTICE);