drivers/net/atlantic/hw_atl/hw_atl_utils.h

   1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) */
   2 /* Copyright (C) 2014-2017 aQuantia Corporation. */
   3
   4 /* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
   5  * abstraction layer.
   6  */
   7
   8 #ifndef HW_ATL_UTILS_H
   9 #define HW_ATL_UTILS_H
  10
  11 #define BIT(x)  (1UL << (x))
  12 #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
  13
  14 /* Hardware tx descriptor */
  15 struct hw_atl_txd_s {
  16         u64 buf_addr;
  17
  18         union {
  19                 struct {
  20                         u32 type:3;
  21                         u32:1;
  22                         u32 len:16;
  23                         u32 dd:1;
  24                         u32 eop:1;
  25                         u32 cmd:8;
  26                         u32:14;
  27                         u32 ct_idx:1;
  28                         u32 ct_en:1;
  29                         u32 pay_len:18;
  30                 } __attribute__((__packed__));
  31                 u64 flags;
  32         };
  33 } __attribute__((__packed__));
  34
  35 /* Hardware tx context descriptor */
  36 union hw_atl_txc_s {
  37         struct {
  38                 u64 flags1;
  39                 u64 flags2;
  40         };
  41
  42         struct {
  43                 u64:40;
  44                 u32 tun_len:8;
  45                 u32 out_len:16;
  46                 u32 type:3;
  47                 u32 idx:1;
  48                 u32 vlan_tag:16;
  49                 u32 cmd:4;
  50                 u32 l2_len:7;
  51                 u32 l3_len:9;
  52                 u32 l4_len:8;
  53                 u32 mss_len:16;
  54         } __attribute__((__packed__));
  55 } __attribute__((__packed__));
  56
  57 enum aq_tx_desc_type {
  58         tx_desc_type_desc = 1,
  59         tx_desc_type_ctx = 2,
  60 };
  61
  62 enum aq_tx_desc_cmd {
  63         tx_desc_cmd_vlan = 1,
  64         tx_desc_cmd_fcs = 2,
  65         tx_desc_cmd_ipv4 = 4,
  66         tx_desc_cmd_l4cs = 8,
  67         tx_desc_cmd_lso = 0x10,
  68         tx_desc_cmd_wb = 0x20,
  69 };
  70
  71
  72 /* Hardware rx descriptor */
  73 struct hw_atl_rxd_s {
  74         u64 buf_addr;
  75         u64 hdr_addr;
  76 } __attribute__((__packed__));
  77
  78 /* Hardware rx descriptor writeback */
  79 struct hw_atl_rxd_wb_s {
  80         u32 rss_type:4;
  81         u32 pkt_type:8;
  82         u32 type:20;
  83         u32 rss_hash;
  84         u16 dd:1;
  85         u16 eop:1;
  86         u16 rx_stat:4;
  87         u16 rx_estat:6;
  88         u16 rsc_cnt:4;
  89         u16 pkt_len;
  90         u16 next_desc_ptr;
  91         u16 vlan;
  92 } __attribute__((__packed__));
  93
  94 struct hw_atl_stats_s {
  95         u32 uprc;
  96         u32 mprc;
  97         u32 bprc;
  98         u32 erpt;
  99         u32 uptc;
 100         u32 mptc;
 101         u32 bptc;
 102         u32 erpr;
 103         u32 mbtc;
 104         u32 bbtc;
 105         u32 mbrc;
 106         u32 bbrc;
 107         u32 ubrc;
 108         u32 ubtc;
 109         u32 dpc;
 110 } __attribute__((__packed__));
 111
 112 union ip_addr {
 113         struct {
 114                 u8 addr[16];
 115         } v6;
 116         struct {
 117                 u8 padding[12];
 118                 u8 addr[4];
 119         } v4;
 120 } __attribute__((__packed__));
 121
 122 struct hw_aq_atl_utils_fw_rpc {
 123         u32 msg_id;
 124
 125         union {
 126                 struct {
 127                         u32 pong;
 128                 } msg_ping;
 129
 130                 struct {
 131                         u8 mac_addr[6];
 132                         u32 ip_addr_cnt;
 133
 134                         struct {
 135                                 union ip_addr addr;
 136                                 union ip_addr mask;
 137                         } ip[1];
 138                 } msg_arp;
 139
 140                 struct {
 141                         u32 len;
 142                         u8 packet[1514U];
 143                 } msg_inject;
 144
 145                 struct {
 146                         u32 priority;
 147                         u32 wol_packet_type;
 148                         u32 pattern_id;
 149                         u32 next_wol_pattern_offset;
 150                         union {
 151                                 struct {
 152                                         u32 flags;
 153                                         u8 ipv4_source_address[4];
 154                                         u8 ipv4_dest_address[4];
 155                                         u16 tcp_source_port_number;
 156                                         u16 tcp_dest_port_number;
 157                                 } ipv4_tcp_syn_parameters;
 158
 159                                 struct {
 160                                         u32 flags;
 161                                         u8 ipv6_source_address[16];
 162                                         u8 ipv6_dest_address[16];
 163                                         u16 tcp_source_port_number;
 164                                         u16 tcp_dest_port_number;
 165                                 } ipv6_tcp_syn_parameters;
 166
 167                                 struct {
 168                                         u32 flags;
 169                                 } eapol_request_id_message_parameters;
 170
 171                                 struct {
 172                                         u32 flags;
 173                                         u32 mask_offset;
 174                                         u32 mask_size;
 175                                         u32 pattern_offset;
 176                                         u32 pattern_size;
 177                                 } wol_bit_map_pattern;
 178                                 struct {
 179                                         u8 mac_addr[6];
 180                                 } wol_magic_packet_pattern;
 181
 182                         } wol_pattern;
 183                 } msg_wol;
 184
 185                 struct {
 186                         u16 tc_quanta[8];
 187                         u16 tc_threshold[8];
 188                 } msg_msm_pfc_quantas;
 189
 190                 struct {
 191                         union {
 192                                 u32 pattern_mask;
 193                                 struct {
 194                                         u32 aq_pm_wol_reason_arp_v4_pkt : 1;
 195                                         u32 aq_pm_wol_reason_ipv4_ping_pkt : 1;
 196                                         u32 aq_pm_wol_reason_ipv6_ns_pkt : 1;
 197                                         u32 aq_pm_wol_reason_ipv6_ping_pkt : 1;
 198                                         u32 aq_pm_wol_reason_link_up : 1;
 199                                         u32 aq_pm_wol_reason_link_down : 1;
 200                                         u32 aq_pm_wol_reason_maximum : 1;
 201                                 };
 202                         };
 203                         union {
 204                                 u32 offload_mask;
 205                         };
 206                 } msg_enable_wakeup;
 207
 208                 struct {
 209                         u32 priority;
 210                         u32 protocol_offload_type;
 211                         u32 protocol_offload_id;
 212                         u32 next_protocol_offload_offset;
 213
 214                         union {
 215                                 struct {
 216                                         u32 flags;
 217                                         u8 remote_ipv4_addr[4];
 218                                         u8 host_ipv4_addr[4];
 219                                         u8 mac_addr[6];
 220                                 } ipv4_arp_params;
 221                         };
 222                 } msg_offload;
 223
 224                 struct {
 225                         u32 id;
 226                 } msg_del_id;
 227
 228         };
 229 } __attribute__((__packed__));
 230
 231 struct hw_aq_atl_utils_mbox_header {
 232         u32 version;
 233         u32 transaction_id;
 234         u32 error;
 235 } __attribute__((__packed__));
 236
 237 struct hw_aq_info {
 238         u8 reserved[6];
 239         u16 phy_fault_code;
 240         u16 phy_temperature;
 241         u8 cable_len;
 242         u8 reserved1;
 243         u32 cable_diag_data[4];
 244         u8 reserved2[32];
 245         u32 caps_lo;
 246         u32 caps_hi;
 247 } __attribute__((__packed__));
 248
 249 struct hw_aq_atl_utils_mbox {
 250         struct hw_aq_atl_utils_mbox_header header;
 251         struct hw_atl_stats_s stats;
 252         struct hw_aq_info info;
 253 } __attribute__((__packed__));
 254
 255 /* fw2x */
 256 typedef u16     in_port_t;
 257 typedef u32     ip4_addr_t;
 258 typedef int     int32_t;
 259 typedef short   int16_t;
 260 typedef u32     fw_offset_t;
 261
 262 struct ip6_addr {
 263         u32 addr[4];
 264 } __attribute__((__packed__));
 265
 266 struct offload_ka_v4 {
 267         u32 timeout;
 268         in_port_t local_port;
 269         in_port_t remote_port;
 270         u8 remote_mac_addr[6];
 271         u16 win_size;
 272         u32 seq_num;
 273         u32 ack_num;
 274         ip4_addr_t local_ip;
 275         ip4_addr_t remote_ip;
 276 } __attribute__((__packed__));
 277
 278 struct offload_ka_v6 {
 279         u32 timeout;
 280         in_port_t local_port;
 281         in_port_t remote_port;
 282         u8 remote_mac_addr[6];
 283         u16 win_size;
 284         u32 seq_num;
 285         u32 ack_num;
 286         struct ip6_addr local_ip;
 287         struct ip6_addr remote_ip;
 288 } __attribute__((__packed__));
 289
 290 struct offload_ip_info {
 291         u8 v4_local_addr_count;
 292         u8 v4_addr_count;
 293         u8 v6_local_addr_count;
 294         u8 v6_addr_count;
 295         fw_offset_t v4_addr;
 296         fw_offset_t v4_prefix;
 297         fw_offset_t v6_addr;
 298         fw_offset_t v6_prefix;
 299 } __attribute__((__packed__));
 300
 301 struct offload_port_info {
 302         u16 udp_port_count;
 303         u16 tcp_port_count;
 304         fw_offset_t udp_port;
 305         fw_offset_t tcp_port;
 306 } __attribute__((__packed__));
 307
 308 struct offload_ka_info {
 309         u16 v4_ka_count;
 310         u16 v6_ka_count;
 311         u32 retry_count;
 312         u32 retry_interval;
 313         fw_offset_t v4_ka;
 314         fw_offset_t v6_ka;
 315 } __attribute__((__packed__));
 316
 317 struct offload_rr_info {
 318         u32 rr_count;
 319         u32 rr_buf_len;
 320         fw_offset_t rr_id_x;
 321         fw_offset_t rr_buf;
 322 } __attribute__((__packed__));
 323
 324 struct offload_info {
 325         u32 version;            // current version is 0x00000000
 326         u32 len;                // The whole structure length
 327                                 // including the variable-size buf
 328         u8 mac_addr[6];         // 8 bytes to keep alignment. Only
 329                                 // first 6 meaningful.
 330
 331         u8 reserved[2];
 332
 333         struct offload_ip_info ips;
 334         struct offload_port_info ports;
 335         struct offload_ka_info kas;
 336         struct offload_rr_info rrs;
 337         u8 buf[0];
 338 } __attribute__((__packed__));
 339
 340 struct smbus_read_request {
 341         u32 offset; /* not used */
 342         u32 device_id;
 343         u32 address;
 344         u32 length;
 345 } __attribute__((__packed__));
 346
 347 struct smbus_write_request {
 348         u32 offset; /* not used */
 349         u32 device_id;
 350         u32 address;
 351         u32 length;
 352 } __attribute__((__packed__));
 353
 354 #define HAL_ATLANTIC_UTILS_CHIP_MIPS         0x00000001U
 355 #define HAL_ATLANTIC_UTILS_CHIP_TPO2         0x00000002U
 356 #define HAL_ATLANTIC_UTILS_CHIP_RPF2         0x00000004U
 357 #define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ       0x00000010U
 358 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0  0x01000000U
 359 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0  0x02000000U
 360 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B1  0x04000000U
 361
 362
 363 #define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
 364         self->chip_features)
 365
 366 enum hal_atl_utils_fw_state_e {
 367         MPI_DEINIT = 0,
 368         MPI_RESET = 1,
 369         MPI_INIT = 2,
 370         MPI_POWER = 4,
 371 };
 372
 373 #define HAL_ATLANTIC_RATE_10G        BIT(0)
 374 #define HAL_ATLANTIC_RATE_5G         BIT(1)
 375 #define HAL_ATLANTIC_RATE_5GSR       BIT(2)
 376 #define HAL_ATLANTIC_RATE_2GS        BIT(3)
 377 #define HAL_ATLANTIC_RATE_1G         BIT(4)
 378 #define HAL_ATLANTIC_RATE_100M       BIT(5)
 379 #define HAL_ATLANTIC_RATE_INVALID    BIT(6)
 380
 381 #define HAL_ATLANTIC_UTILS_FW_MSG_PING     1U
 382 #define HAL_ATLANTIC_UTILS_FW_MSG_ARP      2U
 383 #define HAL_ATLANTIC_UTILS_FW_MSG_INJECT   3U
 384 #define HAL_ATLANTIC_UTILS_FW_MSG_WOL_ADD 4U
 385 #define HAL_ATLANTIC_UTILS_FW_MSG_WOL_DEL 5U
 386 #define HAL_ATLANTIC_UTILS_FW_MSG_ENABLE_WAKEUP 6U
 387 #define HAL_ATLANTIC_UTILS_FW_MSG_MSM_PFC  7U
 388 #define HAL_ATLANTIC_UTILS_FW_MSG_PROVISIONING 8U
 389 #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_ADD  9U
 390 #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_DEL  10U
 391 #define HAL_ATLANTIC_UTILS_FW_MSG_CABLE_DIAG   13U // 0xd
 392
 393 #define SMBUS_DEVICE_ID 0x50
 394
 395 enum hw_atl_fw2x_caps_lo {
 396         CAPS_LO_10BASET_HD = 0x00,
 397         CAPS_LO_10BASET_FD,
 398         CAPS_LO_100BASETX_HD,
 399         CAPS_LO_100BASET4_HD,
 400         CAPS_LO_100BASET2_HD,
 401         CAPS_LO_100BASETX_FD,
 402         CAPS_LO_100BASET2_FD,
 403         CAPS_LO_1000BASET_HD,
 404         CAPS_LO_1000BASET_FD,
 405         CAPS_LO_2P5GBASET_FD,
 406         CAPS_LO_5GBASET_FD,
 407         CAPS_LO_10GBASET_FD,
 408         CAPS_LO_AUTONEG,
 409         CAPS_LO_SMBUS_READ,
 410         CAPS_LO_SMBUS_WRITE,
 411         CAPS_LO_MACSEC
 412 };
 413
 414 enum hw_atl_fw2x_caps_hi {
 415         CAPS_HI_RESERVED1 = 0x00,
 416         CAPS_HI_10BASET_EEE,
 417         CAPS_HI_RESERVED2,
 418         CAPS_HI_PAUSE,
 419         CAPS_HI_ASYMMETRIC_PAUSE,
 420         CAPS_HI_100BASETX_EEE,
 421         CAPS_HI_RESERVED3,
 422         CAPS_HI_RESERVED4,
 423         CAPS_HI_1000BASET_FD_EEE,
 424         CAPS_HI_2P5GBASET_FD_EEE,
 425         CAPS_HI_5GBASET_FD_EEE,
 426         CAPS_HI_10GBASET_FD_EEE,
 427         CAPS_HI_RESERVED5,
 428         CAPS_HI_RESERVED6,
 429         CAPS_HI_RESERVED7,
 430         CAPS_HI_RESERVED8,
 431         CAPS_HI_RESERVED9,
 432         CAPS_HI_CABLE_DIAG,
 433         CAPS_HI_TEMPERATURE,
 434         CAPS_HI_DOWNSHIFT,
 435         CAPS_HI_PTP_AVB_EN,
 436         CAPS_HI_MEDIA_DETECT,
 437         CAPS_HI_LINK_DROP,
 438         CAPS_HI_SLEEP_PROXY,
 439         CAPS_HI_WOL,
 440         CAPS_HI_MAC_STOP,
 441         CAPS_HI_EXT_LOOPBACK,
 442         CAPS_HI_INT_LOOPBACK,
 443         CAPS_HI_EFUSE_AGENT,
 444         CAPS_HI_WOL_TIMER,
 445         CAPS_HI_STATISTICS,
 446         CAPS_HI_TRANSACTION_ID,
 447 };
 448
 449 enum hw_atl_fw2x_rate {
 450         FW2X_RATE_100M    = BIT(CAPS_LO_100BASETX_FD),
 451         FW2X_RATE_1G      = BIT(CAPS_LO_1000BASET_FD),
 452         FW2X_RATE_2G5     = BIT(CAPS_LO_2P5GBASET_FD),
 453         FW2X_RATE_5G      = BIT(CAPS_LO_5GBASET_FD),
 454         FW2X_RATE_10G     = BIT(CAPS_LO_10GBASET_FD),
 455 };
 456
 457 struct aq_hw_s;
 458 struct aq_fw_ops;
 459 struct aq_hw_link_status_s;
 460
 461 int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops);
 462
 463 int hw_atl_utils_soft_reset(struct aq_hw_s *self);
 464
 465 void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);
 466
 467 int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
 468                                struct hw_aq_atl_utils_mbox_header *pmbox);
 469
 470 void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
 471                                  struct hw_aq_atl_utils_mbox *pmbox);
 472
 473 void hw_atl_utils_mpi_set(struct aq_hw_s *self,
 474                           enum hal_atl_utils_fw_state_e state,
 475                           u32 speed);
 476
 477 int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);
 478
 479 unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);
 480
 481 unsigned int hw_atl_utils_hw_get_reg_length(void);
 482
 483 int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
 484                              u32 *regs_buff);
 485
 486 int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
 487                               unsigned int power_state);
 488
 489 int hw_atl_utils_hw_deinit(struct aq_hw_s *self);
 490
 491 int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version);
 492
 493 int hw_atl_utils_update_stats(struct aq_hw_s *self);
 494
 495 struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self);
 496
 497 int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
 498                                   u32 *p, u32 cnt);
 499
 500 int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p,
 501                                 u32 cnt);
 502
 503 int hw_atl_utils_fw_set_wol(struct aq_hw_s *self, bool wol_enabled, u8 *mac);
 504
 505 int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size);
 506
 507 int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
 508                     struct hw_aq_atl_utils_fw_rpc **rpc);
 509
 510 extern const struct aq_fw_ops aq_fw_1x_ops;
 511 extern const struct aq_fw_ops aq_fw_2x_ops;
 512
 513 #endif /* HW_ATL_UTILS_H */