2 * Copyright (c) 2007-2013 QLogic Corporation. All rights reserved.
4 * Eric Davis <edavis@broadcom.com>
5 * David Christensen <davidch@broadcom.com>
6 * Gary Zambrano <zambrano@broadcom.com>
8 * Copyright (c) 2013-2015 Brocade Communications Systems, Inc.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of Broadcom Corporation nor the name of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written consent.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGE.
41 * Debug versions of the 8/16/32 bit OS register read/write functions to
42 * capture/display values read/written from/to the controller.
45 bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val)
47 PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
48 *((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
52 bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val)
54 if ((offset % 2) != 0) {
55 PMD_DRV_LOG(NOTICE, "Unaligned 16-bit write to 0x%08lx",
56 (unsigned long)offset);
59 PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%04x", (unsigned long)offset, val);
60 *((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
64 bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val)
66 if ((offset % 4) != 0) {
67 PMD_DRV_LOG(NOTICE, "Unaligned 32-bit write to 0x%08lx",
68 (unsigned long)offset);
71 PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
72 *((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
76 bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset)
80 val = (uint8_t)(*((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
81 PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
87 bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset)
91 if ((offset % 2) != 0) {
92 PMD_DRV_LOG(NOTICE, "Unaligned 16-bit read from 0x%08lx",
93 (unsigned long)offset);
96 val = (uint16_t)(*((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
97 PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
103 bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
107 if ((offset % 4) != 0) {
108 PMD_DRV_LOG(NOTICE, "Unaligned 32-bit read from 0x%08lx",
109 (unsigned long)offset);
113 val = (uint32_t)(*((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
114 PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);