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39 #include <sys/queue.h>
42 #include <rte_bus_pci.h>
43 #include <rte_ethdev.h>
44 #include <rte_memory.h>
45 #include <rte_lcore.h>
46 #include <rte_spinlock.h>
50 #define BNXT_MAX_MTU 9500
51 #define VLAN_TAG_SIZE 4
52 #define BNXT_MAX_LED 4
54 struct bnxt_led_info {
59 uint16_t led_state_caps;
60 #define BNXT_LED_ALT_BLINK_CAP(x) ((x) & \
61 rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
63 uint16_t led_color_caps;
71 uint16_t led_blink_on;
72 uint16_t led_blink_off;
77 #define BNXT_LED_DFLT_ENA \
78 (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID | \
79 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE | \
80 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON | \
81 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF | \
82 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
84 #define BNXT_LED_DFLT_ENA_SHIFT 6
86 #define BNXT_LED_DFLT_ENABLES(x) \
87 rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
89 enum bnxt_hw_context {
91 HW_CONTEXT_IS_RSS = 1,
92 HW_CONTEXT_IS_COS = 2,
96 struct bnxt_vlan_table_entry {
99 } __attribute__((packed));
101 struct bnxt_vlan_antispoof_table_entry {
105 } __attribute__((packed));
107 struct bnxt_child_vf_info {
109 struct bnxt_vlan_table_entry *vlan_table;
110 struct bnxt_vlan_antispoof_table_entry *vlan_as_table;
111 STAILQ_HEAD(, bnxt_filter_info) filter;
112 uint32_t func_cfg_flags;
115 uint16_t max_tx_rate;
118 uint8_t mac_spoof_en;
119 uint8_t vlan_spoof_en;
124 struct bnxt_pf_info {
125 #define BNXT_FIRST_PF_FID 1
126 #define BNXT_MAX_VFS(bp) (bp->pf.max_vfs)
127 #define BNXT_FIRST_VF_FID 128
128 #define BNXT_PF_RINGS_USED(bp) bnxt_get_num_queues(bp)
129 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
131 uint16_t first_vf_id;
134 uint32_t func_cfg_flags;
136 phys_addr_t vf_req_buf_dma_addr;
137 uint32_t vf_req_fwd[8];
138 uint16_t total_vnics;
139 struct bnxt_child_vf_info *vf_info;
140 #define BNXT_EVB_MODE_NONE 0
141 #define BNXT_EVB_MODE_VEB 1
142 #define BNXT_EVB_MODE_VEPA 2
146 /* Max wait time is 10 * 100ms = 1s */
147 #define BNXT_LINK_WAIT_CNT 10
148 #define BNXT_LINK_WAIT_INTERVAL 100
149 struct bnxt_link_info {
152 uint8_t phy_link_status;
160 #define PHY_VER_LEN 3
161 uint8_t phy_ver[PHY_VER_LEN];
163 uint16_t support_speeds;
164 uint16_t auto_link_speed;
165 uint16_t auto_link_speed_mask;
166 uint32_t preemphasis;
169 #define BNXT_COS_QUEUE_COUNT 8
170 struct bnxt_cos_queue_info {
176 STAILQ_ENTRY(rte_flow) next;
177 struct bnxt_filter_info *filter;
178 struct bnxt_vnic_info *vnic;
181 #define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
185 struct rte_eth_dev *eth_dev;
186 struct rte_eth_rss_conf rss_conf;
187 struct rte_pci_device *pdev;
190 #define BNXT_FLAG_REGISTERED (1 << 0)
191 #define BNXT_FLAG_VF (1 << 1)
192 #define BNXT_FLAG_PORT_STATS (1 << 2)
193 #define BNXT_FLAG_JUMBO (1 << 3)
194 #define BNXT_FLAG_SHORT_CMD (1 << 4)
195 #define BNXT_FLAG_UPDATE_HASH (1 << 5)
196 #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
197 #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
198 #define BNXT_NPAR_ENABLED(bp) ((bp)->port_partition_type)
199 #define BNXT_NPAR_PF(bp) (BNXT_PF(bp) && BNXT_NPAR_ENABLED(bp))
201 unsigned int rx_nr_rings;
202 unsigned int rx_cp_nr_rings;
203 struct bnxt_rx_queue **rx_queues;
204 const void *rx_mem_zone;
205 struct rx_port_stats *hw_rx_port_stats;
206 phys_addr_t hw_rx_port_stats_map;
208 unsigned int tx_nr_rings;
209 unsigned int tx_cp_nr_rings;
210 struct bnxt_tx_queue **tx_queues;
211 const void *tx_mem_zone;
212 struct tx_port_stats *hw_tx_port_stats;
213 phys_addr_t hw_tx_port_stats_map;
215 /* Default completion ring */
216 struct bnxt_cp_ring_info *def_cp_ring;
217 uint32_t max_ring_grps;
218 struct bnxt_ring_grp_info *grp_info;
220 unsigned int nr_vnics;
222 struct bnxt_vnic_info *vnic_info;
223 STAILQ_HEAD(, bnxt_vnic_info) free_vnic_list;
225 struct bnxt_filter_info *filter_info;
226 STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
228 /* VNIC pointer for flow filter (VMDq) pools */
229 #define MAX_FF_POOLS 256
230 STAILQ_HEAD(, bnxt_vnic_info) ff_pool[MAX_FF_POOLS];
232 struct bnxt_irq *irq_tbl;
234 #define MAX_NUM_MAC_ADDR 32
235 uint8_t mac_addr[ETHER_ADDR_LEN];
237 uint16_t hwrm_cmd_seq;
238 void *hwrm_cmd_resp_addr;
239 phys_addr_t hwrm_cmd_resp_dma_addr;
240 void *hwrm_short_cmd_req_addr;
241 phys_addr_t hwrm_short_cmd_req_dma_addr;
242 rte_spinlock_t hwrm_lock;
243 uint16_t max_req_len;
244 uint16_t max_resp_len;
246 struct bnxt_link_info link_info;
247 struct bnxt_cos_queue_info cos_queue[BNXT_COS_QUEUE_COUNT];
250 uint8_t dflt_mac_addr[ETHER_ADDR_LEN];
251 uint16_t max_rsscos_ctx;
252 uint16_t max_cp_rings;
253 uint16_t max_tx_rings;
254 uint16_t max_rx_rings;
257 uint16_t max_stat_ctx;
259 struct bnxt_pf_info pf;
260 uint8_t port_partition_type;
262 uint8_t vxlan_port_cnt;
263 uint8_t geneve_port_cnt;
265 uint16_t geneve_port;
266 uint16_t vxlan_fw_dst_port_id;
267 uint16_t geneve_fw_dst_port_id;
269 rte_atomic64_t rx_mbuf_alloc_fail;
271 struct bnxt_led_info leds[BNXT_MAX_LED];
275 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
276 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
278 #define RX_PROD_AGG_BD_TYPE_RX_PROD_AGG 0x6
280 bool is_bnxt_supported(struct rte_eth_dev *dev);
281 extern const struct rte_flow_ops bnxt_flow_ops;