1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
11 #include <sys/queue.h>
14 #include <rte_bus_pci.h>
15 #include <rte_ethdev_driver.h>
16 #include <rte_memory.h>
17 #include <rte_lcore.h>
18 #include <rte_spinlock.h>
23 #define BNXT_MAX_MTU 9574
24 #define VLAN_TAG_SIZE 4
25 #define BNXT_VF_RSV_NUM_RSS_CTX 1
26 #define BNXT_VF_RSV_NUM_L2_CTX 4
27 /* TODO: For now, do not support VMDq/RFS on VFs. */
28 #define BNXT_VF_RSV_NUM_VNIC 1
29 #define BNXT_MAX_LED 4
30 #define BNXT_NUM_VLANS 2
31 #define BNXT_MIN_RING_DESC 16
32 #define BNXT_MAX_TX_RING_DESC 4096
33 #define BNXT_MAX_RX_RING_DESC 8192
34 #define BNXT_DB_SIZE 0x80
37 #define BNXT_NUM_ASYNC_CPR(bp) (BNXT_STINGRAY(bp) ? 0 : 1)
39 #define BNXT_NUM_ASYNC_CPR(bp) 1
42 /* Chimp Communication Channel */
43 #define GRCPF_REG_CHIMP_CHANNEL_OFFSET 0x0
44 #define GRCPF_REG_CHIMP_COMM_TRIGGER 0x100
45 /* Kong Communication Channel */
46 #define GRCPF_REG_KONG_CHANNEL_OFFSET 0xA00
47 #define GRCPF_REG_KONG_COMM_TRIGGER 0xB00
49 #define BNXT_INT_LAT_TMR_MIN 75
50 #define BNXT_INT_LAT_TMR_MAX 150
51 #define BNXT_NUM_CMPL_AGGR_INT 36
52 #define BNXT_CMPL_AGGR_DMA_TMR 37
53 #define BNXT_NUM_CMPL_DMA_AGGR 36
54 #define BNXT_CMPL_AGGR_DMA_TMR_DURING_INT 50
55 #define BNXT_NUM_CMPL_DMA_AGGR_DURING_INT 12
57 struct bnxt_led_info {
62 uint16_t led_state_caps;
63 #define BNXT_LED_ALT_BLINK_CAP(x) ((x) & \
64 rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
66 uint16_t led_color_caps;
74 uint16_t led_blink_on;
75 uint16_t led_blink_off;
80 #define BNXT_LED_DFLT_ENA \
81 (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID | \
82 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE | \
83 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON | \
84 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF | \
85 HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
87 #define BNXT_LED_DFLT_ENA_SHIFT 6
89 #define BNXT_LED_DFLT_ENABLES(x) \
90 rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
92 enum bnxt_hw_context {
94 HW_CONTEXT_IS_RSS = 1,
95 HW_CONTEXT_IS_COS = 2,
99 struct bnxt_vlan_table_entry {
102 } __attribute__((packed));
104 struct bnxt_vlan_antispoof_table_entry {
108 } __attribute__((packed));
110 struct bnxt_child_vf_info {
112 struct bnxt_vlan_table_entry *vlan_table;
113 struct bnxt_vlan_antispoof_table_entry *vlan_as_table;
114 STAILQ_HEAD(, bnxt_filter_info) filter;
115 uint32_t func_cfg_flags;
118 uint16_t max_tx_rate;
121 uint8_t mac_spoof_en;
122 uint8_t vlan_spoof_en;
127 struct bnxt_pf_info {
128 #define BNXT_FIRST_PF_FID 1
129 #define BNXT_MAX_VFS(bp) (bp->pf.max_vfs)
130 #define BNXT_TOTAL_VFS(bp) ((bp)->pf.total_vfs)
131 #define BNXT_FIRST_VF_FID 128
132 #define BNXT_PF_RINGS_USED(bp) bnxt_get_num_queues(bp)
133 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
135 uint16_t first_vf_id;
138 uint16_t total_vfs; /* Total VFs possible.
139 * Not necessarily enabled.
141 uint32_t func_cfg_flags;
143 rte_iova_t vf_req_buf_dma_addr;
144 uint32_t vf_req_fwd[8];
145 uint16_t total_vnics;
146 struct bnxt_child_vf_info *vf_info;
147 #define BNXT_EVB_MODE_NONE 0
148 #define BNXT_EVB_MODE_VEB 1
149 #define BNXT_EVB_MODE_VEPA 2
153 /* Max wait time is 10 * 100ms = 1s */
154 #define BNXT_LINK_WAIT_CNT 10
155 #define BNXT_LINK_WAIT_INTERVAL 100
156 struct bnxt_link_info {
159 uint8_t phy_link_status;
167 #define PHY_VER_LEN 3
168 uint8_t phy_ver[PHY_VER_LEN];
170 uint16_t support_speeds;
171 uint16_t auto_link_speed;
172 uint16_t force_link_speed;
173 uint16_t auto_link_speed_mask;
174 uint32_t preemphasis;
179 #define BNXT_COS_QUEUE_COUNT 8
180 struct bnxt_cos_queue_info {
186 STAILQ_ENTRY(rte_flow) next;
187 struct bnxt_filter_info *filter;
188 struct bnxt_vnic_info *vnic;
191 struct bnxt_ptp_cfg {
192 #define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400
193 #define BNXT_GRCPF_REG_SYNC_TIME 0x480
194 #define BNXT_CYCLECOUNTER_MASK 0xffffffffffffffffULL
195 struct rte_timecounter tc;
196 struct rte_timecounter tx_tstamp_tc;
197 struct rte_timecounter rx_tstamp_tc;
199 #define BNXT_MAX_TX_TS 1
201 #define BNXT_PTP_MSG_SYNC (1 << 0)
202 #define BNXT_PTP_MSG_DELAY_REQ (1 << 1)
203 #define BNXT_PTP_MSG_PDELAY_REQ (1 << 2)
204 #define BNXT_PTP_MSG_PDELAY_RESP (1 << 3)
205 #define BNXT_PTP_MSG_FOLLOW_UP (1 << 8)
206 #define BNXT_PTP_MSG_DELAY_RESP (1 << 9)
207 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP (1 << 10)
208 #define BNXT_PTP_MSG_ANNOUNCE (1 << 11)
209 #define BNXT_PTP_MSG_SIGNALING (1 << 12)
210 #define BNXT_PTP_MSG_MANAGEMENT (1 << 13)
211 #define BNXT_PTP_MSG_EVENTS (BNXT_PTP_MSG_SYNC | \
212 BNXT_PTP_MSG_DELAY_REQ | \
213 BNXT_PTP_MSG_PDELAY_REQ | \
214 BNXT_PTP_MSG_PDELAY_RESP)
215 uint8_t tx_tstamp_en:1;
218 #define BNXT_PTP_RX_TS_L 0
219 #define BNXT_PTP_RX_TS_H 1
220 #define BNXT_PTP_RX_SEQ 2
221 #define BNXT_PTP_RX_FIFO 3
222 #define BNXT_PTP_RX_FIFO_PENDING 0x1
223 #define BNXT_PTP_RX_FIFO_ADV 4
224 #define BNXT_PTP_RX_REGS 5
226 #define BNXT_PTP_TX_TS_L 0
227 #define BNXT_PTP_TX_TS_H 1
228 #define BNXT_PTP_TX_SEQ 2
229 #define BNXT_PTP_TX_FIFO 3
230 #define BNXT_PTP_TX_FIFO_EMPTY 0x2
231 #define BNXT_PTP_TX_REGS 4
232 uint32_t rx_regs[BNXT_PTP_RX_REGS];
233 uint32_t rx_mapped_regs[BNXT_PTP_RX_REGS];
234 uint32_t tx_regs[BNXT_PTP_TX_REGS];
235 uint32_t tx_mapped_regs[BNXT_PTP_TX_REGS];
239 uint16_t num_cmpl_aggr_int;
240 uint16_t num_cmpl_dma_aggr;
241 uint16_t num_cmpl_dma_aggr_during_int;
242 uint16_t int_lat_tmr_max;
243 uint16_t int_lat_tmr_min;
244 uint16_t cmpl_aggr_dma_tmr;
245 uint16_t cmpl_aggr_dma_tmr_during_int;
248 /* 64-bit doorbell */
249 #define DBR_XID_SFT 32
250 #define DBR_PATH_L2 (0x1ULL << 56)
251 #define DBR_TYPE_SQ (0x0ULL << 60)
252 #define DBR_TYPE_SRQ (0x2ULL << 60)
253 #define DBR_TYPE_CQ (0x4ULL << 60)
254 #define DBR_TYPE_NQ (0xaULL << 60)
255 #define DBR_TYPE_NQ_ARM (0xbULL << 60)
257 #define BNXT_RSS_TBL_SIZE_THOR 512
258 #define BNXT_RSS_ENTRIES_PER_CTX_THOR 64
259 #define BNXT_MAX_RSS_CTXTS_THOR \
260 (BNXT_RSS_TBL_SIZE_THOR / BNXT_RSS_ENTRIES_PER_CTX_THOR)
262 #define BNXT_MAX_TC 8
263 #define BNXT_MAX_QUEUE 8
264 #define BNXT_MAX_TC_Q (BNXT_MAX_TC + 1)
265 #define BNXT_MAX_Q (bp->max_q + 1)
266 #define BNXT_PAGE_SHFT 12
267 #define BNXT_PAGE_SIZE (1 << BNXT_PAGE_SHFT)
268 #define MAX_CTX_PAGES (BNXT_PAGE_SIZE / 8)
270 #define PTU_PTE_VALID 0x1UL
271 #define PTU_PTE_LAST 0x2UL
272 #define PTU_PTE_NEXT_TO_LAST 0x4UL
274 struct bnxt_ring_mem_info {
278 #define BNXT_RMEM_VALID_PTE_FLAG 1
279 #define BNXT_RMEM_RING_PTE_FLAG 2
283 const struct rte_memzone *mz;
286 rte_iova_t pg_tbl_map;
287 const struct rte_memzone *pg_tbl_mz;
293 struct bnxt_ctx_pg_info {
295 void *ctx_pg_arr[MAX_CTX_PAGES];
296 rte_iova_t ctx_dma_arr[MAX_CTX_PAGES];
297 struct bnxt_ring_mem_info ring_mem;
300 struct bnxt_ctx_mem_info {
301 uint32_t qp_max_entries;
302 uint16_t qp_min_qp1_entries;
303 uint16_t qp_max_l2_entries;
304 uint16_t qp_entry_size;
305 uint16_t srq_max_l2_entries;
306 uint32_t srq_max_entries;
307 uint16_t srq_entry_size;
308 uint16_t cq_max_l2_entries;
309 uint32_t cq_max_entries;
310 uint16_t cq_entry_size;
311 uint16_t vnic_max_vnic_entries;
312 uint16_t vnic_max_ring_table_entries;
313 uint16_t vnic_entry_size;
314 uint32_t stat_max_entries;
315 uint16_t stat_entry_size;
316 uint16_t tqm_entry_size;
317 uint32_t tqm_min_entries_per_ring;
318 uint32_t tqm_max_entries_per_ring;
319 uint32_t mrav_max_entries;
320 uint16_t mrav_entry_size;
321 uint16_t tim_entry_size;
322 uint32_t tim_max_entries;
323 uint8_t tqm_entries_multiple;
326 #define BNXT_CTX_FLAG_INITED 0x01
328 struct bnxt_ctx_pg_info qp_mem;
329 struct bnxt_ctx_pg_info srq_mem;
330 struct bnxt_ctx_pg_info cq_mem;
331 struct bnxt_ctx_pg_info vnic_mem;
332 struct bnxt_ctx_pg_info stat_mem;
333 struct bnxt_ctx_pg_info *tqm_mem[BNXT_MAX_TC_Q];
336 #define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
340 struct rte_eth_dev *eth_dev;
341 struct rte_eth_rss_conf rss_conf;
342 struct rte_pci_device *pdev;
346 #define BNXT_FLAG_REGISTERED (1 << 0)
347 #define BNXT_FLAG_VF (1 << 1)
348 #define BNXT_FLAG_PORT_STATS (1 << 2)
349 #define BNXT_FLAG_JUMBO (1 << 3)
350 #define BNXT_FLAG_SHORT_CMD (1 << 4)
351 #define BNXT_FLAG_UPDATE_HASH (1 << 5)
352 #define BNXT_FLAG_PTP_SUPPORTED (1 << 6)
353 #define BNXT_FLAG_MULTI_HOST (1 << 7)
354 #define BNXT_FLAG_EXT_RX_PORT_STATS (1 << 8)
355 #define BNXT_FLAG_EXT_TX_PORT_STATS (1 << 9)
356 #define BNXT_FLAG_KONG_MB_EN (1 << 10)
357 #define BNXT_FLAG_TRUSTED_VF_EN (1 << 11)
358 #define BNXT_FLAG_DFLT_VNIC_SET (1 << 12)
359 #define BNXT_FLAG_THOR_CHIP (1 << 13)
360 #define BNXT_FLAG_STINGRAY (1 << 14)
361 #define BNXT_FLAG_EXT_STATS_SUPPORTED (1 << 29)
362 #define BNXT_FLAG_NEW_RM (1 << 30)
363 #define BNXT_FLAG_INIT_DONE (1U << 31)
364 #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
365 #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
366 #define BNXT_NPAR(bp) ((bp)->port_partition_type)
367 #define BNXT_MH(bp) ((bp)->flags & BNXT_FLAG_MULTI_HOST)
368 #define BNXT_SINGLE_PF(bp) (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
369 #define BNXT_USE_CHIMP_MB 0 //For non-CFA commands, everything uses Chimp.
370 #define BNXT_USE_KONG(bp) ((bp)->flags & BNXT_FLAG_KONG_MB_EN)
371 #define BNXT_VF_IS_TRUSTED(bp) ((bp)->flags & BNXT_FLAG_TRUSTED_VF_EN)
372 #define BNXT_CHIP_THOR(bp) ((bp)->flags & BNXT_FLAG_THOR_CHIP)
373 #define BNXT_STINGRAY(bp) ((bp)->flags & BNXT_FLAG_STINGRAY)
374 #define BNXT_HAS_NQ(bp) BNXT_CHIP_THOR(bp)
375 #define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_THOR(bp))
377 unsigned int rx_nr_rings;
378 unsigned int rx_cp_nr_rings;
379 struct bnxt_rx_queue **rx_queues;
380 const void *rx_mem_zone;
381 struct rx_port_stats *hw_rx_port_stats;
382 rte_iova_t hw_rx_port_stats_map;
383 struct rx_port_stats_ext *hw_rx_port_stats_ext;
384 rte_iova_t hw_rx_port_stats_ext_map;
385 uint16_t fw_rx_port_stats_ext_size;
387 unsigned int tx_nr_rings;
388 unsigned int tx_cp_nr_rings;
389 struct bnxt_tx_queue **tx_queues;
390 const void *tx_mem_zone;
391 struct tx_port_stats *hw_tx_port_stats;
392 rte_iova_t hw_tx_port_stats_map;
393 struct tx_port_stats_ext *hw_tx_port_stats_ext;
394 rte_iova_t hw_tx_port_stats_ext_map;
395 uint16_t fw_tx_port_stats_ext_size;
397 /* Default completion ring */
398 struct bnxt_cp_ring_info *async_cp_ring;
399 uint32_t max_ring_grps;
400 struct bnxt_ring_grp_info *grp_info;
402 unsigned int nr_vnics;
404 #define BNXT_GET_DEFAULT_VNIC(bp) (&(bp)->vnic_info[0])
405 struct bnxt_vnic_info *vnic_info;
406 STAILQ_HEAD(, bnxt_vnic_info) free_vnic_list;
408 struct bnxt_filter_info *filter_info;
409 STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
411 struct bnxt_irq *irq_tbl;
413 #define MAX_NUM_MAC_ADDR 32
414 uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
416 uint16_t hwrm_cmd_seq;
417 uint16_t kong_cmd_seq;
418 void *hwrm_cmd_resp_addr;
419 rte_iova_t hwrm_cmd_resp_dma_addr;
420 void *hwrm_short_cmd_req_addr;
421 rte_iova_t hwrm_short_cmd_req_dma_addr;
422 rte_spinlock_t hwrm_lock;
423 uint16_t max_req_len;
424 uint16_t max_resp_len;
425 uint16_t hwrm_max_ext_req_len;
427 struct bnxt_link_info link_info;
428 struct bnxt_cos_queue_info cos_queue[BNXT_COS_QUEUE_COUNT];
435 uint8_t dflt_mac_addr[RTE_ETHER_ADDR_LEN];
436 uint16_t max_rsscos_ctx;
437 uint16_t max_cp_rings;
438 uint16_t max_tx_rings;
439 uint16_t max_rx_rings;
440 uint16_t max_nq_rings;
442 uint16_t max_rx_em_flows;
444 uint16_t max_stat_ctx;
445 uint16_t first_vf_id;
447 struct bnxt_pf_info pf;
448 uint8_t port_partition_type;
450 uint8_t vxlan_port_cnt;
451 uint8_t geneve_port_cnt;
453 uint16_t geneve_port;
454 uint16_t vxlan_fw_dst_port_id;
455 uint16_t geneve_fw_dst_port_id;
457 uint32_t hwrm_spec_code;
459 struct bnxt_led_info leds[BNXT_MAX_LED];
461 struct bnxt_ptp_cfg *ptp_cfg;
462 uint16_t vf_resv_strategy;
463 struct bnxt_ctx_mem_info *ctx;
466 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
467 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
469 bool is_bnxt_supported(struct rte_eth_dev *dev);
470 bool bnxt_stratus_device(struct bnxt *bp);
471 extern const struct rte_flow_ops bnxt_flow_ops;
473 extern int bnxt_logtype_driver;
474 #define PMD_DRV_LOG_RAW(level, fmt, args...) \
475 rte_log(RTE_LOG_ ## level, bnxt_logtype_driver, "%s(): " fmt, \
478 #define PMD_DRV_LOG(level, fmt, args...) \
479 PMD_DRV_LOG_RAW(level, fmt, ## args)