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38 #include <sys/queue.h>
40 #include <rte_ethdev.h>
41 #include <rte_memory.h>
42 #include <rte_lcore.h>
43 #include <rte_spinlock.h>
47 #define BNXT_MAX_MTU 9000
48 #define VLAN_TAG_SIZE 4
50 enum bnxt_hw_context {
52 HW_CONTEXT_IS_RSS = 1,
53 HW_CONTEXT_IS_COS = 2,
59 uint8_t mac_addr[ETHER_ADDR_LEN];
60 uint16_t max_rsscos_ctx;
61 uint16_t max_cp_rings;
62 uint16_t max_tx_rings;
63 uint16_t max_rx_rings;
66 struct bnxt_pf_info *pf;
70 #define BNXT_FIRST_PF_FID 1
71 #define BNXT_MAX_VFS(bp) (bp->pf.max_vfs)
72 #define BNXT_FIRST_VF_FID 128
73 #define BNXT_PF_RINGS_USED(bp) bnxt_get_num_queues(bp)
74 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
77 uint8_t mac_addr[ETHER_ADDR_LEN];
78 uint16_t max_rsscos_ctx;
79 uint16_t max_cp_rings;
80 uint16_t max_tx_rings;
81 uint16_t max_rx_rings;
88 phys_addr_t vf_req_buf_dma_addr;
89 uint32_t vf_req_fwd[8];
90 struct bnxt_vf_info *vf;
93 /* Max wait time is 10 * 100ms = 1s */
94 #define BNXT_LINK_WAIT_CNT 10
95 #define BNXT_LINK_WAIT_INTERVAL 100
96 struct bnxt_link_info {
99 uint8_t phy_link_status;
107 #define PHY_VER_LEN 3
108 uint8_t phy_ver[PHY_VER_LEN];
110 uint16_t support_speeds;
111 uint16_t auto_link_speed;
112 uint16_t auto_link_speed_mask;
113 uint32_t preemphasis;
116 #define BNXT_COS_QUEUE_COUNT 8
117 struct bnxt_cos_queue_info {
125 struct rte_eth_dev *eth_dev;
126 struct rte_pci_device *pdev;
129 #define BNXT_FLAG_REGISTERED (1 << 0)
130 #define BNXT_FLAG_VF (1 << 1)
131 #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
132 #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
134 unsigned int rx_nr_rings;
135 unsigned int rx_cp_nr_rings;
136 struct bnxt_rx_queue **rx_queues;
138 unsigned int tx_nr_rings;
139 unsigned int tx_cp_nr_rings;
140 struct bnxt_tx_queue **tx_queues;
142 /* Default completion ring */
143 struct bnxt_cp_ring_info *def_cp_ring;
145 struct bnxt_vnic_info *vnic_info;
146 STAILQ_HEAD(, bnxt_vnic_info) free_vnic_list;
148 struct bnxt_filter_info *filter_info;
149 STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
151 /* VNIC pointer for flow filter (VMDq) pools */
152 #define MAX_FF_POOLS ETH_64_POOLS
153 STAILQ_HEAD(, bnxt_vnic_info) ff_pool[MAX_FF_POOLS];
155 #define MAX_NUM_MAC_ADDR 32
156 uint8_t mac_addr[ETHER_ADDR_LEN];
158 uint16_t hwrm_cmd_seq;
159 void *hwrm_cmd_resp_addr;
160 phys_addr_t hwrm_cmd_resp_dma_addr;
161 rte_spinlock_t hwrm_lock;
162 uint16_t max_req_len;
163 uint16_t max_resp_len;
165 struct bnxt_link_info link_info;
166 struct bnxt_cos_queue_info cos_queue[BNXT_COS_QUEUE_COUNT];
168 struct bnxt_pf_info pf;
169 struct bnxt_vf_info vf;