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38 #include <sys/queue.h>
40 #include <rte_ethdev.h>
41 #include <rte_memory.h>
42 #include <rte_lcore.h>
43 #include <rte_spinlock.h>
45 #define BNXT_MAX_MTU 9000
46 #define VLAN_TAG_SIZE 4
48 enum bnxt_hw_context {
50 HW_CONTEXT_IS_RSS = 1,
51 HW_CONTEXT_IS_COS = 2,
57 uint8_t mac_addr[ETHER_ADDR_LEN];
58 uint16_t max_rsscos_ctx;
59 uint16_t max_cp_rings;
60 uint16_t max_tx_rings;
61 uint16_t max_rx_rings;
64 struct bnxt_pf_info *pf;
68 #define BNXT_FIRST_PF_FID 1
69 #define BNXT_MAX_VFS(bp) (bp->pf.max_vfs)
70 #define BNXT_FIRST_VF_FID 128
71 #define BNXT_PF_RINGS_USED(bp) bnxt_get_num_queues(bp)
72 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
75 uint8_t mac_addr[ETHER_ADDR_LEN];
76 uint16_t max_rsscos_ctx;
77 uint16_t max_cp_rings;
78 uint16_t max_tx_rings;
79 uint16_t max_rx_rings;
86 phys_addr_t vf_req_buf_dma_addr;
87 uint32_t vf_req_fwd[8];
88 struct bnxt_vf_info *vf;
91 /* Max wait time is 10 * 100ms = 1s */
92 #define BNXT_LINK_WAIT_CNT 10
93 #define BNXT_LINK_WAIT_INTERVAL 100
94 struct bnxt_link_info {
97 uint8_t phy_link_status;
105 #define PHY_VER_LEN 3
106 uint8_t phy_ver[PHY_VER_LEN];
108 uint16_t support_speeds;
109 uint16_t auto_link_speed;
110 uint16_t auto_link_speed_mask;
111 uint32_t preemphasis;
114 #define BNXT_COS_QUEUE_COUNT 8
115 struct bnxt_cos_queue_info {
123 struct rte_eth_dev *eth_dev;
124 struct rte_pci_device *pdev;
127 #define BNXT_FLAG_REGISTERED (1 << 0)
128 #define BNXT_FLAG_VF (1 << 1)
129 #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
130 #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
132 unsigned int rx_nr_rings;
133 unsigned int rx_cp_nr_rings;
134 struct bnxt_rx_queue **rx_queues;
136 unsigned int tx_nr_rings;
137 unsigned int tx_cp_nr_rings;
138 struct bnxt_tx_queue **tx_queues;
140 struct bnxt_vnic_info *vnic_info;
141 STAILQ_HEAD(, bnxt_vnic_info) free_vnic_list;
143 /* VNIC pointer for flow filter (VMDq) pools */
144 #define MAX_FF_POOLS ETH_64_POOLS
145 STAILQ_HEAD(, bnxt_vnic_info) ff_pool[MAX_FF_POOLS];
147 #define MAX_NUM_MAC_ADDR 32
148 uint8_t mac_addr[ETHER_ADDR_LEN];
150 uint16_t hwrm_cmd_seq;
151 void *hwrm_cmd_resp_addr;
152 phys_addr_t hwrm_cmd_resp_dma_addr;
153 rte_spinlock_t hwrm_lock;
154 uint16_t max_req_len;
155 uint16_t max_resp_len;
157 struct bnxt_link_info link_info;
158 struct bnxt_cos_queue_info cos_queue[BNXT_COS_QUEUE_COUNT];
160 struct bnxt_pf_info pf;
161 struct bnxt_vf_info vf;