1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
14 #define CMP_VALID(cmp, raw_cons, ring) \
15 (!!(rte_le_to_cpu_32(((struct cmpl_base *)(cmp))->info3_v) & \
16 CMPL_BASE_V) == !((raw_cons) & ((ring)->ring_size)))
18 #define CMPL_VALID(cmp, v) \
19 (!!(rte_le_to_cpu_32(((struct cmpl_base *)(cmp))->info3_v) & \
22 #define CMP_TYPE(cmp) \
23 (((struct cmpl_base *)cmp)->type & CMPL_BASE_TYPE_MASK)
25 #define ADV_RAW_CMP(idx, n) ((idx) + (n))
26 #define NEXT_RAW_CMP(idx) ADV_RAW_CMP(idx, 1)
27 #define RING_CMP(ring, idx) ((idx) & (ring)->ring_mask)
28 #define RING_CMPL(ring_mask, idx) ((idx) & (ring_mask))
29 #define NEXT_CMP(idx) RING_CMP(ADV_RAW_CMP(idx, 1))
30 #define FLIP_VALID(cons, mask, val) ((cons) >= (mask) ? !(val) : (val))
32 #define DB_CP_REARM_FLAGS (DB_KEY_CP | DB_IDX_VALID)
33 #define DB_CP_FLAGS (DB_KEY_CP | DB_IDX_VALID | DB_IRQ_DIS)
35 #define NEXT_CMPL(cpr, idx, v, inc) do { \
37 if (unlikely((idx) >= (cpr)->cp_ring_struct->ring_size)) { \
42 #define B_CP_DB_REARM(cpr, raw_cons) \
43 rte_write32((DB_CP_REARM_FLAGS | \
44 RING_CMP(((cpr)->cp_ring_struct), raw_cons)), \
45 ((cpr)->cp_db.doorbell))
47 #define B_CP_DB_ARM(cpr) rte_write32((DB_KEY_CP), \
48 ((cpr)->cp_db.doorbell))
50 #define B_CP_DB_DISARM(cpr) (*(uint32_t *)((cpr)->cp_db.doorbell) = \
51 DB_KEY_CP | DB_IRQ_DIS)
53 #define B_CP_DB_IDX_ARM(cpr, cons) \
54 (*(uint32_t *)((cpr)->cp_db.doorbell) = (DB_CP_REARM_FLAGS | \
57 #define B_CP_DB_IDX_DISARM(cpr, cons) do { \
59 (*(uint32_t *)((cpr)->cp_db.doorbell) = (DB_CP_FLAGS | \
62 #define B_CP_DIS_DB(cpr, raw_cons) \
63 rte_write32((DB_CP_FLAGS | \
64 RING_CMP(((cpr)->cp_ring_struct), raw_cons)), \
65 ((cpr)->cp_db.doorbell))
67 #define B_CP_DB(cpr, raw_cons, ring_mask) \
68 rte_write32((DB_CP_FLAGS | \
69 RING_CMPL((ring_mask), raw_cons)), \
70 ((cpr)->cp_db.doorbell))
78 struct bnxt_cp_ring_info {
81 struct cmpl_base *cp_desc_ring;
82 struct bnxt_db_info cp_db;
83 rte_iova_t cp_desc_mapping;
85 struct ctx_hw_stats *hw_stats;
86 rte_iova_t hw_stats_map;
87 uint32_t hw_stats_ctx_id;
89 struct bnxt_ring *cp_ring_struct;
94 #define RX_CMP_L2_ERRORS \
95 (RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK | RX_PKT_CMPL_ERRORS_CRC_ERROR)
98 void bnxt_handle_async_event(struct bnxt *bp, struct cmpl_base *cmp);
99 void bnxt_handle_fwd_req(struct bnxt *bp, struct cmpl_base *cmp);
100 int bnxt_event_hwrm_resp_handler(struct bnxt *bp, struct cmpl_base *cmp);