drivers/net/bnxt/bnxt_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_ethdev_driver.h>
  11 #include <rte_ethdev_pci.h>
  12 #include <rte_malloc.h>
  13 #include <rte_cycles.h>
  14
  15 #include "bnxt.h"
  16 #include "bnxt_cpr.h"
  17 #include "bnxt_filter.h"
  18 #include "bnxt_hwrm.h"
  19 #include "bnxt_irq.h"
  20 #include "bnxt_ring.h"
  21 #include "bnxt_rxq.h"
  22 #include "bnxt_rxr.h"
  23 #include "bnxt_stats.h"
  24 #include "bnxt_txq.h"
  25 #include "bnxt_txr.h"
  26 #include "bnxt_vnic.h"
  27 #include "hsi_struct_def_dpdk.h"
  28 #include "bnxt_nvm_defs.h"
  29
  30 #define DRV_MODULE_NAME         "bnxt"
  31 static const char bnxt_version[] =
  32         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  33 int bnxt_logtype_driver;
  34
  35 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  36
  37 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  38 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  39 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  40 #define BROADCOM_DEV_ID_57301 0x16c8
  41 #define BROADCOM_DEV_ID_57302 0x16c9
  42 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  43 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  44 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  45 #define BROADCOM_DEV_ID_NS2 0x16cd
  46 #define BROADCOM_DEV_ID_57311 0x16ce
  47 #define BROADCOM_DEV_ID_57312 0x16cf
  48 #define BROADCOM_DEV_ID_57402 0x16d0
  49 #define BROADCOM_DEV_ID_57404 0x16d1
  50 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  51 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  52 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  53 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  54 #define BROADCOM_DEV_ID_57412 0x16d6
  55 #define BROADCOM_DEV_ID_57414 0x16d7
  56 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  57 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  58 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  59 #define BROADCOM_DEV_ID_57412_MF 0x16de
  60 #define BROADCOM_DEV_ID_57314 0x16df
  61 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  62 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  63 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  64 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  65 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  66 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  67 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  68 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  69 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  70 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  71 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  72
  73 static const struct rte_pci_id bnxt_pci_id_map[] = {
  74         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  75                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
  76         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
  77         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
  78         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  79         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  80         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  81         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
  82         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
  83         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
  84         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
  85         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
  86         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
  87         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
  88         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
  89         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
  90         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
  91         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
  92         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
  93         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
  94         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
  95         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 110         { .vendor_id = 0, /* sentinel */ },
 111 };
 112
 113 #define BNXT_ETH_RSS_SUPPORT (  \
 114         ETH_RSS_IPV4 |          \
 115         ETH_RSS_NONFRAG_IPV4_TCP |      \
 116         ETH_RSS_NONFRAG_IPV4_UDP |      \
 117         ETH_RSS_IPV6 |          \
 118         ETH_RSS_NONFRAG_IPV6_TCP |      \
 119         ETH_RSS_NONFRAG_IPV6_UDP)
 120
 121 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 122 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 123
 124 /***********************/
 125
 126 /*
 127  * High level utility functions
 128  */
 129
 130 static void bnxt_free_mem(struct bnxt *bp)
 131 {
 132         bnxt_free_filter_mem(bp);
 133         bnxt_free_vnic_attributes(bp);
 134         bnxt_free_vnic_mem(bp);
 135
 136         bnxt_free_stats(bp);
 137         bnxt_free_tx_rings(bp);
 138         bnxt_free_rx_rings(bp);
 139         bnxt_free_def_cp_ring(bp);
 140 }
 141
 142 static int bnxt_alloc_mem(struct bnxt *bp)
 143 {
 144         int rc;
 145
 146         /* Default completion ring */
 147         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 148         if (rc)
 149                 goto alloc_mem_err;
 150
 151         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 152                               bp->def_cp_ring, "def_cp");
 153         if (rc)
 154                 goto alloc_mem_err;
 155
 156         rc = bnxt_alloc_vnic_mem(bp);
 157         if (rc)
 158                 goto alloc_mem_err;
 159
 160         rc = bnxt_alloc_vnic_attributes(bp);
 161         if (rc)
 162                 goto alloc_mem_err;
 163
 164         rc = bnxt_alloc_filter_mem(bp);
 165         if (rc)
 166                 goto alloc_mem_err;
 167
 168         return 0;
 169
 170 alloc_mem_err:
 171         bnxt_free_mem(bp);
 172         return rc;
 173 }
 174
 175 static int bnxt_init_chip(struct bnxt *bp)
 176 {
 177         unsigned int i;
 178         struct rte_eth_link new;
 179         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 180         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 181         uint32_t intr_vector = 0;
 182         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 183         uint32_t vec = BNXT_MISC_VEC_ID;
 184         int rc;
 185
 186         /* disable uio/vfio intr/eventfd mapping */
 187         rte_intr_disable(intr_handle);
 188
 189         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 190                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 191                 bp->flags |= BNXT_FLAG_JUMBO;
 192         } else {
 193                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 194                 bp->flags &= ~BNXT_FLAG_JUMBO;
 195         }
 196
 197         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 198         if (rc) {
 199                 PMD_DRV_LOG(ERR, "HWRM stat ctx alloc failure rc: %x\n", rc);
 200                 goto err_out;
 201         }
 202
 203         rc = bnxt_alloc_hwrm_rings(bp);
 204         if (rc) {
 205                 PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc);
 206                 goto err_out;
 207         }
 208
 209         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 210         if (rc) {
 211                 PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc);
 212                 goto err_out;
 213         }
 214
 215         rc = bnxt_mq_rx_configure(bp);
 216         if (rc) {
 217                 PMD_DRV_LOG(ERR, "MQ mode configure failure rc: %x\n", rc);
 218                 goto err_out;
 219         }
 220
 221         /* VNIC configuration */
 222         for (i = 0; i < bp->nr_vnics; i++) {
 223                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 224
 225                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 226                 if (rc) {
 227                         PMD_DRV_LOG(ERR, "HWRM vnic %d alloc failure rc: %x\n",
 228                                 i, rc);
 229                         goto err_out;
 230                 }
 231
 232                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 233                 if (rc) {
 234                         PMD_DRV_LOG(ERR,
 235                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 236                                 i, rc);
 237                         goto err_out;
 238                 }
 239
 240                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 241                 if (rc) {
 242                         PMD_DRV_LOG(ERR, "HWRM vnic %d cfg failure rc: %x\n",
 243                                 i, rc);
 244                         goto err_out;
 245                 }
 246
 247                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 248                 if (rc) {
 249                         PMD_DRV_LOG(ERR,
 250                                 "HWRM vnic %d filter failure rc: %x\n",
 251                                 i, rc);
 252                         goto err_out;
 253                 }
 254
 255                 rc = bnxt_vnic_rss_configure(bp, vnic);
 256                 if (rc) {
 257                         PMD_DRV_LOG(ERR,
 258                                     "HWRM vnic set RSS failure rc: %x\n", rc);
 259                         goto err_out;
 260                 }
 261
 262                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 263
 264                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 265                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 266                 else
 267                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 268         }
 269         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 270         if (rc) {
 271                 PMD_DRV_LOG(ERR,
 272                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 273                 goto err_out;
 274         }
 275
 276         /* check and configure queue intr-vector mapping */
 277         if ((rte_intr_cap_multiple(intr_handle) ||
 278              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 279             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 280                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 281                 PMD_DRV_LOG(DEBUG, "intr_vector = %d\n", intr_vector);
 282                 if (intr_vector > bp->rx_cp_nr_rings) {
 283                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
 284                                         bp->rx_cp_nr_rings);
 285                         return -ENOTSUP;
 286                 }
 287                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 288                         return -1;
 289         }
 290
 291         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 292                 intr_handle->intr_vec =
 293                         rte_zmalloc("intr_vec",
 294                                     bp->eth_dev->data->nb_rx_queues *
 295                                     sizeof(int), 0);
 296                 if (intr_handle->intr_vec == NULL) {
 297                         PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
 298                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 299                         return -ENOMEM;
 300                 }
 301                 PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
 302                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 303                          intr_handle->intr_vec, intr_handle->nb_efd,
 304                         intr_handle->max_intr);
 305         }
 306
 307         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 308              queue_id++) {
 309                 intr_handle->intr_vec[queue_id] = vec;
 310                 if (vec < base + intr_handle->nb_efd - 1)
 311                         vec++;
 312         }
 313
 314         /* enable uio/vfio intr/eventfd mapping */
 315         rte_intr_enable(intr_handle);
 316
 317         rc = bnxt_get_hwrm_link_config(bp, &new);
 318         if (rc) {
 319                 PMD_DRV_LOG(ERR, "HWRM Get link config failure rc: %x\n", rc);
 320                 goto err_out;
 321         }
 322
 323         if (!bp->link_info.link_up) {
 324                 rc = bnxt_set_hwrm_link_config(bp, true);
 325                 if (rc) {
 326                         PMD_DRV_LOG(ERR,
 327                                 "HWRM link config failure rc: %x\n", rc);
 328                         goto err_out;
 329                 }
 330         }
 331         bnxt_print_link_info(bp->eth_dev);
 332
 333         return 0;
 334
 335 err_out:
 336         bnxt_free_all_hwrm_resources(bp);
 337
 338         /* Some of the error status returned by FW may not be from errno.h */
 339         if (rc > 0)
 340                 rc = -EIO;
 341
 342         return rc;
 343 }
 344
 345 static int bnxt_shutdown_nic(struct bnxt *bp)
 346 {
 347         bnxt_free_all_hwrm_resources(bp);
 348         bnxt_free_all_filters(bp);
 349         bnxt_free_all_vnics(bp);
 350         return 0;
 351 }
 352
 353 static int bnxt_init_nic(struct bnxt *bp)
 354 {
 355         int rc;
 356
 357         rc = bnxt_init_ring_grps(bp);
 358         if (rc)
 359                 return rc;
 360
 361         bnxt_init_vnics(bp);
 362         bnxt_init_filters(bp);
 363
 364         rc = bnxt_init_chip(bp);
 365         if (rc)
 366                 return rc;
 367
 368         return 0;
 369 }
 370
 371 /*
 372  * Device configuration and status function
 373  */
 374
 375 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 376                                   struct rte_eth_dev_info *dev_info)
 377 {
 378         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 379         uint16_t max_vnics, i, j, vpool, vrxq;
 380         unsigned int max_rx_rings;
 381
 382         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 383
 384         /* MAC Specifics */
 385         dev_info->max_mac_addrs = bp->max_l2_ctx;
 386         dev_info->max_hash_mac_addrs = 0;
 387
 388         /* PF/VF specifics */
 389         if (BNXT_PF(bp))
 390                 dev_info->max_vfs = bp->pdev->max_vfs;
 391         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 392                                                 RTE_MIN(bp->max_rsscos_ctx,
 393                                                 bp->max_stat_ctx)));
 394         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 395         dev_info->max_rx_queues = max_rx_rings;
 396         dev_info->max_tx_queues = max_rx_rings;
 397         dev_info->reta_size = bp->max_rsscos_ctx;
 398         dev_info->hash_key_size = 40;
 399         max_vnics = bp->max_vnics;
 400
 401         /* Fast path specifics */
 402         dev_info->min_rx_bufsize = 1;
 403         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 404                                   + VLAN_TAG_SIZE;
 405         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 406                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 407                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 408                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 409                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 410         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 411                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 412                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 413                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 414                                         DEV_TX_OFFLOAD_TCP_TSO |
 415                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 416                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 417                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 418                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 419                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 420
 421         /* *INDENT-OFF* */
 422         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 423                 .rx_thresh = {
 424                         .pthresh = 8,
 425                         .hthresh = 8,
 426                         .wthresh = 0,
 427                 },
 428                 .rx_free_thresh = 32,
 429                 /* If no descriptors available, pkts are dropped by default */
 430                 .rx_drop_en = 1,
 431         };
 432
 433         dev_info->default_txconf = (struct rte_eth_txconf) {
 434                 .tx_thresh = {
 435                         .pthresh = 32,
 436                         .hthresh = 0,
 437                         .wthresh = 0,
 438                 },
 439                 .tx_free_thresh = 32,
 440                 .tx_rs_thresh = 32,
 441                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 442                              ETH_TXQ_FLAGS_NOOFFLOADS,
 443         };
 444         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 445
 446         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 447
 448         /* *INDENT-ON* */
 449
 450         /*
 451          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 452          *       need further investigation.
 453          */
 454
 455         /* VMDq resources */
 456         vpool = 64; /* ETH_64_POOLS */
 457         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 458         for (i = 0; i < 4; vpool >>= 1, i++) {
 459                 if (max_vnics > vpool) {
 460                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 461                                 if (dev_info->max_rx_queues > vrxq) {
 462                                         if (vpool > vrxq)
 463                                                 vpool = vrxq;
 464                                         goto found;
 465                                 }
 466                         }
 467                         /* Not enough resources to support VMDq */
 468                         break;
 469                 }
 470         }
 471         /* Not enough resources to support VMDq */
 472         vpool = 0;
 473         vrxq = 0;
 474 found:
 475         dev_info->max_vmdq_pools = vpool;
 476         dev_info->vmdq_queue_num = vrxq;
 477
 478         dev_info->vmdq_pool_base = 0;
 479         dev_info->vmdq_queue_base = 0;
 480 }
 481
 482 /* Configure the device based on the configuration provided */
 483 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 484 {
 485         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 486
 487         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 488         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 489
 490         /* Inherit new configurations */
 491         if (eth_dev->data->nb_rx_queues > bp->max_rx_rings ||
 492             eth_dev->data->nb_tx_queues > bp->max_tx_rings ||
 493             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues + 1 >
 494             bp->max_cp_rings ||
 495             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 496             bp->max_stat_ctx ||
 497             (uint32_t)(eth_dev->data->nb_rx_queues + 1) > bp->max_ring_grps) {
 498                 PMD_DRV_LOG(ERR,
 499                         "Insufficient resources to support requested config\n");
 500                 PMD_DRV_LOG(ERR,
 501                         "Num Queues Requested: Tx %d, Rx %d\n",
 502                         eth_dev->data->nb_tx_queues,
 503                         eth_dev->data->nb_rx_queues);
 504                 PMD_DRV_LOG(ERR,
 505                         "Res available: TxQ %d, RxQ %d, CQ %d Stat %d, Grp %d\n",
 506                         bp->max_tx_rings, bp->max_rx_rings, bp->max_cp_rings,
 507                         bp->max_stat_ctx, bp->max_ring_grps);
 508                 return -ENOSPC;
 509         }
 510
 511         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 512         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 513         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 514         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 515
 516         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 517                 eth_dev->data->mtu =
 518                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 519                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 520         return 0;
 521 }
 522
 523 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 524 {
 525         struct rte_eth_link *link = &eth_dev->data->dev_link;
 526
 527         if (link->link_status)
 528                 PMD_DRV_LOG(INFO, "Port %d Link Up - speed %u Mbps - %s\n",
 529                         eth_dev->data->port_id,
 530                         (uint32_t)link->link_speed,
 531                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 532                         ("full-duplex") : ("half-duplex\n"));
 533         else
 534                 PMD_DRV_LOG(INFO, "Port %d Link Down\n",
 535                         eth_dev->data->port_id);
 536 }
 537
 538 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 539 {
 540         bnxt_print_link_info(eth_dev);
 541         return 0;
 542 }
 543
 544 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 545 {
 546         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 547         int vlan_mask = 0;
 548         int rc;
 549
 550         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 551                 PMD_DRV_LOG(ERR,
 552                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 553                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 554         }
 555         bp->dev_stopped = 0;
 556
 557         rc = bnxt_init_nic(bp);
 558         if (rc)
 559                 goto error;
 560
 561         bnxt_link_update_op(eth_dev, 1);
 562
 563         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 564                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 565         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 566                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 567         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 568         if (rc)
 569                 goto error;
 570
 571         bp->flags |= BNXT_FLAG_INIT_DONE;
 572         return 0;
 573
 574 error:
 575         bnxt_shutdown_nic(bp);
 576         bnxt_free_tx_mbufs(bp);
 577         bnxt_free_rx_mbufs(bp);
 578         return rc;
 579 }
 580
 581 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 582 {
 583         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 584         int rc = 0;
 585
 586         if (!bp->link_info.link_up)
 587                 rc = bnxt_set_hwrm_link_config(bp, true);
 588         if (!rc)
 589                 eth_dev->data->dev_link.link_status = 1;
 590
 591         bnxt_print_link_info(eth_dev);
 592         return 0;
 593 }
 594
 595 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 596 {
 597         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 598
 599         eth_dev->data->dev_link.link_status = 0;
 600         bnxt_set_hwrm_link_config(bp, false);
 601         bp->link_info.link_up = 0;
 602
 603         return 0;
 604 }
 605
 606 /* Unload the driver, release resources */
 607 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 608 {
 609         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 610
 611         if (bp->eth_dev->data->dev_started) {
 612                 /* TBD: STOP HW queues DMA */
 613                 eth_dev->data->dev_link.link_status = 0;
 614         }
 615         bnxt_set_hwrm_link_config(bp, false);
 616         bnxt_hwrm_port_clr_stats(bp);
 617         bp->flags &= ~BNXT_FLAG_INIT_DONE;
 618         bnxt_shutdown_nic(bp);
 619         bp->dev_stopped = 1;
 620 }
 621
 622 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 623 {
 624         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 625
 626         if (bp->dev_stopped == 0)
 627                 bnxt_dev_stop_op(eth_dev);
 628
 629         bnxt_free_tx_mbufs(bp);
 630         bnxt_free_rx_mbufs(bp);
 631         bnxt_free_mem(bp);
 632         if (eth_dev->data->mac_addrs != NULL) {
 633                 rte_free(eth_dev->data->mac_addrs);
 634                 eth_dev->data->mac_addrs = NULL;
 635         }
 636         if (bp->grp_info != NULL) {
 637                 rte_free(bp->grp_info);
 638                 bp->grp_info = NULL;
 639         }
 640 }
 641
 642 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 643                                     uint32_t index)
 644 {
 645         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 646         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 647         struct bnxt_vnic_info *vnic;
 648         struct bnxt_filter_info *filter, *temp_filter;
 649         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 650         uint32_t i;
 651
 652         /*
 653          * Loop through all VNICs from the specified filter flow pools to
 654          * remove the corresponding MAC addr filter
 655          */
 656         for (i = 0; i < pool; i++) {
 657                 if (!(pool_mask & (1ULL << i)))
 658                         continue;
 659
 660                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 661                         filter = STAILQ_FIRST(&vnic->filter);
 662                         while (filter) {
 663                                 temp_filter = STAILQ_NEXT(filter, next);
 664                                 if (filter->mac_index == index) {
 665                                         STAILQ_REMOVE(&vnic->filter, filter,
 666                                                       bnxt_filter_info, next);
 667                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 668                                         filter->mac_index = INVALID_MAC_INDEX;
 669                                         memset(&filter->l2_addr, 0,
 670                                                ETHER_ADDR_LEN);
 671                                         STAILQ_INSERT_TAIL(
 672                                                         &bp->free_filter_list,
 673                                                         filter, next);
 674                                 }
 675                                 filter = temp_filter;
 676                         }
 677                 }
 678         }
 679 }
 680
 681 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 682                                 struct ether_addr *mac_addr,
 683                                 uint32_t index, uint32_t pool)
 684 {
 685         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 686         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 687         struct bnxt_filter_info *filter;
 688
 689         if (BNXT_VF(bp)) {
 690                 PMD_DRV_LOG(ERR, "Cannot add MAC address to a VF interface\n");
 691                 return -ENOTSUP;
 692         }
 693
 694         if (!vnic) {
 695                 PMD_DRV_LOG(ERR, "VNIC not found for pool %d!\n", pool);
 696                 return -EINVAL;
 697         }
 698         /* Attach requested MAC address to the new l2_filter */
 699         STAILQ_FOREACH(filter, &vnic->filter, next) {
 700                 if (filter->mac_index == index) {
 701                         PMD_DRV_LOG(ERR,
 702                                 "MAC addr already existed for pool %d\n", pool);
 703                         return 0;
 704                 }
 705         }
 706         filter = bnxt_alloc_filter(bp);
 707         if (!filter) {
 708                 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 709                 return -ENODEV;
 710         }
 711         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 712         filter->mac_index = index;
 713         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 714         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 715 }
 716
 717 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 718 {
 719         int rc = 0;
 720         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 721         struct rte_eth_link new;
 722         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 723
 724         memset(&new, 0, sizeof(new));
 725         do {
 726                 /* Retrieve link info from hardware */
 727                 rc = bnxt_get_hwrm_link_config(bp, &new);
 728                 if (rc) {
 729                         new.link_speed = ETH_LINK_SPEED_100M;
 730                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 731                         PMD_DRV_LOG(ERR,
 732                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 733                         goto out;
 734                 }
 735                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 736
 737                 if (!wait_to_complete)
 738                         break;
 739         } while (!new.link_status && cnt--);
 740
 741 out:
 742         /* Timed out or success */
 743         if (new.link_status != eth_dev->data->dev_link.link_status ||
 744         new.link_speed != eth_dev->data->dev_link.link_speed) {
 745                 memcpy(&eth_dev->data->dev_link, &new,
 746                         sizeof(struct rte_eth_link));
 747                 bnxt_print_link_info(eth_dev);
 748         }
 749
 750         return rc;
 751 }
 752
 753 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 754 {
 755         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 756         struct bnxt_vnic_info *vnic;
 757
 758         if (bp->vnic_info == NULL)
 759                 return;
 760
 761         vnic = &bp->vnic_info[0];
 762
 763         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 764         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 765 }
 766
 767 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 768 {
 769         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 770         struct bnxt_vnic_info *vnic;
 771
 772         if (bp->vnic_info == NULL)
 773                 return;
 774
 775         vnic = &bp->vnic_info[0];
 776
 777         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 778         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 779 }
 780
 781 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 782 {
 783         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 784         struct bnxt_vnic_info *vnic;
 785
 786         if (bp->vnic_info == NULL)
 787                 return;
 788
 789         vnic = &bp->vnic_info[0];
 790
 791         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 792         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 793 }
 794
 795 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 796 {
 797         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 798         struct bnxt_vnic_info *vnic;
 799
 800         if (bp->vnic_info == NULL)
 801                 return;
 802
 803         vnic = &bp->vnic_info[0];
 804
 805         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 806         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 807 }
 808
 809 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 810                             struct rte_eth_rss_reta_entry64 *reta_conf,
 811                             uint16_t reta_size)
 812 {
 813         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 814         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 815         struct bnxt_vnic_info *vnic;
 816         int i;
 817
 818         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 819                 return -EINVAL;
 820
 821         if (reta_size != HW_HASH_INDEX_SIZE) {
 822                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 823                         "(%d) must equal the size supported by the hardware "
 824                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 825                 return -EINVAL;
 826         }
 827         /* Update the RSS VNIC(s) */
 828         for (i = 0; i < MAX_FF_POOLS; i++) {
 829                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 830                         memcpy(vnic->rss_table, reta_conf, reta_size);
 831
 832                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 833                 }
 834         }
 835         return 0;
 836 }
 837
 838 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 839                               struct rte_eth_rss_reta_entry64 *reta_conf,
 840                               uint16_t reta_size)
 841 {
 842         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 843         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 844         struct rte_intr_handle *intr_handle
 845                 = &bp->pdev->intr_handle;
 846
 847         /* Retrieve from the default VNIC */
 848         if (!vnic)
 849                 return -EINVAL;
 850         if (!vnic->rss_table)
 851                 return -EINVAL;
 852
 853         if (reta_size != HW_HASH_INDEX_SIZE) {
 854                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 855                         "(%d) must equal the size supported by the hardware "
 856                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 857                 return -EINVAL;
 858         }
 859         /* EW - need to revisit here copying from uint64_t to uint16_t */
 860         memcpy(reta_conf, vnic->rss_table, reta_size);
 861
 862         if (rte_intr_allow_others(intr_handle)) {
 863                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 864                         bnxt_dev_lsc_intr_setup(eth_dev);
 865         }
 866
 867         return 0;
 868 }
 869
 870 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 871                                    struct rte_eth_rss_conf *rss_conf)
 872 {
 873         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 874         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 875         struct bnxt_vnic_info *vnic;
 876         uint16_t hash_type = 0;
 877         int i;
 878
 879         /*
 880          * If RSS enablement were different than dev_configure,
 881          * then return -EINVAL
 882          */
 883         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 884                 if (!rss_conf->rss_hf)
 885                         PMD_DRV_LOG(ERR, "Hash type NONE\n");
 886         } else {
 887                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 888                         return -EINVAL;
 889         }
 890
 891         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 892         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 893
 894         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 895                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 896         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 897                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 898         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 899                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 900         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 901                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 902         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 903                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 904         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 905                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 906
 907         /* Update the RSS VNIC(s) */
 908         for (i = 0; i < MAX_FF_POOLS; i++) {
 909                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 910                         vnic->hash_type = hash_type;
 911
 912                         /*
 913                          * Use the supplied key if the key length is
 914                          * acceptable and the rss_key is not NULL
 915                          */
 916                         if (rss_conf->rss_key &&
 917                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 918                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 919                                        rss_conf->rss_key_len);
 920
 921                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 922                 }
 923         }
 924         return 0;
 925 }
 926
 927 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 928                                      struct rte_eth_rss_conf *rss_conf)
 929 {
 930         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 931         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 932         int len;
 933         uint32_t hash_types;
 934
 935         /* RSS configuration is the same for all VNICs */
 936         if (vnic && vnic->rss_hash_key) {
 937                 if (rss_conf->rss_key) {
 938                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 939                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 940                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 941                 }
 942
 943                 hash_types = vnic->hash_type;
 944                 rss_conf->rss_hf = 0;
 945                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 946                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 947                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 948                 }
 949                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 950                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 951                         hash_types &=
 952                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 953                 }
 954                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 955                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 956                         hash_types &=
 957                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 958                 }
 959                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 960                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 961                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 962                 }
 963                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 964                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 965                         hash_types &=
 966                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 967                 }
 968                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 969                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 970                         hash_types &=
 971                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 972                 }
 973                 if (hash_types) {
 974                         PMD_DRV_LOG(ERR,
 975                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 976                                 vnic->hash_type);
 977                         return -ENOTSUP;
 978                 }
 979         } else {
 980                 rss_conf->rss_hf = 0;
 981         }
 982         return 0;
 983 }
 984
 985 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 986                                struct rte_eth_fc_conf *fc_conf)
 987 {
 988         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 989         struct rte_eth_link link_info;
 990         int rc;
 991
 992         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 993         if (rc)
 994                 return rc;
 995
 996         memset(fc_conf, 0, sizeof(*fc_conf));
 997         if (bp->link_info.auto_pause)
 998                 fc_conf->autoneg = 1;
 999         switch (bp->link_info.pause) {
1000         case 0:
1001                 fc_conf->mode = RTE_FC_NONE;
1002                 break;
1003         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1004                 fc_conf->mode = RTE_FC_TX_PAUSE;
1005                 break;
1006         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1007                 fc_conf->mode = RTE_FC_RX_PAUSE;
1008                 break;
1009         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1010                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1011                 fc_conf->mode = RTE_FC_FULL;
1012                 break;
1013         }
1014         return 0;
1015 }
1016
1017 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1018                                struct rte_eth_fc_conf *fc_conf)
1019 {
1020         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1021
1022         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1023                 PMD_DRV_LOG(ERR, "Flow Control Settings cannot be modified\n");
1024                 return -ENOTSUP;
1025         }
1026
1027         switch (fc_conf->mode) {
1028         case RTE_FC_NONE:
1029                 bp->link_info.auto_pause = 0;
1030                 bp->link_info.force_pause = 0;
1031                 break;
1032         case RTE_FC_RX_PAUSE:
1033                 if (fc_conf->autoneg) {
1034                         bp->link_info.auto_pause =
1035                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1036                         bp->link_info.force_pause = 0;
1037                 } else {
1038                         bp->link_info.auto_pause = 0;
1039                         bp->link_info.force_pause =
1040                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1041                 }
1042                 break;
1043         case RTE_FC_TX_PAUSE:
1044                 if (fc_conf->autoneg) {
1045                         bp->link_info.auto_pause =
1046                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1047                         bp->link_info.force_pause = 0;
1048                 } else {
1049                         bp->link_info.auto_pause = 0;
1050                         bp->link_info.force_pause =
1051                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1052                 }
1053                 break;
1054         case RTE_FC_FULL:
1055                 if (fc_conf->autoneg) {
1056                         bp->link_info.auto_pause =
1057                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1058                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1059                         bp->link_info.force_pause = 0;
1060                 } else {
1061                         bp->link_info.auto_pause = 0;
1062                         bp->link_info.force_pause =
1063                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1064                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1065                 }
1066                 break;
1067         }
1068         return bnxt_set_hwrm_link_config(bp, true);
1069 }
1070
1071 /* Add UDP tunneling port */
1072 static int
1073 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1074                          struct rte_eth_udp_tunnel *udp_tunnel)
1075 {
1076         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1077         uint16_t tunnel_type = 0;
1078         int rc = 0;
1079
1080         switch (udp_tunnel->prot_type) {
1081         case RTE_TUNNEL_TYPE_VXLAN:
1082                 if (bp->vxlan_port_cnt) {
1083                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1084                                 udp_tunnel->udp_port);
1085                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1086                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1087                                 return -ENOSPC;
1088                         }
1089                         bp->vxlan_port_cnt++;
1090                         return 0;
1091                 }
1092                 tunnel_type =
1093                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1094                 bp->vxlan_port_cnt++;
1095                 break;
1096         case RTE_TUNNEL_TYPE_GENEVE:
1097                 if (bp->geneve_port_cnt) {
1098                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1099                                 udp_tunnel->udp_port);
1100                         if (bp->geneve_port != udp_tunnel->udp_port) {
1101                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1102                                 return -ENOSPC;
1103                         }
1104                         bp->geneve_port_cnt++;
1105                         return 0;
1106                 }
1107                 tunnel_type =
1108                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1109                 bp->geneve_port_cnt++;
1110                 break;
1111         default:
1112                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1113                 return -ENOTSUP;
1114         }
1115         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1116                                              tunnel_type);
1117         return rc;
1118 }
1119
1120 static int
1121 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1122                          struct rte_eth_udp_tunnel *udp_tunnel)
1123 {
1124         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1125         uint16_t tunnel_type = 0;
1126         uint16_t port = 0;
1127         int rc = 0;
1128
1129         switch (udp_tunnel->prot_type) {
1130         case RTE_TUNNEL_TYPE_VXLAN:
1131                 if (!bp->vxlan_port_cnt) {
1132                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1133                         return -EINVAL;
1134                 }
1135                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1136                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1137                                 udp_tunnel->udp_port, bp->vxlan_port);
1138                         return -EINVAL;
1139                 }
1140                 if (--bp->vxlan_port_cnt)
1141                         return 0;
1142
1143                 tunnel_type =
1144                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1145                 port = bp->vxlan_fw_dst_port_id;
1146                 break;
1147         case RTE_TUNNEL_TYPE_GENEVE:
1148                 if (!bp->geneve_port_cnt) {
1149                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1150                         return -EINVAL;
1151                 }
1152                 if (bp->geneve_port != udp_tunnel->udp_port) {
1153                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1154                                 udp_tunnel->udp_port, bp->geneve_port);
1155                         return -EINVAL;
1156                 }
1157                 if (--bp->geneve_port_cnt)
1158                         return 0;
1159
1160                 tunnel_type =
1161                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1162                 port = bp->geneve_fw_dst_port_id;
1163                 break;
1164         default:
1165                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1166                 return -ENOTSUP;
1167         }
1168
1169         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1170         if (!rc) {
1171                 if (tunnel_type ==
1172                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1173                         bp->vxlan_port = 0;
1174                 if (tunnel_type ==
1175                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1176                         bp->geneve_port = 0;
1177         }
1178         return rc;
1179 }
1180
1181 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1182 {
1183         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1184         struct bnxt_vnic_info *vnic;
1185         unsigned int i;
1186         int rc = 0;
1187         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1188
1189         /* Cycle through all VNICs */
1190         for (i = 0; i < bp->nr_vnics; i++) {
1191                 /*
1192                  * For each VNIC and each associated filter(s)
1193                  * if VLAN exists && VLAN matches vlan_id
1194                  *      remove the MAC+VLAN filter
1195                  *      add a new MAC only filter
1196                  * else
1197                  *      VLAN filter doesn't exist, just skip and continue
1198                  */
1199                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1200                         filter = STAILQ_FIRST(&vnic->filter);
1201                         while (filter) {
1202                                 temp_filter = STAILQ_NEXT(filter, next);
1203
1204                                 if (filter->enables & chk &&
1205                                     filter->l2_ovlan == vlan_id) {
1206                                         /* Must delete the filter */
1207                                         STAILQ_REMOVE(&vnic->filter, filter,
1208                                                       bnxt_filter_info, next);
1209                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1210                                         STAILQ_INSERT_TAIL(
1211                                                         &bp->free_filter_list,
1212                                                         filter, next);
1213
1214                                         /*
1215                                          * Need to examine to see if the MAC
1216                                          * filter already existed or not before
1217                                          * allocating a new one
1218                                          */
1219
1220                                         new_filter = bnxt_alloc_filter(bp);
1221                                         if (!new_filter) {
1222                                                 PMD_DRV_LOG(ERR,
1223                                                         "MAC/VLAN filter alloc failed\n");
1224                                                 rc = -ENOMEM;
1225                                                 goto exit;
1226                                         }
1227                                         STAILQ_INSERT_TAIL(&vnic->filter,
1228                                                            new_filter, next);
1229                                         /* Inherit MAC from previous filter */
1230                                         new_filter->mac_index =
1231                                                         filter->mac_index;
1232                                         memcpy(new_filter->l2_addr,
1233                                                filter->l2_addr, ETHER_ADDR_LEN);
1234                                         /* MAC only filter */
1235                                         rc = bnxt_hwrm_set_l2_filter(bp,
1236                                                         vnic->fw_vnic_id,
1237                                                         new_filter);
1238                                         if (rc)
1239                                                 goto exit;
1240                                         PMD_DRV_LOG(INFO,
1241                                                 "Del Vlan filter for %d\n",
1242                                                 vlan_id);
1243                                 }
1244                                 filter = temp_filter;
1245                         }
1246                 }
1247         }
1248 exit:
1249         return rc;
1250 }
1251
1252 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1253 {
1254         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1255         struct bnxt_vnic_info *vnic;
1256         unsigned int i;
1257         int rc = 0;
1258         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1259                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1260         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1261
1262         /* Cycle through all VNICs */
1263         for (i = 0; i < bp->nr_vnics; i++) {
1264                 /*
1265                  * For each VNIC and each associated filter(s)
1266                  * if VLAN exists:
1267                  *   if VLAN matches vlan_id
1268                  *      VLAN filter already exists, just skip and continue
1269                  *   else
1270                  *      add a new MAC+VLAN filter
1271                  * else
1272                  *   Remove the old MAC only filter
1273                  *    Add a new MAC+VLAN filter
1274                  */
1275                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1276                         filter = STAILQ_FIRST(&vnic->filter);
1277                         while (filter) {
1278                                 temp_filter = STAILQ_NEXT(filter, next);
1279
1280                                 if (filter->enables & chk) {
1281                                         if (filter->l2_ovlan == vlan_id)
1282                                                 goto cont;
1283                                 } else {
1284                                         /* Must delete the MAC filter */
1285                                         STAILQ_REMOVE(&vnic->filter, filter,
1286                                                       bnxt_filter_info, next);
1287                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1288                                         filter->l2_ovlan = 0;
1289                                         STAILQ_INSERT_TAIL(
1290                                                         &bp->free_filter_list,
1291                                                         filter, next);
1292                                 }
1293                                 new_filter = bnxt_alloc_filter(bp);
1294                                 if (!new_filter) {
1295                                         PMD_DRV_LOG(ERR,
1296                                                 "MAC/VLAN filter alloc failed\n");
1297                                         rc = -ENOMEM;
1298                                         goto exit;
1299                                 }
1300                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1301                                                    next);
1302                                 /* Inherit MAC from the previous filter */
1303                                 new_filter->mac_index = filter->mac_index;
1304                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1305                                        ETHER_ADDR_LEN);
1306                                 /* MAC + VLAN ID filter */
1307                                 new_filter->l2_ovlan = vlan_id;
1308                                 new_filter->l2_ovlan_mask = 0xF000;
1309                                 new_filter->enables |= en;
1310                                 rc = bnxt_hwrm_set_l2_filter(bp,
1311                                                              vnic->fw_vnic_id,
1312                                                              new_filter);
1313                                 if (rc)
1314                                         goto exit;
1315                                 PMD_DRV_LOG(INFO,
1316                                         "Added Vlan filter for %d\n", vlan_id);
1317 cont:
1318                                 filter = temp_filter;
1319                         }
1320                 }
1321         }
1322 exit:
1323         return rc;
1324 }
1325
1326 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1327                                    uint16_t vlan_id, int on)
1328 {
1329         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1330
1331         /* These operations apply to ALL existing MAC/VLAN filters */
1332         if (on)
1333                 return bnxt_add_vlan_filter(bp, vlan_id);
1334         else
1335                 return bnxt_del_vlan_filter(bp, vlan_id);
1336 }
1337
1338 static int
1339 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1340 {
1341         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1342         unsigned int i;
1343
1344         if (mask & ETH_VLAN_FILTER_MASK) {
1345                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1346                         /* Remove any VLAN filters programmed */
1347                         for (i = 0; i < 4095; i++)
1348                                 bnxt_del_vlan_filter(bp, i);
1349                 }
1350                 PMD_DRV_LOG(DEBUG, "VLAN Filtering: %d\n",
1351                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1352         }
1353
1354         if (mask & ETH_VLAN_STRIP_MASK) {
1355                 /* Enable or disable VLAN stripping */
1356                 for (i = 0; i < bp->nr_vnics; i++) {
1357                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1358                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1359                                 vnic->vlan_strip = true;
1360                         else
1361                                 vnic->vlan_strip = false;
1362                         bnxt_hwrm_vnic_cfg(bp, vnic);
1363                 }
1364                 PMD_DRV_LOG(DEBUG, "VLAN Strip Offload: %d\n",
1365                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1366         }
1367
1368         if (mask & ETH_VLAN_EXTEND_MASK)
1369                 PMD_DRV_LOG(ERR, "Extend VLAN Not supported\n");
1370
1371         return 0;
1372 }
1373
1374 static void
1375 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1376 {
1377         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1378         /* Default Filter is tied to VNIC 0 */
1379         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1380         struct bnxt_filter_info *filter;
1381         int rc;
1382
1383         if (BNXT_VF(bp))
1384                 return;
1385
1386         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1387
1388         STAILQ_FOREACH(filter, &vnic->filter, next) {
1389                 /* Default Filter is at Index 0 */
1390                 if (filter->mac_index != 0)
1391                         continue;
1392                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1393                 if (rc)
1394                         break;
1395                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1396                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1397                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1398                 filter->enables |=
1399                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1400                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1401                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1402                 if (rc)
1403                         break;
1404                 filter->mac_index = 0;
1405                 PMD_DRV_LOG(DEBUG, "Set MAC addr\n");
1406         }
1407 }
1408
1409 static int
1410 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1411                           struct ether_addr *mc_addr_set,
1412                           uint32_t nb_mc_addr)
1413 {
1414         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1415         char *mc_addr_list = (char *)mc_addr_set;
1416         struct bnxt_vnic_info *vnic;
1417         uint32_t off = 0, i = 0;
1418
1419         vnic = &bp->vnic_info[0];
1420
1421         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1422                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1423                 goto allmulti;
1424         }
1425
1426         /* TODO Check for Duplicate mcast addresses */
1427         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1428         for (i = 0; i < nb_mc_addr; i++) {
1429                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1430                 off += ETHER_ADDR_LEN;
1431         }
1432
1433         vnic->mc_addr_cnt = i;
1434
1435 allmulti:
1436         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1437 }
1438
1439 static int
1440 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1441 {
1442         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1443         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1444         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1445         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1446         int ret;
1447
1448         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1449                         fw_major, fw_minor, fw_updt);
1450
1451         ret += 1; /* add the size of '\0' */
1452         if (fw_size < (uint32_t)ret)
1453                 return ret;
1454         else
1455                 return 0;
1456 }
1457
1458 static void
1459 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1460         struct rte_eth_rxq_info *qinfo)
1461 {
1462         struct bnxt_rx_queue *rxq;
1463
1464         rxq = dev->data->rx_queues[queue_id];
1465
1466         qinfo->mp = rxq->mb_pool;
1467         qinfo->scattered_rx = dev->data->scattered_rx;
1468         qinfo->nb_desc = rxq->nb_rx_desc;
1469
1470         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1471         qinfo->conf.rx_drop_en = 0;
1472         qinfo->conf.rx_deferred_start = 0;
1473 }
1474
1475 static void
1476 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1477         struct rte_eth_txq_info *qinfo)
1478 {
1479         struct bnxt_tx_queue *txq;
1480
1481         txq = dev->data->tx_queues[queue_id];
1482
1483         qinfo->nb_desc = txq->nb_tx_desc;
1484
1485         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1486         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1487         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1488
1489         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1490         qinfo->conf.tx_rs_thresh = 0;
1491         qinfo->conf.txq_flags = txq->txq_flags;
1492         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1493 }
1494
1495 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1496 {
1497         struct bnxt *bp = eth_dev->data->dev_private;
1498         struct rte_eth_dev_info dev_info;
1499         uint32_t max_dev_mtu;
1500         uint32_t rc = 0;
1501         uint32_t i;
1502
1503         bnxt_dev_info_get_op(eth_dev, &dev_info);
1504         max_dev_mtu = dev_info.max_rx_pktlen -
1505                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1506
1507         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1508                 PMD_DRV_LOG(ERR, "MTU requested must be within (%d, %d)\n",
1509                         ETHER_MIN_MTU, max_dev_mtu);
1510                 return -EINVAL;
1511         }
1512
1513
1514         if (new_mtu > ETHER_MTU) {
1515                 bp->flags |= BNXT_FLAG_JUMBO;
1516                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1517         } else {
1518                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1519                 bp->flags &= ~BNXT_FLAG_JUMBO;
1520         }
1521
1522         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1523                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1524
1525         eth_dev->data->mtu = new_mtu;
1526         PMD_DRV_LOG(INFO, "New MTU is %d\n", eth_dev->data->mtu);
1527
1528         for (i = 0; i < bp->nr_vnics; i++) {
1529                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1530
1531                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1532                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1533                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1534                 if (rc)
1535                         break;
1536
1537                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1538                 if (rc)
1539                         return rc;
1540         }
1541
1542         return rc;
1543 }
1544
1545 static int
1546 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1547 {
1548         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1549         uint16_t vlan = bp->vlan;
1550         int rc;
1551
1552         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1553                 PMD_DRV_LOG(ERR,
1554                         "PVID cannot be modified for this function\n");
1555                 return -ENOTSUP;
1556         }
1557         bp->vlan = on ? pvid : 0;
1558
1559         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1560         if (rc)
1561                 bp->vlan = vlan;
1562         return rc;
1563 }
1564
1565 static int
1566 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1567 {
1568         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1569
1570         return bnxt_hwrm_port_led_cfg(bp, true);
1571 }
1572
1573 static int
1574 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1575 {
1576         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1577
1578         return bnxt_hwrm_port_led_cfg(bp, false);
1579 }
1580
1581 static uint32_t
1582 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1583 {
1584         uint32_t desc = 0, raw_cons = 0, cons;
1585         struct bnxt_cp_ring_info *cpr;
1586         struct bnxt_rx_queue *rxq;
1587         struct rx_pkt_cmpl *rxcmp;
1588         uint16_t cmp_type;
1589         uint8_t cmp = 1;
1590         bool valid;
1591
1592         rxq = dev->data->rx_queues[rx_queue_id];
1593         cpr = rxq->cp_ring;
1594         valid = cpr->valid;
1595
1596         while (raw_cons < rxq->nb_rx_desc) {
1597                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1598                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1599
1600                 if (!CMPL_VALID(rxcmp, valid))
1601                         goto nothing_to_do;
1602                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1603                 cmp_type = CMP_TYPE(rxcmp);
1604                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1605                         cmp = (rte_le_to_cpu_32(
1606                                         ((struct rx_tpa_end_cmpl *)
1607                                          (rxcmp))->agg_bufs_v1) &
1608                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1609                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1610                         desc++;
1611                 } else if (cmp_type == 0x11) {
1612                         desc++;
1613                         cmp = (rxcmp->agg_bufs_v1 &
1614                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1615                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1616                 } else {
1617                         cmp = 1;
1618                 }
1619 nothing_to_do:
1620                 raw_cons += cmp ? cmp : 2;
1621         }
1622
1623         return desc;
1624 }
1625
1626 static int
1627 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1628 {
1629         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1630         struct bnxt_rx_ring_info *rxr;
1631         struct bnxt_cp_ring_info *cpr;
1632         struct bnxt_sw_rx_bd *rx_buf;
1633         struct rx_pkt_cmpl *rxcmp;
1634         uint32_t cons, cp_cons;
1635
1636         if (!rxq)
1637                 return -EINVAL;
1638
1639         cpr = rxq->cp_ring;
1640         rxr = rxq->rx_ring;
1641
1642         if (offset >= rxq->nb_rx_desc)
1643                 return -EINVAL;
1644
1645         cons = RING_CMP(cpr->cp_ring_struct, offset);
1646         cp_cons = cpr->cp_raw_cons;
1647         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1648
1649         if (cons > cp_cons) {
1650                 if (CMPL_VALID(rxcmp, cpr->valid))
1651                         return RTE_ETH_RX_DESC_DONE;
1652         } else {
1653                 if (CMPL_VALID(rxcmp, !cpr->valid))
1654                         return RTE_ETH_RX_DESC_DONE;
1655         }
1656         rx_buf = &rxr->rx_buf_ring[cons];
1657         if (rx_buf->mbuf == NULL)
1658                 return RTE_ETH_RX_DESC_UNAVAIL;
1659
1660
1661         return RTE_ETH_RX_DESC_AVAIL;
1662 }
1663
1664 static int
1665 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1666 {
1667         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1668         struct bnxt_tx_ring_info *txr;
1669         struct bnxt_cp_ring_info *cpr;
1670         struct bnxt_sw_tx_bd *tx_buf;
1671         struct tx_pkt_cmpl *txcmp;
1672         uint32_t cons, cp_cons;
1673
1674         if (!txq)
1675                 return -EINVAL;
1676
1677         cpr = txq->cp_ring;
1678         txr = txq->tx_ring;
1679
1680         if (offset >= txq->nb_tx_desc)
1681                 return -EINVAL;
1682
1683         cons = RING_CMP(cpr->cp_ring_struct, offset);
1684         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1685         cp_cons = cpr->cp_raw_cons;
1686
1687         if (cons > cp_cons) {
1688                 if (CMPL_VALID(txcmp, cpr->valid))
1689                         return RTE_ETH_TX_DESC_UNAVAIL;
1690         } else {
1691                 if (CMPL_VALID(txcmp, !cpr->valid))
1692                         return RTE_ETH_TX_DESC_UNAVAIL;
1693         }
1694         tx_buf = &txr->tx_buf_ring[cons];
1695         if (tx_buf->mbuf == NULL)
1696                 return RTE_ETH_TX_DESC_DONE;
1697
1698         return RTE_ETH_TX_DESC_FULL;
1699 }
1700
1701 static struct bnxt_filter_info *
1702 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1703                                 struct rte_eth_ethertype_filter *efilter,
1704                                 struct bnxt_vnic_info *vnic0,
1705                                 struct bnxt_vnic_info *vnic,
1706                                 int *ret)
1707 {
1708         struct bnxt_filter_info *mfilter = NULL;
1709         int match = 0;
1710         *ret = 0;
1711
1712         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1713                 efilter->ether_type == ETHER_TYPE_IPv6) {
1714                 PMD_DRV_LOG(ERR, "invalid ether_type(0x%04x) in"
1715                         " ethertype filter.", efilter->ether_type);
1716                 *ret = -EINVAL;
1717                 goto exit;
1718         }
1719         if (efilter->queue >= bp->rx_nr_rings) {
1720                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1721                 *ret = -EINVAL;
1722                 goto exit;
1723         }
1724
1725         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1726         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1727         if (vnic == NULL) {
1728                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1729                 *ret = -EINVAL;
1730                 goto exit;
1731         }
1732
1733         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1734                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1735                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1736                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1737                              mfilter->flags ==
1738                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1739                              mfilter->ethertype == efilter->ether_type)) {
1740                                 match = 1;
1741                                 break;
1742                         }
1743                 }
1744         } else {
1745                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1746                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1747                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1748                              mfilter->ethertype == efilter->ether_type &&
1749                              mfilter->flags ==
1750                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1751                                 match = 1;
1752                                 break;
1753                         }
1754         }
1755
1756         if (match)
1757                 *ret = -EEXIST;
1758
1759 exit:
1760         return mfilter;
1761 }
1762
1763 static int
1764 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1765                         enum rte_filter_op filter_op,
1766                         void *arg)
1767 {
1768         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1769         struct rte_eth_ethertype_filter *efilter =
1770                         (struct rte_eth_ethertype_filter *)arg;
1771         struct bnxt_filter_info *bfilter, *filter1;
1772         struct bnxt_vnic_info *vnic, *vnic0;
1773         int ret;
1774
1775         if (filter_op == RTE_ETH_FILTER_NOP)
1776                 return 0;
1777
1778         if (arg == NULL) {
1779                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
1780                             filter_op);
1781                 return -EINVAL;
1782         }
1783
1784         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1785         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1786
1787         switch (filter_op) {
1788         case RTE_ETH_FILTER_ADD:
1789                 bnxt_match_and_validate_ether_filter(bp, efilter,
1790                                                         vnic0, vnic, &ret);
1791                 if (ret < 0)
1792                         return ret;
1793
1794                 bfilter = bnxt_get_unused_filter(bp);
1795                 if (bfilter == NULL) {
1796                         PMD_DRV_LOG(ERR,
1797                                 "Not enough resources for a new filter.\n");
1798                         return -ENOMEM;
1799                 }
1800                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1801                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1802                        ETHER_ADDR_LEN);
1803                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1804                        ETHER_ADDR_LEN);
1805                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1806                 bfilter->ethertype = efilter->ether_type;
1807                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1808
1809                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1810                 if (filter1 == NULL) {
1811                         ret = -1;
1812                         goto cleanup;
1813                 }
1814                 bfilter->enables |=
1815                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1816                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1817
1818                 bfilter->dst_id = vnic->fw_vnic_id;
1819
1820                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1821                         bfilter->flags =
1822                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1823                 }
1824
1825                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1826                 if (ret)
1827                         goto cleanup;
1828                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1829                 break;
1830         case RTE_ETH_FILTER_DELETE:
1831                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1832                                                         vnic0, vnic, &ret);
1833                 if (ret == -EEXIST) {
1834                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1835
1836                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1837                                       next);
1838                         bnxt_free_filter(bp, filter1);
1839                 } else if (ret == 0) {
1840                         PMD_DRV_LOG(ERR, "No matching filter found\n");
1841                 }
1842                 break;
1843         default:
1844                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
1845                 ret = -EINVAL;
1846                 goto error;
1847         }
1848         return ret;
1849 cleanup:
1850         bnxt_free_filter(bp, bfilter);
1851 error:
1852         return ret;
1853 }
1854
1855 static inline int
1856 parse_ntuple_filter(struct bnxt *bp,
1857                     struct rte_eth_ntuple_filter *nfilter,
1858                     struct bnxt_filter_info *bfilter)
1859 {
1860         uint32_t en = 0;
1861
1862         if (nfilter->queue >= bp->rx_nr_rings) {
1863                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", nfilter->queue);
1864                 return -EINVAL;
1865         }
1866
1867         switch (nfilter->dst_port_mask) {
1868         case UINT16_MAX:
1869                 bfilter->dst_port_mask = -1;
1870                 bfilter->dst_port = nfilter->dst_port;
1871                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1872                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1873                 break;
1874         default:
1875                 PMD_DRV_LOG(ERR, "invalid dst_port mask.");
1876                 return -EINVAL;
1877         }
1878
1879         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1880         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1881
1882         switch (nfilter->proto_mask) {
1883         case UINT8_MAX:
1884                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1885                         bfilter->ip_protocol = 17;
1886                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1887                         bfilter->ip_protocol = 6;
1888                 else
1889                         return -EINVAL;
1890                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1891                 break;
1892         default:
1893                 PMD_DRV_LOG(ERR, "invalid protocol mask.");
1894                 return -EINVAL;
1895         }
1896
1897         switch (nfilter->dst_ip_mask) {
1898         case UINT32_MAX:
1899                 bfilter->dst_ipaddr_mask[0] = -1;
1900                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1901                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1902                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1903                 break;
1904         default:
1905                 PMD_DRV_LOG(ERR, "invalid dst_ip mask.");
1906                 return -EINVAL;
1907         }
1908
1909         switch (nfilter->src_ip_mask) {
1910         case UINT32_MAX:
1911                 bfilter->src_ipaddr_mask[0] = -1;
1912                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1913                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1914                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1915                 break;
1916         default:
1917                 PMD_DRV_LOG(ERR, "invalid src_ip mask.");
1918                 return -EINVAL;
1919         }
1920
1921         switch (nfilter->src_port_mask) {
1922         case UINT16_MAX:
1923                 bfilter->src_port_mask = -1;
1924                 bfilter->src_port = nfilter->src_port;
1925                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1926                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1927                 break;
1928         default:
1929                 PMD_DRV_LOG(ERR, "invalid src_port mask.");
1930                 return -EINVAL;
1931         }
1932
1933         //TODO Priority
1934         //nfilter->priority = (uint8_t)filter->priority;
1935
1936         bfilter->enables = en;
1937         return 0;
1938 }
1939
1940 static struct bnxt_filter_info*
1941 bnxt_match_ntuple_filter(struct bnxt *bp,
1942                          struct bnxt_filter_info *bfilter,
1943                          struct bnxt_vnic_info **mvnic)
1944 {
1945         struct bnxt_filter_info *mfilter = NULL;
1946         int i;
1947
1948         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1949                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1950                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1951                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1952                             bfilter->src_ipaddr_mask[0] ==
1953                             mfilter->src_ipaddr_mask[0] &&
1954                             bfilter->src_port == mfilter->src_port &&
1955                             bfilter->src_port_mask == mfilter->src_port_mask &&
1956                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1957                             bfilter->dst_ipaddr_mask[0] ==
1958                             mfilter->dst_ipaddr_mask[0] &&
1959                             bfilter->dst_port == mfilter->dst_port &&
1960                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
1961                             bfilter->flags == mfilter->flags &&
1962                             bfilter->enables == mfilter->enables) {
1963                                 if (mvnic)
1964                                         *mvnic = vnic;
1965                                 return mfilter;
1966                         }
1967                 }
1968         }
1969         return NULL;
1970 }
1971
1972 static int
1973 bnxt_cfg_ntuple_filter(struct bnxt *bp,
1974                        struct rte_eth_ntuple_filter *nfilter,
1975                        enum rte_filter_op filter_op)
1976 {
1977         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
1978         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
1979         int ret;
1980
1981         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
1982                 PMD_DRV_LOG(ERR, "only 5tuple is supported.");
1983                 return -EINVAL;
1984         }
1985
1986         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
1987                 PMD_DRV_LOG(ERR, "Ntuple filter: TCP flags not supported\n");
1988                 return -EINVAL;
1989         }
1990
1991         bfilter = bnxt_get_unused_filter(bp);
1992         if (bfilter == NULL) {
1993                 PMD_DRV_LOG(ERR,
1994                         "Not enough resources for a new filter.\n");
1995                 return -ENOMEM;
1996         }
1997         ret = parse_ntuple_filter(bp, nfilter, bfilter);
1998         if (ret < 0)
1999                 goto free_filter;
2000
2001         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2002         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2003         filter1 = STAILQ_FIRST(&vnic0->filter);
2004         if (filter1 == NULL) {
2005                 ret = -1;
2006                 goto free_filter;
2007         }
2008
2009         bfilter->dst_id = vnic->fw_vnic_id;
2010         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2011         bfilter->enables |=
2012                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2013         bfilter->ethertype = 0x800;
2014         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2015
2016         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2017
2018         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2019             bfilter->dst_id == mfilter->dst_id) {
2020                 PMD_DRV_LOG(ERR, "filter exists.\n");
2021                 ret = -EEXIST;
2022                 goto free_filter;
2023         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2024                    bfilter->dst_id != mfilter->dst_id) {
2025                 mfilter->dst_id = vnic->fw_vnic_id;
2026                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2027                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2028                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2029                 PMD_DRV_LOG(ERR, "filter with matching pattern exists.\n");
2030                 PMD_DRV_LOG(ERR, " Updated it to the new destination queue\n");
2031                 goto free_filter;
2032         }
2033         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2034                 PMD_DRV_LOG(ERR, "filter doesn't exist.");
2035                 ret = -ENOENT;
2036                 goto free_filter;
2037         }
2038
2039         if (filter_op == RTE_ETH_FILTER_ADD) {
2040                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2041                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2042                 if (ret)
2043                         goto free_filter;
2044                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2045         } else {
2046                 if (mfilter == NULL) {
2047                         /* This should not happen. But for Coverity! */
2048                         ret = -ENOENT;
2049                         goto free_filter;
2050                 }
2051                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2052
2053                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2054                 bnxt_free_filter(bp, mfilter);
2055                 mfilter->fw_l2_filter_id = -1;
2056                 bnxt_free_filter(bp, bfilter);
2057                 bfilter->fw_l2_filter_id = -1;
2058         }
2059
2060         return 0;
2061 free_filter:
2062         bfilter->fw_l2_filter_id = -1;
2063         bnxt_free_filter(bp, bfilter);
2064         return ret;
2065 }
2066
2067 static int
2068 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2069                         enum rte_filter_op filter_op,
2070                         void *arg)
2071 {
2072         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2073         int ret;
2074
2075         if (filter_op == RTE_ETH_FILTER_NOP)
2076                 return 0;
2077
2078         if (arg == NULL) {
2079                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
2080                             filter_op);
2081                 return -EINVAL;
2082         }
2083
2084         switch (filter_op) {
2085         case RTE_ETH_FILTER_ADD:
2086                 ret = bnxt_cfg_ntuple_filter(bp,
2087                         (struct rte_eth_ntuple_filter *)arg,
2088                         filter_op);
2089                 break;
2090         case RTE_ETH_FILTER_DELETE:
2091                 ret = bnxt_cfg_ntuple_filter(bp,
2092                         (struct rte_eth_ntuple_filter *)arg,
2093                         filter_op);
2094                 break;
2095         default:
2096                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
2097                 ret = -EINVAL;
2098                 break;
2099         }
2100         return ret;
2101 }
2102
2103 static int
2104 bnxt_parse_fdir_filter(struct bnxt *bp,
2105                        struct rte_eth_fdir_filter *fdir,
2106                        struct bnxt_filter_info *filter)
2107 {
2108         enum rte_fdir_mode fdir_mode =
2109                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2110         struct bnxt_vnic_info *vnic0, *vnic;
2111         struct bnxt_filter_info *filter1;
2112         uint32_t en = 0;
2113         int i;
2114
2115         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2116                 return -EINVAL;
2117
2118         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2119         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2120
2121         switch (fdir->input.flow_type) {
2122         case RTE_ETH_FLOW_IPV4:
2123         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2124                 /* FALLTHROUGH */
2125                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2126                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2127                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2128                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2129                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2130                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2131                 filter->ip_addr_type =
2132                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2133                 filter->src_ipaddr_mask[0] = 0xffffffff;
2134                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2135                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2136                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2137                 filter->ethertype = 0x800;
2138                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2139                 break;
2140         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2141                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2142                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2143                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2144                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2145                 filter->dst_port_mask = 0xffff;
2146                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2147                 filter->src_port_mask = 0xffff;
2148                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2149                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2150                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2151                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2152                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2153                 filter->ip_protocol = 6;
2154                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2155                 filter->ip_addr_type =
2156                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2157                 filter->src_ipaddr_mask[0] = 0xffffffff;
2158                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2159                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2160                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2161                 filter->ethertype = 0x800;
2162                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2163                 break;
2164         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2165                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2166                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2167                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2168                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2169                 filter->dst_port_mask = 0xffff;
2170                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2171                 filter->src_port_mask = 0xffff;
2172                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2173                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2174                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2175                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2176                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2177                 filter->ip_protocol = 17;
2178                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2179                 filter->ip_addr_type =
2180                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2181                 filter->src_ipaddr_mask[0] = 0xffffffff;
2182                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2183                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2184                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2185                 filter->ethertype = 0x800;
2186                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2187                 break;
2188         case RTE_ETH_FLOW_IPV6:
2189         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2190                 /* FALLTHROUGH */
2191                 filter->ip_addr_type =
2192                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2193                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2194                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2195                 rte_memcpy(filter->src_ipaddr,
2196                            fdir->input.flow.ipv6_flow.src_ip, 16);
2197                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2198                 rte_memcpy(filter->dst_ipaddr,
2199                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2200                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2201                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2202                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2203                 memset(filter->src_ipaddr_mask, 0xff, 16);
2204                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2205                 filter->ethertype = 0x86dd;
2206                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2207                 break;
2208         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2209                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2210                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2211                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2212                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2213                 filter->dst_port_mask = 0xffff;
2214                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2215                 filter->src_port_mask = 0xffff;
2216                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2217                 filter->ip_addr_type =
2218                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2219                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2220                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2221                 rte_memcpy(filter->src_ipaddr,
2222                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2223                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2224                 rte_memcpy(filter->dst_ipaddr,
2225                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2226                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2227                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2228                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2229                 memset(filter->src_ipaddr_mask, 0xff, 16);
2230                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2231                 filter->ethertype = 0x86dd;
2232                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2233                 break;
2234         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2235                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2236                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2237                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2238                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2239                 filter->dst_port_mask = 0xffff;
2240                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2241                 filter->src_port_mask = 0xffff;
2242                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2243                 filter->ip_addr_type =
2244                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2245                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2246                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2247                 rte_memcpy(filter->src_ipaddr,
2248                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2249                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2250                 rte_memcpy(filter->dst_ipaddr,
2251                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2252                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2253                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2254                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2255                 memset(filter->src_ipaddr_mask, 0xff, 16);
2256                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2257                 filter->ethertype = 0x86dd;
2258                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2259                 break;
2260         case RTE_ETH_FLOW_L2_PAYLOAD:
2261                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2262                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2263                 break;
2264         case RTE_ETH_FLOW_VXLAN:
2265                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2266                         return -EINVAL;
2267                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2268                 filter->tunnel_type =
2269                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2270                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2271                 break;
2272         case RTE_ETH_FLOW_NVGRE:
2273                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2274                         return -EINVAL;
2275                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2276                 filter->tunnel_type =
2277                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2278                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2279                 break;
2280         case RTE_ETH_FLOW_UNKNOWN:
2281         case RTE_ETH_FLOW_RAW:
2282         case RTE_ETH_FLOW_FRAG_IPV4:
2283         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2284         case RTE_ETH_FLOW_FRAG_IPV6:
2285         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2286         case RTE_ETH_FLOW_IPV6_EX:
2287         case RTE_ETH_FLOW_IPV6_TCP_EX:
2288         case RTE_ETH_FLOW_IPV6_UDP_EX:
2289         case RTE_ETH_FLOW_GENEVE:
2290                 /* FALLTHROUGH */
2291         default:
2292                 return -EINVAL;
2293         }
2294
2295         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2296         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2297         if (vnic == NULL) {
2298                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", fdir->action.rx_queue);
2299                 return -EINVAL;
2300         }
2301
2302
2303         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2304                 rte_memcpy(filter->dst_macaddr,
2305                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2306                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2307         }
2308
2309         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2310                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2311                 filter1 = STAILQ_FIRST(&vnic0->filter);
2312                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2313         } else {
2314                 filter->dst_id = vnic->fw_vnic_id;
2315                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2316                         if (filter->dst_macaddr[i] == 0x00)
2317                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2318                         else
2319                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2320         }
2321
2322         if (filter1 == NULL)
2323                 return -EINVAL;
2324
2325         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2326         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2327
2328         filter->enables = en;
2329
2330         return 0;
2331 }
2332
2333 static struct bnxt_filter_info *
2334 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf,
2335                 struct bnxt_vnic_info **mvnic)
2336 {
2337         struct bnxt_filter_info *mf = NULL;
2338         int i;
2339
2340         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2341                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2342
2343                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2344                         if (mf->filter_type == nf->filter_type &&
2345                             mf->flags == nf->flags &&
2346                             mf->src_port == nf->src_port &&
2347                             mf->src_port_mask == nf->src_port_mask &&
2348                             mf->dst_port == nf->dst_port &&
2349                             mf->dst_port_mask == nf->dst_port_mask &&
2350                             mf->ip_protocol == nf->ip_protocol &&
2351                             mf->ip_addr_type == nf->ip_addr_type &&
2352                             mf->ethertype == nf->ethertype &&
2353                             mf->vni == nf->vni &&
2354                             mf->tunnel_type == nf->tunnel_type &&
2355                             mf->l2_ovlan == nf->l2_ovlan &&
2356                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2357                             mf->l2_ivlan == nf->l2_ivlan &&
2358                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2359                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2360                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2361                                     ETHER_ADDR_LEN) &&
2362                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2363                                     ETHER_ADDR_LEN) &&
2364                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2365                                     ETHER_ADDR_LEN) &&
2366                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2367                                     sizeof(nf->src_ipaddr)) &&
2368                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2369                                     sizeof(nf->src_ipaddr_mask)) &&
2370                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2371                                     sizeof(nf->dst_ipaddr)) &&
2372                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2373                                     sizeof(nf->dst_ipaddr_mask))) {
2374                                 if (mvnic)
2375                                         *mvnic = vnic;
2376                                 return mf;
2377                         }
2378                 }
2379         }
2380         return NULL;
2381 }
2382
2383 static int
2384 bnxt_fdir_filter(struct rte_eth_dev *dev,
2385                  enum rte_filter_op filter_op,
2386                  void *arg)
2387 {
2388         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2389         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2390         struct bnxt_filter_info *filter, *match;
2391         struct bnxt_vnic_info *vnic, *mvnic;
2392         int ret = 0, i;
2393
2394         if (filter_op == RTE_ETH_FILTER_NOP)
2395                 return 0;
2396
2397         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2398                 return -EINVAL;
2399
2400         switch (filter_op) {
2401         case RTE_ETH_FILTER_ADD:
2402         case RTE_ETH_FILTER_DELETE:
2403                 filter = bnxt_get_unused_filter(bp);
2404                 if (filter == NULL) {
2405                         PMD_DRV_LOG(ERR,
2406                                 "Not enough resources for a new flow.\n");
2407                         return -ENOMEM;
2408                 }
2409
2410                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2411                 if (ret != 0)
2412                         goto free_filter;
2413                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2414
2415                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2416                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2417                 else
2418                         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2419
2420                 match = bnxt_match_fdir(bp, filter, &mvnic);
2421                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2422                         if (match->dst_id == vnic->fw_vnic_id) {
2423                                 PMD_DRV_LOG(ERR, "Flow already exists.\n");
2424                                 ret = -EEXIST;
2425                                 goto free_filter;
2426                         } else {
2427                                 match->dst_id = vnic->fw_vnic_id;
2428                                 ret = bnxt_hwrm_set_ntuple_filter(bp,
2429                                                                   match->dst_id,
2430                                                                   match);
2431                                 STAILQ_REMOVE(&mvnic->filter, match,
2432                                               bnxt_filter_info, next);
2433                                 STAILQ_INSERT_TAIL(&vnic->filter, match, next);
2434                                 PMD_DRV_LOG(ERR,
2435                                         "Filter with matching pattern exist\n");
2436                                 PMD_DRV_LOG(ERR,
2437                                         "Updated it to new destination q\n");
2438                                 goto free_filter;
2439                         }
2440                 }
2441                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2442                         PMD_DRV_LOG(ERR, "Flow does not exist.\n");
2443                         ret = -ENOENT;
2444                         goto free_filter;
2445                 }
2446
2447                 if (filter_op == RTE_ETH_FILTER_ADD) {
2448                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2449                                                           filter->dst_id,
2450                                                           filter);
2451                         if (ret)
2452                                 goto free_filter;
2453                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2454                 } else {
2455                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2456                         STAILQ_REMOVE(&vnic->filter, match,
2457                                       bnxt_filter_info, next);
2458                         bnxt_free_filter(bp, match);
2459                         filter->fw_l2_filter_id = -1;
2460                         bnxt_free_filter(bp, filter);
2461                 }
2462                 break;
2463         case RTE_ETH_FILTER_FLUSH:
2464                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2465                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2466
2467                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2468                                 if (filter->filter_type ==
2469                                     HWRM_CFA_NTUPLE_FILTER) {
2470                                         ret =
2471                                         bnxt_hwrm_clear_ntuple_filter(bp,
2472                                                                       filter);
2473                                         STAILQ_REMOVE(&vnic->filter, filter,
2474                                                       bnxt_filter_info, next);
2475                                 }
2476                         }
2477                 }
2478                 return ret;
2479         case RTE_ETH_FILTER_UPDATE:
2480         case RTE_ETH_FILTER_STATS:
2481         case RTE_ETH_FILTER_INFO:
2482                 PMD_DRV_LOG(ERR, "operation %u not implemented", filter_op);
2483                 break;
2484         default:
2485                 PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
2486                 ret = -EINVAL;
2487                 break;
2488         }
2489         return ret;
2490
2491 free_filter:
2492         filter->fw_l2_filter_id = -1;
2493         bnxt_free_filter(bp, filter);
2494         return ret;
2495 }
2496
2497 static int
2498 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2499                     enum rte_filter_type filter_type,
2500                     enum rte_filter_op filter_op, void *arg)
2501 {
2502         int ret = 0;
2503
2504         switch (filter_type) {
2505         case RTE_ETH_FILTER_TUNNEL:
2506                 PMD_DRV_LOG(ERR,
2507                         "filter type: %d: To be implemented\n", filter_type);
2508                 break;
2509         case RTE_ETH_FILTER_FDIR:
2510                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2511                 break;
2512         case RTE_ETH_FILTER_NTUPLE:
2513                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2514                 break;
2515         case RTE_ETH_FILTER_ETHERTYPE:
2516                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2517                 break;
2518         case RTE_ETH_FILTER_GENERIC:
2519                 if (filter_op != RTE_ETH_FILTER_GET)
2520                         return -EINVAL;
2521                 *(const void **)arg = &bnxt_flow_ops;
2522                 break;
2523         default:
2524                 PMD_DRV_LOG(ERR,
2525                         "Filter type (%d) not supported", filter_type);
2526                 ret = -EINVAL;
2527                 break;
2528         }
2529         return ret;
2530 }
2531
2532 static const uint32_t *
2533 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2534 {
2535         static const uint32_t ptypes[] = {
2536                 RTE_PTYPE_L2_ETHER_VLAN,
2537                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2538                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2539                 RTE_PTYPE_L4_ICMP,
2540                 RTE_PTYPE_L4_TCP,
2541                 RTE_PTYPE_L4_UDP,
2542                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2543                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2544                 RTE_PTYPE_INNER_L4_ICMP,
2545                 RTE_PTYPE_INNER_L4_TCP,
2546                 RTE_PTYPE_INNER_L4_UDP,
2547                 RTE_PTYPE_UNKNOWN
2548         };
2549
2550         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2551                 return ptypes;
2552         return NULL;
2553 }
2554
2555 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2556                          int reg_win)
2557 {
2558         uint32_t reg_base = *reg_arr & 0xfffff000;
2559         uint32_t win_off;
2560         int i;
2561
2562         for (i = 0; i < count; i++) {
2563                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2564                         return -ERANGE;
2565         }
2566         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2567         rte_cpu_to_le_32(rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off));
2568         return 0;
2569 }
2570
2571 static int bnxt_map_ptp_regs(struct bnxt *bp)
2572 {
2573         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2574         uint32_t *reg_arr;
2575         int rc, i;
2576
2577         reg_arr = ptp->rx_regs;
2578         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2579         if (rc)
2580                 return rc;
2581
2582         reg_arr = ptp->tx_regs;
2583         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2584         if (rc)
2585                 return rc;
2586
2587         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2588                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2589
2590         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2591                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2592
2593         return 0;
2594 }
2595
2596 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2597 {
2598         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2599                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16));
2600         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2601                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20));
2602 }
2603
2604 static uint64_t bnxt_cc_read(struct bnxt *bp)
2605 {
2606         uint64_t ns;
2607
2608         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2609                               BNXT_GRCPF_REG_SYNC_TIME));
2610         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2611                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2612         return ns;
2613 }
2614
2615 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2616 {
2617         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2618         uint32_t fifo;
2619
2620         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2621                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2622         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2623                 return -EAGAIN;
2624
2625         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2626                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2627         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2628                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2629         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2630                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2631
2632         return 0;
2633 }
2634
2635 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2636 {
2637         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2638         struct bnxt_pf_info *pf = &bp->pf;
2639         uint16_t port_id;
2640         uint32_t fifo;
2641
2642         if (!ptp)
2643                 return -ENODEV;
2644
2645         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2646                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2647         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2648                 return -EAGAIN;
2649
2650         port_id = pf->port_id;
2651         rte_cpu_to_le_32(rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2652                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]));
2653
2654         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2655                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2656         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2657 /*              bnxt_clr_rx_ts(bp);       TBD  */
2658                 return -EBUSY;
2659         }
2660
2661         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2662                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2663         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2664                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2665
2666         return 0;
2667 }
2668
2669 static int
2670 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2671 {
2672         uint64_t ns;
2673         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2674         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2675
2676         if (!ptp)
2677                 return 0;
2678
2679         ns = rte_timespec_to_ns(ts);
2680         /* Set the timecounters to a new value. */
2681         ptp->tc.nsec = ns;
2682
2683         return 0;
2684 }
2685
2686 static int
2687 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2688 {
2689         uint64_t ns, systime_cycles;
2690         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2691         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2692
2693         if (!ptp)
2694                 return 0;
2695
2696         systime_cycles = bnxt_cc_read(bp);
2697         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2698         *ts = rte_ns_to_timespec(ns);
2699
2700         return 0;
2701 }
2702 static int
2703 bnxt_timesync_enable(struct rte_eth_dev *dev)
2704 {
2705         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2706         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2707         uint32_t shift = 0;
2708
2709         if (!ptp)
2710                 return 0;
2711
2712         ptp->rx_filter = 1;
2713         ptp->tx_tstamp_en = 1;
2714         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2715
2716         if (!bnxt_hwrm_ptp_cfg(bp))
2717                 bnxt_map_ptp_regs(bp);
2718
2719         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2720         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2721         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2722
2723         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2724         ptp->tc.cc_shift = shift;
2725         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2726
2727         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2728         ptp->rx_tstamp_tc.cc_shift = shift;
2729         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2730
2731         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2732         ptp->tx_tstamp_tc.cc_shift = shift;
2733         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2734
2735         return 0;
2736 }
2737
2738 static int
2739 bnxt_timesync_disable(struct rte_eth_dev *dev)
2740 {
2741         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2742         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2743
2744         if (!ptp)
2745                 return 0;
2746
2747         ptp->rx_filter = 0;
2748         ptp->tx_tstamp_en = 0;
2749         ptp->rxctl = 0;
2750
2751         bnxt_hwrm_ptp_cfg(bp);
2752
2753         bnxt_unmap_ptp_regs(bp);
2754
2755         return 0;
2756 }
2757
2758 static int
2759 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2760                                  struct timespec *timestamp,
2761                                  uint32_t flags __rte_unused)
2762 {
2763         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2764         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2765         uint64_t rx_tstamp_cycles = 0;
2766         uint64_t ns;
2767
2768         if (!ptp)
2769                 return 0;
2770
2771         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2772         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2773         *timestamp = rte_ns_to_timespec(ns);
2774         return  0;
2775 }
2776
2777 static int
2778 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2779                                  struct timespec *timestamp)
2780 {
2781         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2782         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2783         uint64_t tx_tstamp_cycles = 0;
2784         uint64_t ns;
2785
2786         if (!ptp)
2787                 return 0;
2788
2789         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2790         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2791         *timestamp = rte_ns_to_timespec(ns);
2792
2793         return 0;
2794 }
2795
2796 static int
2797 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2798 {
2799         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2800         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2801
2802         if (!ptp)
2803                 return 0;
2804
2805         ptp->tc.nsec += delta;
2806
2807         return 0;
2808 }
2809
2810 static int
2811 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2812 {
2813         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2814         int rc;
2815         uint32_t dir_entries;
2816         uint32_t entry_length;
2817
2818         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x\n",
2819                 bp->pdev->addr.domain, bp->pdev->addr.bus,
2820                 bp->pdev->addr.devid, bp->pdev->addr.function);
2821
2822         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2823         if (rc != 0)
2824                 return rc;
2825
2826         return dir_entries * entry_length;
2827 }
2828
2829 static int
2830 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2831                 struct rte_dev_eeprom_info *in_eeprom)
2832 {
2833         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2834         uint32_t index;
2835         uint32_t offset;
2836
2837         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2838                 "len = %d\n", bp->pdev->addr.domain,
2839                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2840                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2841
2842         if (in_eeprom->offset == 0) /* special offset value to get directory */
2843                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2844                                                 in_eeprom->data);
2845
2846         index = in_eeprom->offset >> 24;
2847         offset = in_eeprom->offset & 0xffffff;
2848
2849         if (index != 0)
2850                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2851                                            in_eeprom->length, in_eeprom->data);
2852
2853         return 0;
2854 }
2855
2856 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2857 {
2858         switch (dir_type) {
2859         case BNX_DIR_TYPE_CHIMP_PATCH:
2860         case BNX_DIR_TYPE_BOOTCODE:
2861         case BNX_DIR_TYPE_BOOTCODE_2:
2862         case BNX_DIR_TYPE_APE_FW:
2863         case BNX_DIR_TYPE_APE_PATCH:
2864         case BNX_DIR_TYPE_KONG_FW:
2865         case BNX_DIR_TYPE_KONG_PATCH:
2866         case BNX_DIR_TYPE_BONO_FW:
2867         case BNX_DIR_TYPE_BONO_PATCH:
2868                 return true;
2869         }
2870
2871         return false;
2872 }
2873
2874 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2875 {
2876         switch (dir_type) {
2877         case BNX_DIR_TYPE_AVS:
2878         case BNX_DIR_TYPE_EXP_ROM_MBA:
2879         case BNX_DIR_TYPE_PCIE:
2880         case BNX_DIR_TYPE_TSCF_UCODE:
2881         case BNX_DIR_TYPE_EXT_PHY:
2882         case BNX_DIR_TYPE_CCM:
2883         case BNX_DIR_TYPE_ISCSI_BOOT:
2884         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2885         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2886                 return true;
2887         }
2888
2889         return false;
2890 }
2891
2892 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2893 {
2894         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2895                 bnxt_dir_type_is_other_exec_format(dir_type);
2896 }
2897
2898 static int
2899 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2900                 struct rte_dev_eeprom_info *in_eeprom)
2901 {
2902         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2903         uint8_t index, dir_op;
2904         uint16_t type, ext, ordinal, attr;
2905
2906         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2907                 "len = %d\n", bp->pdev->addr.domain,
2908                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2909                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2910
2911         if (!BNXT_PF(bp)) {
2912                 PMD_DRV_LOG(ERR, "NVM write not supported from a VF\n");
2913                 return -EINVAL;
2914         }
2915
2916         type = in_eeprom->magic >> 16;
2917
2918         if (type == 0xffff) { /* special value for directory operations */
2919                 index = in_eeprom->magic & 0xff;
2920                 dir_op = in_eeprom->magic >> 8;
2921                 if (index == 0)
2922                         return -EINVAL;
2923                 switch (dir_op) {
2924                 case 0x0e: /* erase */
2925                         if (in_eeprom->offset != ~in_eeprom->magic)
2926                                 return -EINVAL;
2927                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2928                 default:
2929                         return -EINVAL;
2930                 }
2931         }
2932
2933         /* Create or re-write an NVM item: */
2934         if (bnxt_dir_type_is_executable(type) == true)
2935                 return -EOPNOTSUPP;
2936         ext = in_eeprom->magic & 0xffff;
2937         ordinal = in_eeprom->offset >> 16;
2938         attr = in_eeprom->offset & 0xffff;
2939
2940         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2941                                      in_eeprom->data, in_eeprom->length);
2942         return 0;
2943 }
2944
2945 /*
2946  * Initialization
2947  */
2948
2949 static const struct eth_dev_ops bnxt_dev_ops = {
2950         .dev_infos_get = bnxt_dev_info_get_op,
2951         .dev_close = bnxt_dev_close_op,
2952         .dev_configure = bnxt_dev_configure_op,
2953         .dev_start = bnxt_dev_start_op,
2954         .dev_stop = bnxt_dev_stop_op,
2955         .dev_set_link_up = bnxt_dev_set_link_up_op,
2956         .dev_set_link_down = bnxt_dev_set_link_down_op,
2957         .stats_get = bnxt_stats_get_op,
2958         .stats_reset = bnxt_stats_reset_op,
2959         .rx_queue_setup = bnxt_rx_queue_setup_op,
2960         .rx_queue_release = bnxt_rx_queue_release_op,
2961         .tx_queue_setup = bnxt_tx_queue_setup_op,
2962         .tx_queue_release = bnxt_tx_queue_release_op,
2963         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2964         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2965         .reta_update = bnxt_reta_update_op,
2966         .reta_query = bnxt_reta_query_op,
2967         .rss_hash_update = bnxt_rss_hash_update_op,
2968         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2969         .link_update = bnxt_link_update_op,
2970         .promiscuous_enable = bnxt_promiscuous_enable_op,
2971         .promiscuous_disable = bnxt_promiscuous_disable_op,
2972         .allmulticast_enable = bnxt_allmulticast_enable_op,
2973         .allmulticast_disable = bnxt_allmulticast_disable_op,
2974         .mac_addr_add = bnxt_mac_addr_add_op,
2975         .mac_addr_remove = bnxt_mac_addr_remove_op,
2976         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
2977         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
2978         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
2979         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
2980         .vlan_filter_set = bnxt_vlan_filter_set_op,
2981         .vlan_offload_set = bnxt_vlan_offload_set_op,
2982         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
2983         .mtu_set = bnxt_mtu_set_op,
2984         .mac_addr_set = bnxt_set_default_mac_addr_op,
2985         .xstats_get = bnxt_dev_xstats_get_op,
2986         .xstats_get_names = bnxt_dev_xstats_get_names_op,
2987         .xstats_reset = bnxt_dev_xstats_reset_op,
2988         .fw_version_get = bnxt_fw_version_get,
2989         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
2990         .rxq_info_get = bnxt_rxq_info_get_op,
2991         .txq_info_get = bnxt_txq_info_get_op,
2992         .dev_led_on = bnxt_dev_led_on_op,
2993         .dev_led_off = bnxt_dev_led_off_op,
2994         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
2995         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
2996         .rx_queue_count = bnxt_rx_queue_count_op,
2997         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
2998         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
2999         .rx_queue_start = bnxt_rx_queue_start,
3000         .rx_queue_stop = bnxt_rx_queue_stop,
3001         .tx_queue_start = bnxt_tx_queue_start,
3002         .tx_queue_stop = bnxt_tx_queue_stop,
3003         .filter_ctrl = bnxt_filter_ctrl_op,
3004         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
3005         .get_eeprom_length    = bnxt_get_eeprom_length_op,
3006         .get_eeprom           = bnxt_get_eeprom_op,
3007         .set_eeprom           = bnxt_set_eeprom_op,
3008         .timesync_enable      = bnxt_timesync_enable,
3009         .timesync_disable     = bnxt_timesync_disable,
3010         .timesync_read_time   = bnxt_timesync_read_time,
3011         .timesync_write_time   = bnxt_timesync_write_time,
3012         .timesync_adjust_time = bnxt_timesync_adjust_time,
3013         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3014         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3015 };
3016
3017 static bool bnxt_vf_pciid(uint16_t id)
3018 {
3019         if (id == BROADCOM_DEV_ID_57304_VF ||
3020             id == BROADCOM_DEV_ID_57406_VF ||
3021             id == BROADCOM_DEV_ID_5731X_VF ||
3022             id == BROADCOM_DEV_ID_5741X_VF ||
3023             id == BROADCOM_DEV_ID_57414_VF ||
3024             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
3025                 return true;
3026         return false;
3027 }
3028
3029 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3030 {
3031         struct bnxt *bp = eth_dev->data->dev_private;
3032         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3033         int rc;
3034
3035         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3036         if (!pci_dev->mem_resource[0].addr) {
3037                 PMD_DRV_LOG(ERR,
3038                         "Cannot find PCI device base address, aborting\n");
3039                 rc = -ENODEV;
3040                 goto init_err_disable;
3041         }
3042
3043         bp->eth_dev = eth_dev;
3044         bp->pdev = pci_dev;
3045
3046         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3047         if (!bp->bar0) {
3048                 PMD_DRV_LOG(ERR, "Cannot map device registers, aborting\n");
3049                 rc = -ENOMEM;
3050                 goto init_err_release;
3051         }
3052         return 0;
3053
3054 init_err_release:
3055         if (bp->bar0)
3056                 bp->bar0 = NULL;
3057
3058 init_err_disable:
3059
3060         return rc;
3061 }
3062
3063 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
3064
3065 #define ALLOW_FUNC(x)   \
3066         { \
3067                 typeof(x) arg = (x); \
3068                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3069                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3070         }
3071 static int
3072 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3073 {
3074         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3075         char mz_name[RTE_MEMZONE_NAMESIZE];
3076         const struct rte_memzone *mz = NULL;
3077         static int version_printed;
3078         uint32_t total_alloc_len;
3079         rte_iova_t mz_phys_addr;
3080         struct bnxt *bp;
3081         int rc;
3082
3083         if (version_printed++ == 0)
3084                 PMD_DRV_LOG(INFO, "%s\n", bnxt_version);
3085
3086         rte_eth_copy_pci_info(eth_dev, pci_dev);
3087
3088         bp = eth_dev->data->dev_private;
3089
3090         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
3091         bp->dev_stopped = 1;
3092
3093         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3094                 goto skip_init;
3095
3096         if (bnxt_vf_pciid(pci_dev->id.device_id))
3097                 bp->flags |= BNXT_FLAG_VF;
3098
3099         rc = bnxt_init_board(eth_dev);
3100         if (rc) {
3101                 PMD_DRV_LOG(ERR,
3102                         "Board initialization failed rc: %x\n", rc);
3103                 goto error;
3104         }
3105 skip_init:
3106         eth_dev->dev_ops = &bnxt_dev_ops;
3107         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3108                 return 0;
3109         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3110         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3111
3112         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3113                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3114                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3115                          pci_dev->addr.bus, pci_dev->addr.devid,
3116                          pci_dev->addr.function, "rx_port_stats");
3117                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3118                 mz = rte_memzone_lookup(mz_name);
3119                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3120                                 sizeof(struct rx_port_stats) + 512);
3121                 if (!mz) {
3122                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3123                                         SOCKET_ID_ANY,
3124                                         RTE_MEMZONE_2MB |
3125                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3126                                         RTE_MEMZONE_IOVA_CONTIG);
3127                         if (mz == NULL)
3128                                 return -ENOMEM;
3129                 }
3130                 memset(mz->addr, 0, mz->len);
3131                 mz_phys_addr = mz->iova;
3132                 if ((unsigned long)mz->addr == mz_phys_addr) {
3133                         PMD_DRV_LOG(WARNING,
3134                                 "Memzone physical address same as virtual.\n");
3135                         PMD_DRV_LOG(WARNING,
3136                                 "Using rte_mem_virt2iova()\n");
3137                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3138                         if (mz_phys_addr == 0) {
3139                                 PMD_DRV_LOG(ERR,
3140                                 "unable to map address to physical memory\n");
3141                                 return -ENOMEM;
3142                         }
3143                 }
3144
3145                 bp->rx_mem_zone = (const void *)mz;
3146                 bp->hw_rx_port_stats = mz->addr;
3147                 bp->hw_rx_port_stats_map = mz_phys_addr;
3148
3149                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3150                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3151                          pci_dev->addr.bus, pci_dev->addr.devid,
3152                          pci_dev->addr.function, "tx_port_stats");
3153                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3154                 mz = rte_memzone_lookup(mz_name);
3155                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3156                                 sizeof(struct tx_port_stats) + 512);
3157                 if (!mz) {
3158                         mz = rte_memzone_reserve(mz_name,
3159                                         total_alloc_len,
3160                                         SOCKET_ID_ANY,
3161                                         RTE_MEMZONE_2MB |
3162                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3163                                         RTE_MEMZONE_IOVA_CONTIG);
3164                         if (mz == NULL)
3165                                 return -ENOMEM;
3166                 }
3167                 memset(mz->addr, 0, mz->len);
3168                 mz_phys_addr = mz->iova;
3169                 if ((unsigned long)mz->addr == mz_phys_addr) {
3170                         PMD_DRV_LOG(WARNING,
3171                                 "Memzone physical address same as virtual.\n");
3172                         PMD_DRV_LOG(WARNING,
3173                                 "Using rte_mem_virt2iova()\n");
3174                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3175                         if (mz_phys_addr == 0) {
3176                                 PMD_DRV_LOG(ERR,
3177                                 "unable to map address to physical memory\n");
3178                                 return -ENOMEM;
3179                         }
3180                 }
3181
3182                 bp->tx_mem_zone = (const void *)mz;
3183                 bp->hw_tx_port_stats = mz->addr;
3184                 bp->hw_tx_port_stats_map = mz_phys_addr;
3185
3186                 bp->flags |= BNXT_FLAG_PORT_STATS;
3187         }
3188
3189         rc = bnxt_alloc_hwrm_resources(bp);
3190         if (rc) {
3191                 PMD_DRV_LOG(ERR,
3192                         "hwrm resource allocation failure rc: %x\n", rc);
3193                 goto error_free;
3194         }
3195         rc = bnxt_hwrm_ver_get(bp);
3196         if (rc)
3197                 goto error_free;
3198         rc = bnxt_hwrm_queue_qportcfg(bp);
3199         if (rc) {
3200                 PMD_DRV_LOG(ERR, "hwrm queue qportcfg failed\n");
3201                 goto error_free;
3202         }
3203
3204         rc = bnxt_hwrm_func_qcfg(bp);
3205         if (rc) {
3206                 PMD_DRV_LOG(ERR, "hwrm func qcfg failed\n");
3207                 goto error_free;
3208         }
3209
3210         /* Get the MAX capabilities for this function */
3211         rc = bnxt_hwrm_func_qcaps(bp);
3212         if (rc) {
3213                 PMD_DRV_LOG(ERR, "hwrm query capability failure rc: %x\n", rc);
3214                 goto error_free;
3215         }
3216         if (bp->max_tx_rings == 0) {
3217                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
3218                 rc = -EBUSY;
3219                 goto error_free;
3220         }
3221         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3222                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3223         if (eth_dev->data->mac_addrs == NULL) {
3224                 PMD_DRV_LOG(ERR,
3225                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3226                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3227                 rc = -ENOMEM;
3228                 goto error_free;
3229         }
3230
3231         if (check_zero_bytes(bp->dflt_mac_addr, ETHER_ADDR_LEN)) {
3232                 PMD_DRV_LOG(ERR,
3233                             "Invalid MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
3234                             bp->dflt_mac_addr[0], bp->dflt_mac_addr[1],
3235                             bp->dflt_mac_addr[2], bp->dflt_mac_addr[3],
3236                             bp->dflt_mac_addr[4], bp->dflt_mac_addr[5]);
3237                 rc = -EINVAL;
3238                 goto error_free;
3239         }
3240         /* Copy the permanent MAC from the qcap response address now. */
3241         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3242         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3243
3244         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3245                 /* 1 ring is for default completion ring */
3246                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
3247                 rc = -ENOSPC;
3248                 goto error_free;
3249         }
3250
3251         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3252                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3253         if (!bp->grp_info) {
3254                 PMD_DRV_LOG(ERR,
3255                         "Failed to alloc %zu bytes to store group info table\n",
3256                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3257                 rc = -ENOMEM;
3258                 goto error_free;
3259         }
3260
3261         /* Forward all requests if firmware is new enough */
3262         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3263             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3264             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3265                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3266         } else {
3267                 PMD_DRV_LOG(WARNING,
3268                         "Firmware too old for VF mailbox functionality\n");
3269                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3270         }
3271
3272         /*
3273          * The following are used for driver cleanup.  If we disallow these,
3274          * VF drivers can't clean up cleanly.
3275          */
3276         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3277         ALLOW_FUNC(HWRM_VNIC_FREE);
3278         ALLOW_FUNC(HWRM_RING_FREE);
3279         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3280         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3281         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3282         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3283         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3284         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3285         rc = bnxt_hwrm_func_driver_register(bp);
3286         if (rc) {
3287                 PMD_DRV_LOG(ERR,
3288                         "Failed to register driver");
3289                 rc = -EBUSY;
3290                 goto error_free;
3291         }
3292
3293         PMD_DRV_LOG(INFO,
3294                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3295                 pci_dev->mem_resource[0].phys_addr,
3296                 pci_dev->mem_resource[0].addr);
3297
3298         rc = bnxt_hwrm_func_reset(bp);
3299         if (rc) {
3300                 PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
3301                 rc = -EIO;
3302                 goto error_free;
3303         }
3304
3305         if (BNXT_PF(bp)) {
3306                 //if (bp->pf.active_vfs) {
3307                         // TODO: Deallocate VF resources?
3308                 //}
3309                 if (bp->pdev->max_vfs) {
3310                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3311                         if (rc) {
3312                                 PMD_DRV_LOG(ERR, "Failed to allocate VFs\n");
3313                                 goto error_free;
3314                         }
3315                 } else {
3316                         rc = bnxt_hwrm_allocate_pf_only(bp);
3317                         if (rc) {
3318                                 PMD_DRV_LOG(ERR,
3319                                         "Failed to allocate PF resources\n");
3320                                 goto error_free;
3321                         }
3322                 }
3323         }
3324
3325         bnxt_hwrm_port_led_qcaps(bp);
3326
3327         rc = bnxt_setup_int(bp);
3328         if (rc)
3329                 goto error_free;
3330
3331         rc = bnxt_alloc_mem(bp);
3332         if (rc)
3333                 goto error_free_int;
3334
3335         rc = bnxt_request_int(bp);
3336         if (rc)
3337                 goto error_free_int;
3338
3339         rc = bnxt_alloc_def_cp_ring(bp);
3340         if (rc)
3341                 goto error_free_int;
3342
3343         bnxt_enable_int(bp);
3344
3345         return 0;
3346
3347 error_free_int:
3348         bnxt_disable_int(bp);
3349         bnxt_free_def_cp_ring(bp);
3350         bnxt_hwrm_func_buf_unrgtr(bp);
3351         bnxt_free_int(bp);
3352         bnxt_free_mem(bp);
3353 error_free:
3354         bnxt_dev_uninit(eth_dev);
3355 error:
3356         return rc;
3357 }
3358
3359 static int
3360 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3361         struct bnxt *bp = eth_dev->data->dev_private;
3362         int rc;
3363
3364         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3365                 return -EPERM;
3366
3367         bnxt_disable_int(bp);
3368         bnxt_free_int(bp);
3369         bnxt_free_mem(bp);
3370         if (eth_dev->data->mac_addrs != NULL) {
3371                 rte_free(eth_dev->data->mac_addrs);
3372                 eth_dev->data->mac_addrs = NULL;
3373         }
3374         if (bp->grp_info != NULL) {
3375                 rte_free(bp->grp_info);
3376                 bp->grp_info = NULL;
3377         }
3378         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3379         bnxt_free_hwrm_resources(bp);
3380         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3381         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3382         if (bp->dev_stopped == 0)
3383                 bnxt_dev_close_op(eth_dev);
3384         if (bp->pf.vf_info)
3385                 rte_free(bp->pf.vf_info);
3386         eth_dev->dev_ops = NULL;
3387         eth_dev->rx_pkt_burst = NULL;
3388         eth_dev->tx_pkt_burst = NULL;
3389
3390         return rc;
3391 }
3392
3393 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3394         struct rte_pci_device *pci_dev)
3395 {
3396         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3397                 bnxt_dev_init);
3398 }
3399
3400 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3401 {
3402         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3403 }
3404
3405 static struct rte_pci_driver bnxt_rte_pmd = {
3406         .id_table = bnxt_pci_id_map,
3407         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3408                 RTE_PCI_DRV_INTR_LSC,
3409         .probe = bnxt_pci_probe,
3410         .remove = bnxt_pci_remove,
3411 };
3412
3413 static bool
3414 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3415 {
3416         if (strcmp(dev->device->driver->name, drv->driver.name))
3417                 return false;
3418
3419         return true;
3420 }
3421
3422 bool is_bnxt_supported(struct rte_eth_dev *dev)
3423 {
3424         return is_device_supported(dev, &bnxt_rte_pmd);
3425 }
3426
3427 RTE_INIT(bnxt_init_log);
3428 static void
3429 bnxt_init_log(void)
3430 {
3431         bnxt_logtype_driver = rte_log_register("pmd.bnxt.driver");
3432         if (bnxt_logtype_driver >= 0)
3433                 rte_log_set_level(bnxt_logtype_driver, RTE_LOG_NOTICE);
3434 }
3435
3436 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3437 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3438 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");