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38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_cycles.h>
44 #include "bnxt_filter.h"
45 #include "bnxt_hwrm.h"
46 #include "bnxt_ring.h"
49 #include "bnxt_stats.h"
52 #include "bnxt_vnic.h"
53 #include "hsi_struct_def_dpdk.h"
55 #define DRV_MODULE_NAME "bnxt"
56 static const char bnxt_version[] =
57 "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
59 static struct rte_pci_id bnxt_pci_id_map[] = {
60 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
61 #include "rte_pci_dev_ids.h"
65 /***********************/
68 * High level utility functions
71 static void bnxt_free_mem(struct bnxt *bp)
73 bnxt_free_filter_mem(bp);
74 bnxt_free_vnic_attributes(bp);
75 bnxt_free_vnic_mem(bp);
78 bnxt_free_tx_rings(bp);
79 bnxt_free_rx_rings(bp);
80 bnxt_free_def_cp_ring(bp);
83 static int bnxt_alloc_mem(struct bnxt *bp)
87 /* Default completion ring */
88 rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
92 rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
93 bp->def_cp_ring, "def_cp");
97 rc = bnxt_alloc_vnic_mem(bp);
101 rc = bnxt_alloc_vnic_attributes(bp);
105 rc = bnxt_alloc_filter_mem(bp);
116 static int bnxt_init_chip(struct bnxt *bp)
118 unsigned int i, rss_idx, fw_idx;
121 rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
123 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
127 rc = bnxt_alloc_hwrm_rings(bp);
129 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
133 rc = bnxt_alloc_all_hwrm_ring_grps(bp);
135 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
139 rc = bnxt_mq_rx_configure(bp);
141 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
145 /* VNIC configuration */
146 for (i = 0; i < bp->nr_vnics; i++) {
147 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
149 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
151 RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
156 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
159 "HWRM vnic ctx alloc failure rc: %x\n", rc);
163 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
165 RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
169 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
171 RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
175 if (vnic->rss_table && vnic->hash_type) {
177 * Fill the RSS hash & redirection table with
178 * ring group ids for all VNICs
180 for (rss_idx = 0, fw_idx = 0;
181 rss_idx < HW_HASH_INDEX_SIZE;
182 rss_idx++, fw_idx++) {
183 if (vnic->fw_grp_ids[fw_idx] ==
186 vnic->rss_table[rss_idx] =
187 vnic->fw_grp_ids[fw_idx];
189 rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
192 "HWRM vnic set RSS failure rc: %x\n",
198 rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
201 "HWRM cfa l2 rx mask failure rc: %x\n", rc);
208 bnxt_free_all_hwrm_resources(bp);
213 static int bnxt_shutdown_nic(struct bnxt *bp)
215 bnxt_free_all_hwrm_resources(bp);
216 bnxt_free_all_filters(bp);
217 bnxt_free_all_vnics(bp);
221 static int bnxt_init_nic(struct bnxt *bp)
225 bnxt_init_ring_grps(bp);
227 bnxt_init_filters(bp);
229 rc = bnxt_init_chip(bp);
237 * Device configuration and status function
240 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
241 struct rte_eth_dev_info *dev_info)
243 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
244 uint16_t max_vnics, i, j, vpool, vrxq;
247 dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
248 dev_info->max_hash_mac_addrs = 0;
250 /* PF/VF specifics */
252 dev_info->max_rx_queues = bp->pf.max_rx_rings;
253 dev_info->max_tx_queues = bp->pf.max_tx_rings;
254 dev_info->max_vfs = bp->pf.active_vfs;
255 dev_info->reta_size = bp->pf.max_rsscos_ctx;
256 max_vnics = bp->pf.max_vnics;
258 dev_info->max_rx_queues = bp->vf.max_rx_rings;
259 dev_info->max_tx_queues = bp->vf.max_tx_rings;
260 dev_info->reta_size = bp->vf.max_rsscos_ctx;
261 max_vnics = bp->vf.max_vnics;
264 /* Fast path specifics */
265 dev_info->min_rx_bufsize = 1;
266 dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
268 dev_info->rx_offload_capa = 0;
269 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
270 DEV_TX_OFFLOAD_TCP_CKSUM |
271 DEV_TX_OFFLOAD_UDP_CKSUM |
272 DEV_TX_OFFLOAD_TCP_TSO;
275 dev_info->default_rxconf = (struct rte_eth_rxconf) {
281 .rx_free_thresh = 32,
285 dev_info->default_txconf = (struct rte_eth_txconf) {
291 .tx_free_thresh = 32,
293 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
294 ETH_TXQ_FLAGS_NOOFFLOADS,
299 * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
300 * need further investigation.
304 vpool = 64; /* ETH_64_POOLS */
305 vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
306 for (i = 0; i < 4; vpool >>= 1, i++) {
307 if (max_vnics > vpool) {
308 for (j = 0; j < 5; vrxq >>= 1, j++) {
309 if (dev_info->max_rx_queues > vrxq) {
315 /* Not enough resources to support VMDq */
319 /* Not enough resources to support VMDq */
323 dev_info->max_vmdq_pools = vpool;
324 dev_info->vmdq_queue_num = vrxq;
326 dev_info->vmdq_pool_base = 0;
327 dev_info->vmdq_queue_base = 0;
330 /* Configure the device based on the configuration provided */
331 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
333 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
336 bp->rx_queues = (void *)eth_dev->data->rx_queues;
337 bp->tx_queues = (void *)eth_dev->data->tx_queues;
339 /* Inherit new configurations */
340 bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
341 bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
342 bp->rx_cp_nr_rings = bp->rx_nr_rings;
343 bp->tx_cp_nr_rings = bp->tx_nr_rings;
345 if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
347 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
348 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
349 rc = bnxt_set_hwrm_link_config(bp, true);
353 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
355 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
358 rc = bnxt_hwrm_func_reset(bp);
360 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
365 rc = bnxt_alloc_mem(bp);
369 rc = bnxt_init_nic(bp);
376 bnxt_shutdown_nic(bp);
377 bnxt_free_tx_mbufs(bp);
378 bnxt_free_rx_mbufs(bp);
383 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
385 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
387 bnxt_free_tx_mbufs(bp);
388 bnxt_free_rx_mbufs(bp);
390 rte_free(eth_dev->data->mac_addrs);
393 /* Unload the driver, release resources */
394 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
396 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
398 if (bp->eth_dev->data->dev_started) {
399 /* TBD: STOP HW queues DMA */
400 eth_dev->data->dev_link.link_status = 0;
402 bnxt_shutdown_nic(bp);
405 static int bnxt_link_update_op(struct rte_eth_dev *eth_dev,
406 int wait_to_complete)
409 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
410 struct rte_eth_link new;
411 unsigned int cnt = BNXT_LINK_WAIT_CNT;
413 memset(&new, 0, sizeof(new));
415 /* Retrieve link info from hardware */
416 rc = bnxt_get_hwrm_link_config(bp, &new);
418 new.link_speed = ETH_LINK_SPEED_100M;
419 new.link_duplex = ETH_LINK_FULL_DUPLEX;
421 "Failed to retrieve link rc = 0x%x!", rc);
424 if (!wait_to_complete)
427 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
429 } while (!new.link_status && cnt--);
431 /* Timed out or success */
432 if (new.link_status) {
433 /* Update only if success */
434 eth_dev->data->dev_link.link_duplex = new.link_duplex;
435 eth_dev->data->dev_link.link_speed = new.link_speed;
437 eth_dev->data->dev_link.link_status = new.link_status;
442 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
444 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
445 struct bnxt_vnic_info *vnic;
447 if (bp->vnic_info == NULL)
450 vnic = &bp->vnic_info[0];
452 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
453 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
456 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
458 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
459 struct bnxt_vnic_info *vnic;
461 if (bp->vnic_info == NULL)
464 vnic = &bp->vnic_info[0];
466 vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
467 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
470 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
472 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
473 struct bnxt_vnic_info *vnic;
475 if (bp->vnic_info == NULL)
478 vnic = &bp->vnic_info[0];
480 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
481 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
484 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
486 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
487 struct bnxt_vnic_info *vnic;
489 if (bp->vnic_info == NULL)
492 vnic = &bp->vnic_info[0];
494 vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
495 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
502 static struct eth_dev_ops bnxt_dev_ops = {
503 .dev_infos_get = bnxt_dev_info_get_op,
504 .dev_close = bnxt_dev_close_op,
505 .dev_configure = bnxt_dev_configure_op,
506 .dev_start = bnxt_dev_start_op,
507 .dev_stop = bnxt_dev_stop_op,
508 .stats_get = bnxt_stats_get_op,
509 .stats_reset = bnxt_stats_reset_op,
510 .rx_queue_setup = bnxt_rx_queue_setup_op,
511 .rx_queue_release = bnxt_rx_queue_release_op,
512 .tx_queue_setup = bnxt_tx_queue_setup_op,
513 .tx_queue_release = bnxt_tx_queue_release_op,
514 .link_update = bnxt_link_update_op,
515 .promiscuous_enable = bnxt_promiscuous_enable_op,
516 .promiscuous_disable = bnxt_promiscuous_disable_op,
517 .allmulticast_enable = bnxt_allmulticast_enable_op,
518 .allmulticast_disable = bnxt_allmulticast_disable_op,
521 static bool bnxt_vf_pciid(uint16_t id)
523 if (id == BROADCOM_DEV_ID_57304_VF ||
524 id == BROADCOM_DEV_ID_57406_VF)
529 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
532 struct bnxt *bp = eth_dev->data->dev_private;
534 /* enable device (incl. PCI PM wakeup), and bus-mastering */
535 if (!eth_dev->pci_dev->mem_resource[0].addr) {
537 "Cannot find PCI device base address, aborting\n");
539 goto init_err_disable;
542 bp->eth_dev = eth_dev;
543 bp->pdev = eth_dev->pci_dev;
545 bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
547 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
549 goto init_err_release;
563 bnxt_dev_init(struct rte_eth_dev *eth_dev)
565 static int version_printed;
569 if (version_printed++ == 0)
570 RTE_LOG(INFO, PMD, "%s", bnxt_version);
572 if (eth_dev->pci_dev->addr.function >= 2 &&
573 eth_dev->pci_dev->addr.function < 4) {
574 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
575 eth_dev->pci_dev->addr.function);
580 rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
581 bp = eth_dev->data->dev_private;
583 if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
584 bp->flags |= BNXT_FLAG_VF;
586 rc = bnxt_init_board(eth_dev);
589 "Board initialization failed rc: %x\n", rc);
592 eth_dev->dev_ops = &bnxt_dev_ops;
593 eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
594 eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
596 rc = bnxt_alloc_hwrm_resources(bp);
599 "hwrm resource allocation failure rc: %x\n", rc);
602 rc = bnxt_hwrm_ver_get(bp);
605 bnxt_hwrm_queue_qportcfg(bp);
607 /* Get the MAX capabilities for this function */
608 rc = bnxt_hwrm_func_qcaps(bp);
610 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
613 eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
614 ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
615 if (eth_dev->data->mac_addrs == NULL) {
617 "Failed to alloc %u bytes needed to store MAC addr tbl",
618 ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
622 /* Copy the permanent MAC from the qcap response address now. */
624 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
626 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
627 memcpy(ð_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
628 bp->grp_info = rte_zmalloc("bnxt_grp_info",
629 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
632 "Failed to alloc %zu bytes needed to store group info table\n",
633 sizeof(*bp->grp_info) * bp->max_ring_grps);
638 rc = bnxt_hwrm_func_driver_register(bp, 0,
642 "Failed to register driver");
648 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
649 eth_dev->pci_dev->mem_resource[0].phys_addr,
650 eth_dev->pci_dev->mem_resource[0].addr);
655 eth_dev->driver->eth_dev_uninit(eth_dev);
661 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
662 struct bnxt *bp = eth_dev->data->dev_private;
665 if (eth_dev->data->mac_addrs)
666 rte_free(eth_dev->data->mac_addrs);
668 rte_free(bp->grp_info);
669 rc = bnxt_hwrm_func_driver_unregister(bp, 0);
670 bnxt_free_hwrm_resources(bp);
674 static struct eth_driver bnxt_rte_pmd = {
676 .name = "rte_" DRV_MODULE_NAME "_pmd",
677 .id_table = bnxt_pci_id_map,
678 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
680 .eth_dev_init = bnxt_dev_init,
681 .eth_dev_uninit = bnxt_dev_uninit,
682 .dev_private_size = sizeof(struct bnxt),
685 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
687 RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
688 rte_eth_driver_register(&bnxt_rte_pmd);
692 static struct rte_driver bnxt_pmd_drv = {
695 .init = bnxt_rte_pmd_init,
698 PMD_REGISTER_DRIVER(bnxt_pmd_drv);