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38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_cycles.h>
43 #include "bnxt_hwrm.h"
47 #define DRV_MODULE_NAME "bnxt"
48 static const char bnxt_version[] =
49 "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
51 static struct rte_pci_id bnxt_pci_id_map[] = {
52 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
53 #include "rte_pci_dev_ids.h"
57 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
59 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
61 rte_free(eth_dev->data->mac_addrs);
62 bnxt_free_hwrm_resources(bp);
66 * Device configuration and status function
69 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
70 struct rte_eth_dev_info *dev_info)
72 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
73 uint16_t max_vnics, i, j, vpool, vrxq;
76 dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
77 dev_info->max_hash_mac_addrs = 0;
81 dev_info->max_rx_queues = bp->pf.max_rx_rings;
82 dev_info->max_tx_queues = bp->pf.max_tx_rings;
83 dev_info->max_vfs = bp->pf.active_vfs;
84 dev_info->reta_size = bp->pf.max_rsscos_ctx;
85 max_vnics = bp->pf.max_vnics;
87 dev_info->max_rx_queues = bp->vf.max_rx_rings;
88 dev_info->max_tx_queues = bp->vf.max_tx_rings;
89 dev_info->reta_size = bp->vf.max_rsscos_ctx;
90 max_vnics = bp->vf.max_vnics;
93 /* Fast path specifics */
94 dev_info->min_rx_bufsize = 1;
95 dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
97 dev_info->rx_offload_capa = 0;
98 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
99 DEV_TX_OFFLOAD_TCP_CKSUM |
100 DEV_TX_OFFLOAD_UDP_CKSUM |
101 DEV_TX_OFFLOAD_TCP_TSO;
104 dev_info->default_rxconf = (struct rte_eth_rxconf) {
110 .rx_free_thresh = 32,
114 dev_info->default_txconf = (struct rte_eth_txconf) {
120 .tx_free_thresh = 32,
122 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
123 ETH_TXQ_FLAGS_NOOFFLOADS,
128 * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
129 * need further investigation.
133 vpool = 64; /* ETH_64_POOLS */
134 vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
135 for (i = 0; i < 4; vpool >>= 1, i++) {
136 if (max_vnics > vpool) {
137 for (j = 0; j < 5; vrxq >>= 1, j++) {
138 if (dev_info->max_rx_queues > vrxq) {
144 /* Not enough resources to support VMDq */
148 /* Not enough resources to support VMDq */
152 dev_info->max_vmdq_pools = vpool;
153 dev_info->vmdq_queue_num = vrxq;
155 dev_info->vmdq_pool_base = 0;
156 dev_info->vmdq_queue_base = 0;
159 /* Configure the device based on the configuration provided */
160 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
162 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
165 bp->rx_queues = (void *)eth_dev->data->rx_queues;
166 bp->tx_queues = (void *)eth_dev->data->tx_queues;
168 /* Inherit new configurations */
169 bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
170 bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
171 bp->rx_cp_nr_rings = bp->rx_nr_rings;
172 bp->tx_cp_nr_rings = bp->tx_nr_rings;
174 if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
176 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
177 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
178 rc = bnxt_set_hwrm_link_config(bp, true);
186 static struct eth_dev_ops bnxt_dev_ops = {
187 .dev_infos_get = bnxt_dev_info_get_op,
188 .dev_close = bnxt_dev_close_op,
189 .dev_configure = bnxt_dev_configure_op,
190 .rx_queue_setup = bnxt_rx_queue_setup_op,
191 .rx_queue_release = bnxt_rx_queue_release_op,
192 .tx_queue_setup = bnxt_tx_queue_setup_op,
193 .tx_queue_release = bnxt_tx_queue_release_op,
196 static bool bnxt_vf_pciid(uint16_t id)
198 if (id == BROADCOM_DEV_ID_57304_VF ||
199 id == BROADCOM_DEV_ID_57406_VF)
204 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
207 struct bnxt *bp = eth_dev->data->dev_private;
209 /* enable device (incl. PCI PM wakeup), and bus-mastering */
210 if (!eth_dev->pci_dev->mem_resource[0].addr) {
212 "Cannot find PCI device base address, aborting\n");
214 goto init_err_disable;
217 bp->eth_dev = eth_dev;
218 bp->pdev = eth_dev->pci_dev;
220 bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
222 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
224 goto init_err_release;
238 bnxt_dev_init(struct rte_eth_dev *eth_dev)
240 static int version_printed;
244 if (version_printed++ == 0)
245 RTE_LOG(INFO, PMD, "%s", bnxt_version);
247 if (eth_dev->pci_dev->addr.function >= 2 &&
248 eth_dev->pci_dev->addr.function < 4) {
249 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
250 eth_dev->pci_dev->addr.function);
255 rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
256 bp = eth_dev->data->dev_private;
258 if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
259 bp->flags |= BNXT_FLAG_VF;
261 rc = bnxt_init_board(eth_dev);
264 "Board initialization failed rc: %x\n", rc);
267 eth_dev->dev_ops = &bnxt_dev_ops;
268 /* eth_dev->rx_pkt_burst = &bnxt_recv_pkts; */
269 /* eth_dev->tx_pkt_burst = &bnxt_xmit_pkts; */
271 rc = bnxt_alloc_hwrm_resources(bp);
274 "hwrm resource allocation failure rc: %x\n", rc);
277 rc = bnxt_hwrm_ver_get(bp);
280 bnxt_hwrm_queue_qportcfg(bp);
282 /* Get the MAX capabilities for this function */
283 rc = bnxt_hwrm_func_qcaps(bp);
285 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
288 eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
289 ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
290 if (eth_dev->data->mac_addrs == NULL) {
292 "Failed to alloc %u bytes needed to store MAC addr tbl",
293 ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
297 /* Copy the permanent MAC from the qcap response address now. */
299 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
301 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
302 memcpy(ð_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
304 rc = bnxt_hwrm_func_driver_register(bp, 0,
308 "Failed to register driver");
314 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
315 eth_dev->pci_dev->mem_resource[0].phys_addr,
316 eth_dev->pci_dev->mem_resource[0].addr);
321 eth_dev->driver->eth_dev_uninit(eth_dev);
327 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
328 struct bnxt *bp = eth_dev->data->dev_private;
331 if (eth_dev->data->mac_addrs)
332 rte_free(eth_dev->data->mac_addrs);
333 rc = bnxt_hwrm_func_driver_unregister(bp, 0);
334 bnxt_free_hwrm_resources(bp);
338 static struct eth_driver bnxt_rte_pmd = {
340 .name = "rte_" DRV_MODULE_NAME "_pmd",
341 .id_table = bnxt_pci_id_map,
342 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
344 .eth_dev_init = bnxt_dev_init,
345 .eth_dev_uninit = bnxt_dev_uninit,
346 .dev_private_size = sizeof(struct bnxt),
349 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
351 RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
352 rte_eth_driver_register(&bnxt_rte_pmd);
356 static struct rte_driver bnxt_pmd_drv = {
359 .init = bnxt_rte_pmd_init,
362 PMD_REGISTER_DRIVER(bnxt_pmd_drv);