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38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_cycles.h>
44 #include "bnxt_filter.h"
45 #include "bnxt_hwrm.h"
46 #include "bnxt_ring.h"
49 #include "bnxt_stats.h"
52 #include "bnxt_vnic.h"
53 #include "hsi_struct_def_dpdk.h"
55 #define DRV_MODULE_NAME "bnxt"
56 static const char bnxt_version[] =
57 "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
59 static struct rte_pci_id bnxt_pci_id_map[] = {
60 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
61 #include "rte_pci_dev_ids.h"
65 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
67 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
69 rte_free(eth_dev->data->mac_addrs);
70 bnxt_free_hwrm_resources(bp);
73 /***********************/
76 * High level utility functions
79 static void bnxt_free_mem(struct bnxt *bp)
81 bnxt_free_filter_mem(bp);
82 bnxt_free_vnic_attributes(bp);
83 bnxt_free_vnic_mem(bp);
86 bnxt_free_tx_rings(bp);
87 bnxt_free_rx_rings(bp);
88 bnxt_free_def_cp_ring(bp);
91 static int bnxt_alloc_mem(struct bnxt *bp)
95 /* Default completion ring */
96 rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
100 rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
101 bp->def_cp_ring, "def_cp");
105 rc = bnxt_alloc_vnic_mem(bp);
109 rc = bnxt_alloc_vnic_attributes(bp);
113 rc = bnxt_alloc_filter_mem(bp);
124 static int bnxt_init_chip(struct bnxt *bp)
126 unsigned int i, rss_idx, fw_idx;
129 rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
131 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
135 rc = bnxt_alloc_hwrm_rings(bp);
137 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
141 rc = bnxt_alloc_all_hwrm_ring_grps(bp);
143 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
147 rc = bnxt_mq_rx_configure(bp);
149 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
153 /* VNIC configuration */
154 for (i = 0; i < bp->nr_vnics; i++) {
155 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
157 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
159 RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
164 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
167 "HWRM vnic ctx alloc failure rc: %x\n", rc);
171 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
173 RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
177 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
179 RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
183 if (vnic->rss_table && vnic->hash_type) {
185 * Fill the RSS hash & redirection table with
186 * ring group ids for all VNICs
188 for (rss_idx = 0, fw_idx = 0;
189 rss_idx < HW_HASH_INDEX_SIZE;
190 rss_idx++, fw_idx++) {
191 if (vnic->fw_grp_ids[fw_idx] ==
194 vnic->rss_table[rss_idx] =
195 vnic->fw_grp_ids[fw_idx];
197 rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
200 "HWRM vnic set RSS failure rc: %x\n",
206 rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
209 "HWRM cfa l2 rx mask failure rc: %x\n", rc);
216 bnxt_free_all_hwrm_resources(bp);
221 static int bnxt_shutdown_nic(struct bnxt *bp)
223 bnxt_free_all_hwrm_resources(bp);
224 bnxt_free_all_filters(bp);
225 bnxt_free_all_vnics(bp);
229 static int bnxt_init_nic(struct bnxt *bp)
233 bnxt_init_ring_grps(bp);
235 bnxt_init_filters(bp);
237 rc = bnxt_init_chip(bp);
245 * Device configuration and status function
248 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
249 struct rte_eth_dev_info *dev_info)
251 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
252 uint16_t max_vnics, i, j, vpool, vrxq;
255 dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
256 dev_info->max_hash_mac_addrs = 0;
258 /* PF/VF specifics */
260 dev_info->max_rx_queues = bp->pf.max_rx_rings;
261 dev_info->max_tx_queues = bp->pf.max_tx_rings;
262 dev_info->max_vfs = bp->pf.active_vfs;
263 dev_info->reta_size = bp->pf.max_rsscos_ctx;
264 max_vnics = bp->pf.max_vnics;
266 dev_info->max_rx_queues = bp->vf.max_rx_rings;
267 dev_info->max_tx_queues = bp->vf.max_tx_rings;
268 dev_info->reta_size = bp->vf.max_rsscos_ctx;
269 max_vnics = bp->vf.max_vnics;
272 /* Fast path specifics */
273 dev_info->min_rx_bufsize = 1;
274 dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
276 dev_info->rx_offload_capa = 0;
277 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
278 DEV_TX_OFFLOAD_TCP_CKSUM |
279 DEV_TX_OFFLOAD_UDP_CKSUM |
280 DEV_TX_OFFLOAD_TCP_TSO;
283 dev_info->default_rxconf = (struct rte_eth_rxconf) {
289 .rx_free_thresh = 32,
293 dev_info->default_txconf = (struct rte_eth_txconf) {
299 .tx_free_thresh = 32,
301 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
302 ETH_TXQ_FLAGS_NOOFFLOADS,
307 * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
308 * need further investigation.
312 vpool = 64; /* ETH_64_POOLS */
313 vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
314 for (i = 0; i < 4; vpool >>= 1, i++) {
315 if (max_vnics > vpool) {
316 for (j = 0; j < 5; vrxq >>= 1, j++) {
317 if (dev_info->max_rx_queues > vrxq) {
323 /* Not enough resources to support VMDq */
327 /* Not enough resources to support VMDq */
331 dev_info->max_vmdq_pools = vpool;
332 dev_info->vmdq_queue_num = vrxq;
334 dev_info->vmdq_pool_base = 0;
335 dev_info->vmdq_queue_base = 0;
338 /* Configure the device based on the configuration provided */
339 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
341 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
344 bp->rx_queues = (void *)eth_dev->data->rx_queues;
345 bp->tx_queues = (void *)eth_dev->data->tx_queues;
347 /* Inherit new configurations */
348 bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
349 bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
350 bp->rx_cp_nr_rings = bp->rx_nr_rings;
351 bp->tx_cp_nr_rings = bp->tx_nr_rings;
353 if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
355 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
356 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
357 rc = bnxt_set_hwrm_link_config(bp, true);
361 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
363 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
366 rc = bnxt_hwrm_func_reset(bp);
368 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
373 rc = bnxt_alloc_mem(bp);
377 rc = bnxt_init_nic(bp);
384 bnxt_shutdown_nic(bp);
385 bnxt_free_tx_mbufs(bp);
386 bnxt_free_rx_mbufs(bp);
391 /* Unload the driver, release resources */
392 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
394 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
396 if (bp->eth_dev->data->dev_started) {
397 /* TBD: STOP HW queues DMA */
398 eth_dev->data->dev_link.link_status = 0;
400 bnxt_shutdown_nic(bp);
403 static int bnxt_link_update_op(struct rte_eth_dev *eth_dev,
404 int wait_to_complete)
407 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
408 struct rte_eth_link new;
409 unsigned int cnt = BNXT_LINK_WAIT_CNT;
411 memset(&new, 0, sizeof(new));
413 /* Retrieve link info from hardware */
414 rc = bnxt_get_hwrm_link_config(bp, &new);
416 new.link_speed = ETH_LINK_SPEED_100M;
417 new.link_duplex = ETH_LINK_FULL_DUPLEX;
419 "Failed to retrieve link rc = 0x%x!", rc);
422 if (!wait_to_complete)
425 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
427 } while (!new.link_status && cnt--);
429 /* Timed out or success */
430 if (new.link_status) {
431 /* Update only if success */
432 eth_dev->data->dev_link.link_duplex = new.link_duplex;
433 eth_dev->data->dev_link.link_speed = new.link_speed;
435 eth_dev->data->dev_link.link_status = new.link_status;
440 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
442 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
443 struct bnxt_vnic_info *vnic;
445 if (bp->vnic_info == NULL)
448 vnic = &bp->vnic_info[0];
450 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
451 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
454 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
456 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
457 struct bnxt_vnic_info *vnic;
459 if (bp->vnic_info == NULL)
462 vnic = &bp->vnic_info[0];
464 vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
465 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
468 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
470 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
471 struct bnxt_vnic_info *vnic;
473 if (bp->vnic_info == NULL)
476 vnic = &bp->vnic_info[0];
478 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
479 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
482 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
484 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
485 struct bnxt_vnic_info *vnic;
487 if (bp->vnic_info == NULL)
490 vnic = &bp->vnic_info[0];
492 vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
493 bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
500 static struct eth_dev_ops bnxt_dev_ops = {
501 .dev_infos_get = bnxt_dev_info_get_op,
502 .dev_close = bnxt_dev_close_op,
503 .dev_configure = bnxt_dev_configure_op,
504 .dev_start = bnxt_dev_start_op,
505 .dev_stop = bnxt_dev_stop_op,
506 .stats_get = bnxt_stats_get_op,
507 .stats_reset = bnxt_stats_reset_op,
508 .rx_queue_setup = bnxt_rx_queue_setup_op,
509 .rx_queue_release = bnxt_rx_queue_release_op,
510 .tx_queue_setup = bnxt_tx_queue_setup_op,
511 .tx_queue_release = bnxt_tx_queue_release_op,
512 .link_update = bnxt_link_update_op,
513 .promiscuous_enable = bnxt_promiscuous_enable_op,
514 .promiscuous_disable = bnxt_promiscuous_disable_op,
515 .allmulticast_enable = bnxt_allmulticast_enable_op,
516 .allmulticast_disable = bnxt_allmulticast_disable_op,
519 static bool bnxt_vf_pciid(uint16_t id)
521 if (id == BROADCOM_DEV_ID_57304_VF ||
522 id == BROADCOM_DEV_ID_57406_VF)
527 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
530 struct bnxt *bp = eth_dev->data->dev_private;
532 /* enable device (incl. PCI PM wakeup), and bus-mastering */
533 if (!eth_dev->pci_dev->mem_resource[0].addr) {
535 "Cannot find PCI device base address, aborting\n");
537 goto init_err_disable;
540 bp->eth_dev = eth_dev;
541 bp->pdev = eth_dev->pci_dev;
543 bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
545 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
547 goto init_err_release;
561 bnxt_dev_init(struct rte_eth_dev *eth_dev)
563 static int version_printed;
567 if (version_printed++ == 0)
568 RTE_LOG(INFO, PMD, "%s", bnxt_version);
570 if (eth_dev->pci_dev->addr.function >= 2 &&
571 eth_dev->pci_dev->addr.function < 4) {
572 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
573 eth_dev->pci_dev->addr.function);
578 rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
579 bp = eth_dev->data->dev_private;
581 if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
582 bp->flags |= BNXT_FLAG_VF;
584 rc = bnxt_init_board(eth_dev);
587 "Board initialization failed rc: %x\n", rc);
590 eth_dev->dev_ops = &bnxt_dev_ops;
591 eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
592 eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
594 rc = bnxt_alloc_hwrm_resources(bp);
597 "hwrm resource allocation failure rc: %x\n", rc);
600 rc = bnxt_hwrm_ver_get(bp);
603 bnxt_hwrm_queue_qportcfg(bp);
605 /* Get the MAX capabilities for this function */
606 rc = bnxt_hwrm_func_qcaps(bp);
608 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
611 eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
612 ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
613 if (eth_dev->data->mac_addrs == NULL) {
615 "Failed to alloc %u bytes needed to store MAC addr tbl",
616 ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
620 /* Copy the permanent MAC from the qcap response address now. */
622 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
624 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
625 memcpy(ð_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
626 bp->grp_info = rte_zmalloc("bnxt_grp_info",
627 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
630 "Failed to alloc %zu bytes needed to store group info table\n",
631 sizeof(*bp->grp_info) * bp->max_ring_grps);
636 rc = bnxt_hwrm_func_driver_register(bp, 0,
640 "Failed to register driver");
646 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
647 eth_dev->pci_dev->mem_resource[0].phys_addr,
648 eth_dev->pci_dev->mem_resource[0].addr);
653 eth_dev->driver->eth_dev_uninit(eth_dev);
659 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
660 struct bnxt *bp = eth_dev->data->dev_private;
663 if (eth_dev->data->mac_addrs)
664 rte_free(eth_dev->data->mac_addrs);
666 rte_free(bp->grp_info);
667 rc = bnxt_hwrm_func_driver_unregister(bp, 0);
668 bnxt_free_hwrm_resources(bp);
672 static struct eth_driver bnxt_rte_pmd = {
674 .name = "rte_" DRV_MODULE_NAME "_pmd",
675 .id_table = bnxt_pci_id_map,
676 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
678 .eth_dev_init = bnxt_dev_init,
679 .eth_dev_uninit = bnxt_dev_uninit,
680 .dev_private_size = sizeof(struct bnxt),
683 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
685 RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
686 rte_eth_driver_register(&bnxt_rte_pmd);
690 static struct rte_driver bnxt_pmd_drv = {
693 .init = bnxt_rte_pmd_init,
696 PMD_REGISTER_DRIVER(bnxt_pmd_drv);