drivers/net/bnxt/bnxt_hwrm.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <rte_byteorder.h>
  35 #include <rte_common.h>
  36 #include <rte_cycles.h>
  37 #include <rte_malloc.h>
  38 #include <rte_memzone.h>
  39 #include <rte_version.h>
  40
  41 #include "bnxt.h"
  42 #include "bnxt_hwrm.h"
  43 #include "hsi_struct_def_dpdk.h"
  44
  45 #define HWRM_CMD_TIMEOUT                2000
  46
  47 /*
  48  * HWRM Functions (sent to HWRM)
  49  * These are named bnxt_hwrm_*() and return -1 if bnxt_hwrm_send_message()
  50  * fails (ie: a timeout), and a positive non-zero HWRM error code if the HWRM
  51  * command was failed by the ChiMP.
  52  */
  53
  54 static int bnxt_hwrm_send_message_locked(struct bnxt *bp, void *msg,
  55                                         uint32_t msg_len)
  56 {
  57         unsigned int i;
  58         struct input *req = msg;
  59         struct output *resp = bp->hwrm_cmd_resp_addr;
  60         uint32_t *data = msg;
  61         uint8_t *bar;
  62         uint8_t *valid;
  63
  64         /* Write request msg to hwrm channel */
  65         for (i = 0; i < msg_len; i += 4) {
  66                 bar = (uint8_t *)bp->bar0 + i;
  67                 *(volatile uint32_t *)bar = *data;
  68                 data++;
  69         }
  70
  71         /* Zero the rest of the request space */
  72         for (; i < bp->max_req_len; i += 4) {
  73                 bar = (uint8_t *)bp->bar0 + i;
  74                 *(volatile uint32_t *)bar = 0;
  75         }
  76
  77         /* Ring channel doorbell */
  78         bar = (uint8_t *)bp->bar0 + 0x100;
  79         *(volatile uint32_t *)bar = 1;
  80
  81         /* Poll for the valid bit */
  82         for (i = 0; i < HWRM_CMD_TIMEOUT; i++) {
  83                 /* Sanity check on the resp->resp_len */
  84                 rte_rmb();
  85                 if (resp->resp_len && resp->resp_len <=
  86                                 bp->max_resp_len) {
  87                         /* Last byte of resp contains the valid key */
  88                         valid = (uint8_t *)resp + resp->resp_len - 1;
  89                         if (*valid == HWRM_RESP_VALID_KEY)
  90                                 break;
  91                 }
  92                 rte_delay_us(600);
  93         }
  94
  95         if (i >= HWRM_CMD_TIMEOUT) {
  96                 RTE_LOG(ERR, PMD, "Error sending msg %x\n",
  97                         req->req_type);
  98                 goto err_ret;
  99         }
 100         return 0;
 101
 102 err_ret:
 103         return -1;
 104 }
 105
 106 static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg, uint32_t msg_len)
 107 {
 108         int rc;
 109
 110         rte_spinlock_lock(&bp->hwrm_lock);
 111         rc = bnxt_hwrm_send_message_locked(bp, msg, msg_len);
 112         rte_spinlock_unlock(&bp->hwrm_lock);
 113         return rc;
 114 }
 115
 116 #define HWRM_PREP(req, type, cr, resp) \
 117         memset(bp->hwrm_cmd_resp_addr, 0, bp->max_resp_len); \
 118         req.req_type = rte_cpu_to_le_16(HWRM_##type); \
 119         req.cmpl_ring = rte_cpu_to_le_16(cr); \
 120         req.seq_id = rte_cpu_to_le_16(bp->hwrm_cmd_seq++); \
 121         req.target_id = rte_cpu_to_le_16(0xffff); \
 122         req.resp_addr = rte_cpu_to_le_64(bp->hwrm_cmd_resp_dma_addr)
 123
 124 #define HWRM_CHECK_RESULT \
 125         { \
 126                 if (rc) { \
 127                         RTE_LOG(ERR, PMD, "%s failed rc:%d\n", \
 128                                 __func__, rc); \
 129                         return rc; \
 130                 } \
 131                 if (resp->error_code) { \
 132                         rc = rte_le_to_cpu_16(resp->error_code); \
 133                         RTE_LOG(ERR, PMD, "%s error %d\n", __func__, rc); \
 134                         return rc; \
 135                 } \
 136         }
 137
 138 int bnxt_hwrm_func_qcaps(struct bnxt *bp)
 139 {
 140         int rc = 0;
 141         struct hwrm_func_qcaps_input req = {.req_type = 0 };
 142         struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
 143
 144         HWRM_PREP(req, FUNC_QCAPS, -1, resp);
 145
 146         req.fid = rte_cpu_to_le_16(0xffff);
 147
 148         rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
 149
 150         HWRM_CHECK_RESULT;
 151
 152         if (BNXT_PF(bp)) {
 153                 struct bnxt_pf_info *pf = &bp->pf;
 154
 155                 pf->fw_fid = rte_le_to_cpu_32(resp->fid);
 156                 pf->port_id = resp->port_id;
 157                 memcpy(pf->mac_addr, resp->perm_mac_address, ETHER_ADDR_LEN);
 158                 pf->max_rsscos_ctx = rte_le_to_cpu_16(resp->max_rsscos_ctx);
 159                 pf->max_cp_rings = rte_le_to_cpu_16(resp->max_cmpl_rings);
 160                 pf->max_tx_rings = rte_le_to_cpu_16(resp->max_tx_rings);
 161                 pf->max_rx_rings = rte_le_to_cpu_16(resp->max_rx_rings);
 162                 pf->max_l2_ctx = rte_le_to_cpu_16(resp->max_l2_ctxs);
 163                 pf->max_vnics = rte_le_to_cpu_16(resp->max_vnics);
 164                 pf->first_vf_id = rte_le_to_cpu_16(resp->first_vf_id);
 165                 pf->max_vfs = rte_le_to_cpu_16(resp->max_vfs);
 166         } else {
 167                 struct bnxt_vf_info *vf = &bp->vf;
 168
 169                 vf->fw_fid = rte_le_to_cpu_32(resp->fid);
 170                 memcpy(vf->mac_addr, &resp->perm_mac_address, ETHER_ADDR_LEN);
 171                 vf->max_rsscos_ctx = rte_le_to_cpu_16(resp->max_rsscos_ctx);
 172                 vf->max_cp_rings = rte_le_to_cpu_16(resp->max_cmpl_rings);
 173                 vf->max_tx_rings = rte_le_to_cpu_16(resp->max_tx_rings);
 174                 vf->max_rx_rings = rte_le_to_cpu_16(resp->max_rx_rings);
 175                 vf->max_l2_ctx = rte_le_to_cpu_16(resp->max_l2_ctxs);
 176                 vf->max_vnics = rte_le_to_cpu_16(resp->max_vnics);
 177         }
 178
 179         return rc;
 180 }
 181
 182 int bnxt_hwrm_func_driver_register(struct bnxt *bp, uint32_t flags,
 183                                    uint32_t *vf_req_fwd)
 184 {
 185         int rc;
 186         struct hwrm_func_drv_rgtr_input req = {.req_type = 0 };
 187         struct hwrm_func_drv_rgtr_output *resp = bp->hwrm_cmd_resp_addr;
 188
 189         if (bp->flags & BNXT_FLAG_REGISTERED)
 190                 return 0;
 191
 192         HWRM_PREP(req, FUNC_DRV_RGTR, -1, resp);
 193         req.flags = flags;
 194         req.enables = HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER;
 195         req.ver_maj = RTE_VER_YEAR;
 196         req.ver_min = RTE_VER_MONTH;
 197         req.ver_upd = RTE_VER_MINOR;
 198
 199         memcpy(req.vf_req_fwd, vf_req_fwd, sizeof(req.vf_req_fwd));
 200
 201         rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
 202
 203         HWRM_CHECK_RESULT;
 204
 205         bp->flags |= BNXT_FLAG_REGISTERED;
 206
 207         return rc;
 208 }
 209
 210 int bnxt_hwrm_ver_get(struct bnxt *bp)
 211 {
 212         int rc = 0;
 213         struct hwrm_ver_get_input req = {.req_type = 0 };
 214         struct hwrm_ver_get_output *resp = bp->hwrm_cmd_resp_addr;
 215         uint32_t my_version;
 216         uint32_t fw_version;
 217         uint16_t max_resp_len;
 218         char type[RTE_MEMZONE_NAMESIZE];
 219
 220         HWRM_PREP(req, VER_GET, -1, resp);
 221
 222         req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
 223         req.hwrm_intf_min = HWRM_VERSION_MINOR;
 224         req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
 225
 226         /*
 227          * Hold the lock since we may be adjusting the response pointers.
 228          */
 229         rte_spinlock_lock(&bp->hwrm_lock);
 230         rc = bnxt_hwrm_send_message_locked(bp, &req, sizeof(req));
 231
 232         HWRM_CHECK_RESULT;
 233
 234         RTE_LOG(INFO, PMD, "%d.%d.%d:%d.%d.%d\n",
 235                 resp->hwrm_intf_maj, resp->hwrm_intf_min,
 236                 resp->hwrm_intf_upd,
 237                 resp->hwrm_fw_maj, resp->hwrm_fw_min, resp->hwrm_fw_bld);
 238
 239         my_version = HWRM_VERSION_MAJOR << 16;
 240         my_version |= HWRM_VERSION_MINOR << 8;
 241         my_version |= HWRM_VERSION_UPDATE;
 242
 243         fw_version = resp->hwrm_intf_maj << 16;
 244         fw_version |= resp->hwrm_intf_min << 8;
 245         fw_version |= resp->hwrm_intf_upd;
 246
 247         if (resp->hwrm_intf_maj != HWRM_VERSION_MAJOR) {
 248                 RTE_LOG(ERR, PMD, "Unsupported firmware API version\n");
 249                 rc = -EINVAL;
 250                 goto error;
 251         }
 252
 253         if (my_version != fw_version) {
 254                 RTE_LOG(INFO, PMD, "BNXT Driver/HWRM API mismatch.\n");
 255                 if (my_version < fw_version) {
 256                         RTE_LOG(INFO, PMD,
 257                                 "Firmware API version is newer than driver.\n");
 258                         RTE_LOG(INFO, PMD,
 259                                 "The driver may be missing features.\n");
 260                 } else {
 261                         RTE_LOG(INFO, PMD,
 262                                 "Firmware API version is older than driver.\n");
 263                         RTE_LOG(INFO, PMD,
 264                                 "Not all driver features may be functional.\n");
 265                 }
 266         }
 267
 268         if (bp->max_req_len > resp->max_req_win_len) {
 269                 RTE_LOG(ERR, PMD, "Unsupported request length\n");
 270                 rc = -EINVAL;
 271         }
 272         bp->max_req_len = resp->max_req_win_len;
 273         max_resp_len = resp->max_resp_len;
 274         if (bp->max_resp_len != max_resp_len) {
 275                 sprintf(type, "bnxt_hwrm_%04x:%02x:%02x:%02x",
 276                         bp->pdev->addr.domain, bp->pdev->addr.bus,
 277                         bp->pdev->addr.devid, bp->pdev->addr.function);
 278
 279                 rte_free(bp->hwrm_cmd_resp_addr);
 280
 281                 bp->hwrm_cmd_resp_addr = rte_malloc(type, max_resp_len, 0);
 282                 if (bp->hwrm_cmd_resp_addr == NULL) {
 283                         rc = -ENOMEM;
 284                         goto error;
 285                 }
 286                 bp->hwrm_cmd_resp_dma_addr =
 287                         rte_malloc_virt2phy(bp->hwrm_cmd_resp_addr);
 288                 bp->max_resp_len = max_resp_len;
 289         }
 290
 291 error:
 292         rte_spinlock_unlock(&bp->hwrm_lock);
 293         return rc;
 294 }
 295
 296 int bnxt_hwrm_func_driver_unregister(struct bnxt *bp, uint32_t flags)
 297 {
 298         int rc;
 299         struct hwrm_func_drv_unrgtr_input req = {.req_type = 0 };
 300         struct hwrm_func_drv_unrgtr_output *resp = bp->hwrm_cmd_resp_addr;
 301
 302         if (!(bp->flags & BNXT_FLAG_REGISTERED))
 303                 return 0;
 304
 305         HWRM_PREP(req, FUNC_DRV_UNRGTR, -1, resp);
 306         req.flags = flags;
 307
 308         rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
 309
 310         HWRM_CHECK_RESULT;
 311
 312         bp->flags &= ~BNXT_FLAG_REGISTERED;
 313
 314         return rc;
 315 }
 316
 317 static int bnxt_hwrm_port_phy_cfg(struct bnxt *bp, struct bnxt_link_info *conf)
 318 {
 319         int rc = 0;
 320         struct hwrm_port_phy_cfg_input req = {.req_type = 0};
 321         struct hwrm_port_phy_cfg_output *resp = bp->hwrm_cmd_resp_addr;
 322
 323         HWRM_PREP(req, PORT_PHY_CFG, -1, resp);
 324
 325         req.flags = conf->phy_flags;
 326         if (conf->link_up) {
 327                 req.force_link_speed = conf->link_speed;
 328                 /*
 329                  * Note, ChiMP FW 20.2.1 and 20.2.2 return an error when we set
 330                  * any auto mode, even "none".
 331                  */
 332                 if (req.auto_mode == HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE) {
 333                         req.flags |= HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE;
 334                 } else {
 335                         req.auto_mode = conf->auto_mode;
 336                         req.enables |=
 337                                 HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE;
 338                         req.auto_link_speed_mask = conf->auto_link_speed_mask;
 339                         req.enables |=
 340                            HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK;
 341                         req.auto_link_speed = conf->auto_link_speed;
 342                         req.enables |=
 343                                 HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED;
 344                 }
 345                 req.auto_duplex = conf->duplex;
 346                 req.enables |= HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX;
 347                 req.auto_pause = conf->auto_pause;
 348                 /* Set force_pause if there is no auto or if there is a force */
 349                 if (req.auto_pause)
 350                         req.enables |=
 351                                 HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE;
 352                 else
 353                         req.enables |=
 354                                 HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE;
 355                 req.force_pause = conf->force_pause;
 356                 if (req.force_pause)
 357                         req.enables |=
 358                                 HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE;
 359         } else {
 360                 req.flags &= ~HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG;
 361                 req.flags |= HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN;
 362                 req.force_link_speed = 0;
 363         }
 364
 365         rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
 366
 367         HWRM_CHECK_RESULT;
 368
 369         return rc;
 370 }
 371
 372 int bnxt_hwrm_queue_qportcfg(struct bnxt *bp)
 373 {
 374         int rc = 0;
 375         struct hwrm_queue_qportcfg_input req = {.req_type = 0 };
 376         struct hwrm_queue_qportcfg_output *resp = bp->hwrm_cmd_resp_addr;
 377
 378         HWRM_PREP(req, QUEUE_QPORTCFG, -1, resp);
 379
 380         rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
 381
 382         HWRM_CHECK_RESULT;
 383
 384 #define GET_QUEUE_INFO(x) \
 385         bp->cos_queue[x].id = resp->queue_id##x; \
 386         bp->cos_queue[x].profile = resp->queue_id##x##_service_profile
 387
 388         GET_QUEUE_INFO(0);
 389         GET_QUEUE_INFO(1);
 390         GET_QUEUE_INFO(2);
 391         GET_QUEUE_INFO(3);
 392         GET_QUEUE_INFO(4);
 393         GET_QUEUE_INFO(5);
 394         GET_QUEUE_INFO(6);
 395         GET_QUEUE_INFO(7);
 396
 397         return rc;
 398 }
 399
 400 /*
 401  * HWRM utility functions
 402  */
 403
 404 void bnxt_free_hwrm_resources(struct bnxt *bp)
 405 {
 406         /* Release memzone */
 407         rte_free(bp->hwrm_cmd_resp_addr);
 408         bp->hwrm_cmd_resp_addr = NULL;
 409         bp->hwrm_cmd_resp_dma_addr = 0;
 410 }
 411
 412 int bnxt_alloc_hwrm_resources(struct bnxt *bp)
 413 {
 414         struct rte_pci_device *pdev = bp->pdev;
 415         char type[RTE_MEMZONE_NAMESIZE];
 416
 417         sprintf(type, "bnxt_hwrm_%04x:%02x:%02x:%02x", pdev->addr.domain,
 418                 pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
 419         bp->max_req_len = HWRM_MAX_REQ_LEN;
 420         bp->max_resp_len = HWRM_MAX_RESP_LEN;
 421         bp->hwrm_cmd_resp_addr = rte_malloc(type, bp->max_resp_len, 0);
 422         if (bp->hwrm_cmd_resp_addr == NULL)
 423                 return -ENOMEM;
 424         bp->hwrm_cmd_resp_dma_addr =
 425                 rte_malloc_virt2phy(bp->hwrm_cmd_resp_addr);
 426         rte_spinlock_init(&bp->hwrm_lock);
 427
 428         return 0;
 429 }
 430
 431 static uint16_t bnxt_parse_eth_link_duplex(uint32_t conf_link_speed)
 432 {
 433         uint8_t hw_link_duplex = HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH;
 434
 435         if ((conf_link_speed & ETH_LINK_SPEED_FIXED) == ETH_LINK_SPEED_AUTONEG)
 436                 return HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH;
 437
 438         switch (conf_link_speed) {
 439         case ETH_LINK_SPEED_10M_HD:
 440         case ETH_LINK_SPEED_100M_HD:
 441                 return HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF;
 442         }
 443         return hw_link_duplex;
 444 }
 445
 446 static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed)
 447 {
 448         uint16_t eth_link_speed = 0;
 449
 450         if ((conf_link_speed & ETH_LINK_SPEED_FIXED) == ETH_LINK_SPEED_AUTONEG)
 451                 return ETH_LINK_SPEED_AUTONEG;
 452
 453         switch (conf_link_speed & ~ETH_LINK_SPEED_FIXED) {
 454         case ETH_LINK_SPEED_100M:
 455         case ETH_LINK_SPEED_100M_HD:
 456                 eth_link_speed =
 457                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB;
 458                 break;
 459         case ETH_LINK_SPEED_1G:
 460                 eth_link_speed =
 461                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB;
 462                 break;
 463         case ETH_LINK_SPEED_2_5G:
 464                 eth_link_speed =
 465                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB;
 466                 break;
 467         case ETH_LINK_SPEED_10G:
 468                 eth_link_speed =
 469                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB;
 470                 break;
 471         case ETH_LINK_SPEED_20G:
 472                 eth_link_speed =
 473                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB;
 474                 break;
 475         case ETH_LINK_SPEED_25G:
 476                 eth_link_speed =
 477                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB;
 478                 break;
 479         case ETH_LINK_SPEED_40G:
 480                 eth_link_speed =
 481                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB;
 482                 break;
 483         case ETH_LINK_SPEED_50G:
 484                 eth_link_speed =
 485                         HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB;
 486                 break;
 487         default:
 488                 RTE_LOG(ERR, PMD,
 489                         "Unsupported link speed %d; default to AUTO\n",
 490                         conf_link_speed);
 491                 break;
 492         }
 493         return eth_link_speed;
 494 }
 495
 496 #define BNXT_SUPPORTED_SPEEDS (ETH_LINK_SPEED_100M | ETH_LINK_SPEED_100M_HD | \
 497                 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G | \
 498                 ETH_LINK_SPEED_10G | ETH_LINK_SPEED_20G | ETH_LINK_SPEED_25G | \
 499                 ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G)
 500
 501 static int bnxt_valid_link_speed(uint32_t link_speed, uint8_t port_id)
 502 {
 503         uint32_t one_speed;
 504
 505         if (link_speed == ETH_LINK_SPEED_AUTONEG)
 506                 return 0;
 507
 508         if (link_speed & ETH_LINK_SPEED_FIXED) {
 509                 one_speed = link_speed & ~ETH_LINK_SPEED_FIXED;
 510
 511                 if (one_speed & (one_speed - 1)) {
 512                         RTE_LOG(ERR, PMD,
 513                                 "Invalid advertised speeds (%u) for port %u\n",
 514                                 link_speed, port_id);
 515                         return -EINVAL;
 516                 }
 517                 if ((one_speed & BNXT_SUPPORTED_SPEEDS) != one_speed) {
 518                         RTE_LOG(ERR, PMD,
 519                                 "Unsupported advertised speed (%u) for port %u\n",
 520                                 link_speed, port_id);
 521                         return -EINVAL;
 522                 }
 523         } else {
 524                 if (!(link_speed & BNXT_SUPPORTED_SPEEDS)) {
 525                         RTE_LOG(ERR, PMD,
 526                                 "Unsupported advertised speeds (%u) for port %u\n",
 527                                 link_speed, port_id);
 528                         return -EINVAL;
 529                 }
 530         }
 531         return 0;
 532 }
 533
 534 static uint16_t bnxt_parse_eth_link_speed_mask(uint32_t link_speed)
 535 {
 536         uint16_t ret = 0;
 537
 538         if (link_speed == ETH_LINK_SPEED_AUTONEG)
 539                 link_speed = BNXT_SUPPORTED_SPEEDS;
 540
 541         if (link_speed & ETH_LINK_SPEED_100M)
 542                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB;
 543         if (link_speed & ETH_LINK_SPEED_100M_HD)
 544                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB;
 545         if (link_speed & ETH_LINK_SPEED_1G)
 546                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB;
 547         if (link_speed & ETH_LINK_SPEED_2_5G)
 548                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB;
 549         if (link_speed & ETH_LINK_SPEED_10G)
 550                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB;
 551         if (link_speed & ETH_LINK_SPEED_20G)
 552                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB;
 553         if (link_speed & ETH_LINK_SPEED_25G)
 554                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB;
 555         if (link_speed & ETH_LINK_SPEED_40G)
 556                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB;
 557         if (link_speed & ETH_LINK_SPEED_50G)
 558                 ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB;
 559         return ret;
 560 }
 561
 562 int bnxt_set_hwrm_link_config(struct bnxt *bp, bool link_up)
 563 {
 564         int rc = 0;
 565         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 566         struct bnxt_link_info link_req;
 567         uint16_t speed;
 568
 569         rc = bnxt_valid_link_speed(dev_conf->link_speeds,
 570                         bp->eth_dev->data->port_id);
 571         if (rc)
 572                 goto error;
 573
 574         memset(&link_req, 0, sizeof(link_req));
 575         speed = bnxt_parse_eth_link_speed(dev_conf->link_speeds);
 576         link_req.link_up = link_up;
 577         if (speed == 0) {
 578                 link_req.phy_flags =
 579                                 HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG;
 580                 link_req.auto_mode =
 581                                 HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW;
 582                 link_req.auto_link_speed_mask =
 583                         bnxt_parse_eth_link_speed_mask(dev_conf->link_speeds);
 584                 link_req.auto_link_speed =
 585                                 HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB;
 586         } else {
 587                 link_req.auto_mode = HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE;
 588                 link_req.phy_flags = HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE |
 589                         HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY;
 590                 link_req.link_speed = speed;
 591         }
 592         link_req.duplex = bnxt_parse_eth_link_duplex(dev_conf->link_speeds);
 593         link_req.auto_pause = bp->link_info.auto_pause;
 594         link_req.force_pause = bp->link_info.force_pause;
 595
 596         rc = bnxt_hwrm_port_phy_cfg(bp, &link_req);
 597         if (rc) {
 598                 RTE_LOG(ERR, PMD,
 599                         "Set link config failed with rc %d\n", rc);
 600         }
 601
 602 error:
 603         return rc;
 604 }