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34 #include <rte_bitmap.h>
35 #include <rte_memzone.h>
40 #include "bnxt_hwrm.h"
41 #include "bnxt_ring.h"
47 #include "hsi_struct_def_dpdk.h"
50 * Generic ring handling
53 void bnxt_free_ring(struct bnxt_ring *ring)
55 if (ring->vmem_size && *ring->vmem) {
56 memset((char *)*ring->vmem, 0, ring->vmem_size);
59 rte_memzone_free((const struct rte_memzone *)ring->mem_zone);
66 int bnxt_init_ring_grps(struct bnxt *bp)
70 for (i = 0; i < bp->max_ring_grps; i++)
71 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
72 sizeof(struct bnxt_ring_grp_info));
78 * Allocates a completion ring with vmem and stats optionally also allocating
79 * a TX and/or RX ring. Passing NULL as tx_ring_info and/or rx_ring_info
80 * to not allocate them.
82 * Order in the allocation is:
83 * stats - Always non-zero length
84 * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
85 * tx vmem - Only non-zero length if tx_ring_info is not NULL
86 * rx vmem - Only non-zero length if rx_ring_info is not NULL
87 * cp bd ring - Always non-zero length
88 * tx bd ring - Only non-zero length if tx_ring_info is not NULL
89 * rx bd ring - Only non-zero length if rx_ring_info is not NULL
91 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
92 struct bnxt_tx_ring_info *tx_ring_info,
93 struct bnxt_rx_ring_info *rx_ring_info,
94 struct bnxt_cp_ring_info *cp_ring_info,
97 struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
98 struct bnxt_ring *tx_ring;
99 struct bnxt_ring *rx_ring;
100 struct rte_pci_device *pdev = bp->pdev;
101 const struct rte_memzone *mz = NULL;
102 char mz_name[RTE_MEMZONE_NAMESIZE];
103 rte_iova_t mz_phys_addr;
106 int stats_len = (tx_ring_info || rx_ring_info) ?
107 RTE_CACHE_LINE_ROUNDUP(sizeof(struct ctx_hw_stats64)) : 0;
109 int cp_vmem_start = stats_len;
110 int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
112 int tx_vmem_start = cp_vmem_start + cp_vmem_len;
114 tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
115 tx_ring_struct->vmem_size) : 0;
117 int rx_vmem_start = tx_vmem_start + tx_vmem_len;
118 int rx_vmem_len = rx_ring_info ?
119 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
120 rx_ring_struct->vmem_size) : 0;
121 int ag_vmem_start = 0;
123 int cp_ring_start = 0;
125 ag_vmem_start = rx_vmem_start + rx_vmem_len;
126 ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
127 rx_ring_info->ag_ring_struct->vmem_size) : 0;
128 cp_ring_start = ag_vmem_start + ag_vmem_len;
130 int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
131 sizeof(struct cmpl_base));
133 int tx_ring_start = cp_ring_start + cp_ring_len;
134 int tx_ring_len = tx_ring_info ?
135 RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
136 sizeof(struct tx_bd_long)) : 0;
138 int rx_ring_start = tx_ring_start + tx_ring_len;
139 int rx_ring_len = rx_ring_info ?
140 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
141 sizeof(struct rx_prod_pkt_bd)) : 0;
143 int ag_ring_start = rx_ring_start + rx_ring_len;
144 int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
146 int ag_bitmap_start = ag_ring_start + ag_ring_len;
147 int ag_bitmap_len = rx_ring_info ?
148 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
149 rx_ring_info->rx_ring_struct->ring_size *
150 AGG_RING_SIZE_FACTOR)) : 0;
152 int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
153 int tpa_info_len = rx_ring_info ?
154 RTE_CACHE_LINE_ROUNDUP(BNXT_TPA_MAX *
155 sizeof(struct bnxt_tpa_info)) : 0;
157 int total_alloc_len = tpa_info_start;
158 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
159 total_alloc_len += tpa_info_len;
161 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
162 "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
163 pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
165 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
166 mz = rte_memzone_lookup(mz_name);
168 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
171 RTE_MEMZONE_SIZE_HINT_ONLY,
176 memset(mz->addr, 0, mz->len);
177 mz_phys_addr = mz->iova;
178 if ((unsigned long)mz->addr == mz_phys_addr) {
179 RTE_LOG(WARNING, PMD,
180 "Memzone physical address same as virtual.\n");
181 RTE_LOG(WARNING, PMD,
182 "Using rte_mem_virt2iova()\n");
183 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
184 rte_mem_lock_page(((char *)mz->addr) + sz);
185 mz_phys_addr = rte_mem_virt2iova(mz->addr);
186 if (mz_phys_addr == 0) {
188 "unable to map ring address to physical memory\n");
194 tx_ring = tx_ring_info->tx_ring_struct;
196 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
197 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
198 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
199 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
200 tx_ring->mem_zone = (const void *)mz;
204 if (tx_ring->vmem_size) {
206 (void **)((char *)mz->addr + tx_vmem_start);
207 tx_ring_info->tx_buf_ring =
208 (struct bnxt_sw_tx_bd *)tx_ring->vmem;
213 rx_ring = rx_ring_info->rx_ring_struct;
215 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
216 rx_ring_info->rx_desc_ring =
217 (struct rx_prod_pkt_bd *)rx_ring->bd;
218 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
219 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
220 rx_ring->mem_zone = (const void *)mz;
224 if (rx_ring->vmem_size) {
226 (void **)((char *)mz->addr + rx_vmem_start);
227 rx_ring_info->rx_buf_ring =
228 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
231 rx_ring = rx_ring_info->ag_ring_struct;
233 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
234 rx_ring_info->ag_desc_ring =
235 (struct rx_prod_pkt_bd *)rx_ring->bd;
236 rx_ring->bd_dma = mz->iova + ag_ring_start;
237 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
238 rx_ring->mem_zone = (const void *)mz;
242 if (rx_ring->vmem_size) {
244 (void **)((char *)mz->addr + ag_vmem_start);
245 rx_ring_info->ag_buf_ring =
246 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
249 rx_ring_info->ag_bitmap =
250 rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
251 AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
252 ag_bitmap_start, ag_bitmap_len);
255 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
256 rx_ring_info->tpa_info =
257 ((struct bnxt_tpa_info *)((char *)mz->addr +
261 cp_ring->bd = ((char *)mz->addr + cp_ring_start);
262 cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
263 cp_ring_info->cp_desc_ring = cp_ring->bd;
264 cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
265 cp_ring->mem_zone = (const void *)mz;
269 if (cp_ring->vmem_size)
270 *cp_ring->vmem = ((char *)mz->addr + stats_len);
272 cp_ring_info->hw_stats = mz->addr;
273 cp_ring_info->hw_stats_map = mz_phys_addr;
275 cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
280 * [0] = default completion ring
281 * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
282 * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
284 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
286 struct rte_pci_device *pci_dev = bp->pdev;
290 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
291 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
292 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
293 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
294 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
295 struct bnxt_ring *ring = rxr->rx_ring_struct;
296 unsigned int idx = i + 1;
297 unsigned int map_idx = idx + bp->rx_cp_nr_rings;
299 bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
302 rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
303 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
304 idx, HWRM_NA_SIGNATURE,
308 cpr->cp_doorbell = (char *)pci_dev->mem_resource[2].addr +
310 bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
311 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
314 rc = bnxt_hwrm_ring_alloc(bp, ring,
315 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
316 idx, cpr->hw_stats_ctx_id,
317 cp_ring->fw_ring_id);
321 rxr->rx_doorbell = (char *)pci_dev->mem_resource[2].addr +
323 bp->grp_info[i].rx_fw_ring_id = ring->fw_ring_id;
324 B_RX_DB(rxr->rx_doorbell, rxr->rx_prod);
326 ring = rxr->ag_ring_struct;
329 RTE_LOG(ERR, PMD, "Alloc AGG Ring is NULL!\n");
333 rc = bnxt_hwrm_ring_alloc(bp, ring,
334 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
335 map_idx, HWRM_NA_SIGNATURE,
336 cp_ring->fw_ring_id);
339 RTE_LOG(DEBUG, PMD, "Alloc AGG Done!\n");
342 (char *)pci_dev->mem_resource[2].addr +
344 bp->grp_info[i].ag_fw_ring_id = ring->fw_ring_id;
345 B_RX_DB(rxr->ag_doorbell, rxr->ag_prod);
347 rxq->rx_buf_use_size = BNXT_MAX_MTU + ETHER_HDR_LEN +
348 ETHER_CRC_LEN + (2 * VLAN_TAG_SIZE);
349 if (bnxt_init_one_rx_ring(rxq)) {
350 RTE_LOG(ERR, PMD, "bnxt_init_one_rx_ring failed!\n");
351 bnxt_rx_queue_release_op(rxq);
354 B_RX_DB(rxr->rx_doorbell, rxr->rx_prod);
355 B_RX_DB(rxr->ag_doorbell, rxr->ag_prod);
359 for (i = 0; i < bp->tx_cp_nr_rings; i++) {
360 struct bnxt_tx_queue *txq = bp->tx_queues[i];
361 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
362 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
363 struct bnxt_tx_ring_info *txr = txq->tx_ring;
364 struct bnxt_ring *ring = txr->tx_ring_struct;
365 unsigned int idx = i + 1 + bp->rx_cp_nr_rings;
368 rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
369 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
370 idx, HWRM_NA_SIGNATURE,
375 cpr->cp_doorbell = (char *)pci_dev->mem_resource[2].addr +
377 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
380 rc = bnxt_hwrm_ring_alloc(bp, ring,
381 HWRM_RING_ALLOC_INPUT_RING_TYPE_TX,
382 idx, cpr->hw_stats_ctx_id,
383 cp_ring->fw_ring_id);
387 txr->tx_doorbell = (char *)pci_dev->mem_resource[2].addr +