drivers/net/bnxt/bnxt_ring.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <rte_bitmap.h>
   7 #include <rte_memzone.h>
   8 #include <rte_malloc.h>
   9 #include <unistd.h>
  10
  11 #include "bnxt.h"
  12 #include "bnxt_cpr.h"
  13 #include "bnxt_hwrm.h"
  14 #include "bnxt_ring.h"
  15 #include "bnxt_rxq.h"
  16 #include "bnxt_rxr.h"
  17 #include "bnxt_txq.h"
  18 #include "bnxt_txr.h"
  19
  20 #include "hsi_struct_def_dpdk.h"
  21
  22 /*
  23  * Generic ring handling
  24  */
  25
  26 void bnxt_free_ring(struct bnxt_ring *ring)
  27 {
  28         if (!ring)
  29                 return;
  30
  31         if (ring->vmem_size && *ring->vmem) {
  32                 memset((char *)*ring->vmem, 0, ring->vmem_size);
  33                 *ring->vmem = NULL;
  34         }
  35         ring->mem_zone = NULL;
  36 }
  37
  38 /*
  39  * Ring groups
  40  */
  41
  42 int bnxt_init_ring_grps(struct bnxt *bp)
  43 {
  44         unsigned int i;
  45
  46         for (i = 0; i < bp->max_ring_grps; i++)
  47                 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
  48                        sizeof(struct bnxt_ring_grp_info));
  49
  50         return 0;
  51 }
  52
  53 int bnxt_alloc_ring_grps(struct bnxt *bp)
  54 {
  55         if (bp->max_tx_rings == 0) {
  56                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
  57                 return -EBUSY;
  58         }
  59
  60         /* THOR does not support ring groups.
  61          * But we will use the array to save RSS context IDs.
  62          */
  63         if (BNXT_CHIP_THOR(bp)) {
  64                 bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
  65         } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
  66                 /* 1 ring is for default completion ring */
  67                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
  68                 return -ENOSPC;
  69         }
  70
  71         if (BNXT_HAS_RING_GRPS(bp)) {
  72                 bp->grp_info = rte_zmalloc("bnxt_grp_info",
  73                                            sizeof(*bp->grp_info) *
  74                                            bp->max_ring_grps, 0);
  75                 if (!bp->grp_info) {
  76                         PMD_DRV_LOG(ERR,
  77                                     "Failed to alloc grp info tbl.\n");
  78                         return -ENOMEM;
  79                 }
  80         }
  81
  82         return 0;
  83 }
  84
  85 /*
  86  * Allocates a completion ring with vmem and stats optionally also allocating
  87  * a TX and/or RX ring.  Passing NULL as tx_ring_info and/or rx_ring_info
  88  * to not allocate them.
  89  *
  90  * Order in the allocation is:
  91  * stats - Always non-zero length
  92  * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
  93  * tx vmem - Only non-zero length if tx_ring_info is not NULL
  94  * rx vmem - Only non-zero length if rx_ring_info is not NULL
  95  * cp bd ring - Always non-zero length
  96  * tx bd ring - Only non-zero length if tx_ring_info is not NULL
  97  * rx bd ring - Only non-zero length if rx_ring_info is not NULL
  98  */
  99 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
 100                             struct bnxt_tx_queue *txq,
 101                             struct bnxt_rx_queue *rxq,
 102                             struct bnxt_cp_ring_info *cp_ring_info,
 103                             struct bnxt_cp_ring_info *nq_ring_info,
 104                             const char *suffix)
 105 {
 106         struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
 107         struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
 108         struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
 109         struct bnxt_ring *tx_ring;
 110         struct bnxt_ring *rx_ring;
 111         struct rte_pci_device *pdev = bp->pdev;
 112         uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
 113         const struct rte_memzone *mz = NULL;
 114         char mz_name[RTE_MEMZONE_NAMESIZE];
 115         rte_iova_t mz_phys_addr_base;
 116         rte_iova_t mz_phys_addr;
 117         int sz;
 118
 119         int stats_len = (tx_ring_info || rx_ring_info) ?
 120             RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
 121                                    sizeof (struct hwrm_resp_hdr)) : 0;
 122         stats_len = RTE_ALIGN(stats_len, 128);
 123
 124         int cp_vmem_start = stats_len;
 125         int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
 126         cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
 127
 128         int nq_vmem_len = BNXT_CHIP_THOR(bp) ?
 129                 RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
 130         nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
 131
 132         int nq_vmem_start = cp_vmem_start + cp_vmem_len;
 133
 134         int tx_vmem_start = nq_vmem_start + nq_vmem_len;
 135         int tx_vmem_len =
 136             tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
 137                                                 tx_ring_struct->vmem_size) : 0;
 138         tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
 139
 140         int rx_vmem_start = tx_vmem_start + tx_vmem_len;
 141         int rx_vmem_len = rx_ring_info ?
 142                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
 143                                                 rx_ring_struct->vmem_size) : 0;
 144         rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
 145         int ag_vmem_start = 0;
 146         int ag_vmem_len = 0;
 147         int cp_ring_start =  0;
 148         int nq_ring_start = 0;
 149
 150         ag_vmem_start = rx_vmem_start + rx_vmem_len;
 151         ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
 152                                 rx_ring_info->ag_ring_struct->vmem_size) : 0;
 153         cp_ring_start = ag_vmem_start + ag_vmem_len;
 154         cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
 155
 156         int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
 157                                                  sizeof(struct cmpl_base));
 158         cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
 159         nq_ring_start = cp_ring_start + cp_ring_len;
 160         nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
 161
 162         int nq_ring_len = BNXT_CHIP_THOR(bp) ? cp_ring_len : 0;
 163
 164         int tx_ring_start = nq_ring_start + nq_ring_len;
 165         int tx_ring_len = tx_ring_info ?
 166             RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
 167                                    sizeof(struct tx_bd_long)) : 0;
 168         tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
 169
 170         int rx_ring_start = tx_ring_start + tx_ring_len;
 171         int rx_ring_len =  rx_ring_info ?
 172                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
 173                 sizeof(struct rx_prod_pkt_bd)) : 0;
 174         rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
 175
 176         int ag_ring_start = rx_ring_start + rx_ring_len;
 177         int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
 178         ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
 179
 180         int ag_bitmap_start = ag_ring_start + ag_ring_len;
 181         int ag_bitmap_len =  rx_ring_info ?
 182                 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
 183                         rx_ring_info->rx_ring_struct->ring_size *
 184                         AGG_RING_SIZE_FACTOR)) : 0;
 185
 186         int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
 187         int tpa_info_len = rx_ring_info ?
 188                 RTE_CACHE_LINE_ROUNDUP(BNXT_TPA_MAX *
 189                                        sizeof(struct bnxt_tpa_info)) : 0;
 190
 191         int total_alloc_len = tpa_info_start;
 192         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 193                 total_alloc_len += tpa_info_len;
 194
 195         snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
 196                  "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
 197                  pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
 198                  suffix);
 199         mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
 200         mz = rte_memzone_lookup(mz_name);
 201         if (!mz) {
 202                 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
 203                                 SOCKET_ID_ANY,
 204                                 RTE_MEMZONE_2MB |
 205                                 RTE_MEMZONE_SIZE_HINT_ONLY |
 206                                 RTE_MEMZONE_IOVA_CONTIG,
 207                                 getpagesize());
 208                 if (mz == NULL)
 209                         return -ENOMEM;
 210         }
 211         memset(mz->addr, 0, mz->len);
 212         mz_phys_addr_base = mz->iova;
 213         mz_phys_addr = mz->iova;
 214         if ((unsigned long)mz->addr == mz_phys_addr_base) {
 215                 PMD_DRV_LOG(WARNING,
 216                         "Memzone physical address same as virtual.\n");
 217                 PMD_DRV_LOG(WARNING,
 218                         "Using rte_mem_virt2iova()\n");
 219                 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
 220                         rte_mem_lock_page(((char *)mz->addr) + sz);
 221                 mz_phys_addr_base = rte_mem_virt2iova(mz->addr);
 222                 mz_phys_addr = rte_mem_virt2iova(mz->addr);
 223                 if (mz_phys_addr == RTE_BAD_IOVA) {
 224                         PMD_DRV_LOG(ERR,
 225                         "unable to map ring address to physical memory\n");
 226                         return -ENOMEM;
 227                 }
 228         }
 229
 230         if (tx_ring_info) {
 231                 txq->mz = mz;
 232                 tx_ring = tx_ring_info->tx_ring_struct;
 233
 234                 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
 235                 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
 236                 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
 237                 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
 238                 tx_ring->mem_zone = (const void *)mz;
 239
 240                 if (!tx_ring->bd)
 241                         return -ENOMEM;
 242                 if (tx_ring->vmem_size) {
 243                         tx_ring->vmem =
 244                             (void **)((char *)mz->addr + tx_vmem_start);
 245                         tx_ring_info->tx_buf_ring =
 246                             (struct bnxt_sw_tx_bd *)tx_ring->vmem;
 247                 }
 248         }
 249
 250         if (rx_ring_info) {
 251                 rxq->mz = mz;
 252                 rx_ring = rx_ring_info->rx_ring_struct;
 253
 254                 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
 255                 rx_ring_info->rx_desc_ring =
 256                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 257                 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
 258                 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
 259                 rx_ring->mem_zone = (const void *)mz;
 260
 261                 if (!rx_ring->bd)
 262                         return -ENOMEM;
 263                 if (rx_ring->vmem_size) {
 264                         rx_ring->vmem =
 265                             (void **)((char *)mz->addr + rx_vmem_start);
 266                         rx_ring_info->rx_buf_ring =
 267                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 268                 }
 269
 270                 rx_ring = rx_ring_info->ag_ring_struct;
 271
 272                 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
 273                 rx_ring_info->ag_desc_ring =
 274                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 275                 rx_ring->bd_dma = mz->iova + ag_ring_start;
 276                 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
 277                 rx_ring->mem_zone = (const void *)mz;
 278
 279                 if (!rx_ring->bd)
 280                         return -ENOMEM;
 281                 if (rx_ring->vmem_size) {
 282                         rx_ring->vmem =
 283                             (void **)((char *)mz->addr + ag_vmem_start);
 284                         rx_ring_info->ag_buf_ring =
 285                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 286                 }
 287
 288                 rx_ring_info->ag_bitmap =
 289                     rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
 290                                     AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
 291                                     ag_bitmap_start, ag_bitmap_len);
 292
 293                 /* TPA info */
 294                 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 295                         rx_ring_info->tpa_info =
 296                                 ((struct bnxt_tpa_info *)((char *)mz->addr +
 297                                                           tpa_info_start));
 298         }
 299
 300         cp_ring->bd = ((char *)mz->addr + cp_ring_start);
 301         cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
 302         cp_ring_info->cp_desc_ring = cp_ring->bd;
 303         cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
 304         cp_ring->mem_zone = (const void *)mz;
 305
 306         if (!cp_ring->bd)
 307                 return -ENOMEM;
 308         if (cp_ring->vmem_size)
 309                 *cp_ring->vmem = ((char *)mz->addr + stats_len);
 310         if (stats_len) {
 311                 cp_ring_info->hw_stats = mz->addr;
 312                 cp_ring_info->hw_stats_map = mz_phys_addr;
 313         }
 314         cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 315
 316         if (nq_ring_info) {
 317                 struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
 318
 319                 nq_ring->bd = (char *)mz->addr + nq_ring_start;
 320                 nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
 321                 nq_ring_info->cp_desc_ring = nq_ring->bd;
 322                 nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
 323                 nq_ring->mem_zone = (const void *)mz;
 324
 325                 if (!nq_ring->bd)
 326                         return -ENOMEM;
 327                 if (nq_ring->vmem_size)
 328                         *nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
 329
 330                 nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 331         }
 332
 333         return 0;
 334 }
 335
 336 static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
 337 {
 338         /* Tick values in micro seconds.
 339          * 1 coal_buf x bufs_per_record = 1 completion record.
 340          */
 341         coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
 342         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 343         coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
 344         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 345         coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
 346         coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
 347         /* min timer set to 1/2 of interrupt timer */
 348         coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
 349         /* buf timer set to 1/4 of interrupt timer */
 350         coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
 351         coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
 352 }
 353
 354 static void bnxt_set_db(struct bnxt *bp,
 355                         struct bnxt_db_info *db,
 356                         uint32_t ring_type,
 357                         uint32_t map_idx,
 358                         uint32_t fid)
 359 {
 360         if (BNXT_CHIP_THOR(bp)) {
 361                 if (BNXT_PF(bp))
 362                         db->doorbell = (char *)bp->doorbell_base + 0x10000;
 363                 else
 364                         db->doorbell = (char *)bp->doorbell_base + 0x4000;
 365                 switch (ring_type) {
 366                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 367                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
 368                         break;
 369                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 370                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
 371                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
 372                         break;
 373                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 374                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
 375                         break;
 376                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
 377                         db->db_key64 = DBR_PATH_L2;
 378                         break;
 379                 }
 380                 db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
 381                 db->db_64 = true;
 382         } else {
 383                 db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
 384                 switch (ring_type) {
 385                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 386                         db->db_key32 = DB_KEY_TX;
 387                         break;
 388                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 389                         db->db_key32 = DB_KEY_RX;
 390                         break;
 391                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 392                         db->db_key32 = DB_KEY_CP;
 393                         break;
 394                 }
 395                 db->db_64 = false;
 396         }
 397 }
 398
 399 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
 400                                 struct bnxt_cp_ring_info *cpr,
 401                                 struct bnxt_cp_ring_info *nqr)
 402 {
 403         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 404         uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
 405         int cp_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp);
 406         uint8_t ring_type;
 407         int rc = 0;
 408
 409         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 410
 411         if (BNXT_HAS_NQ(bp)) {
 412                 if (nqr) {
 413                         nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
 414                 } else {
 415                         PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
 416                         return -EINVAL;
 417                 }
 418         }
 419
 420         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
 421                                   HWRM_NA_SIGNATURE, nq_ring_id);
 422         if (rc)
 423                 return rc;
 424
 425         cpr->cp_cons = 0;
 426         bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
 427                     cp_ring->fw_ring_id);
 428         bnxt_db_cq(cpr);
 429
 430         return 0;
 431 }
 432
 433 static int bnxt_alloc_nq_ring(struct bnxt *bp, int queue_index,
 434                               struct bnxt_cp_ring_info *nqr)
 435 {
 436         struct bnxt_ring *nq_ring = nqr->cp_ring_struct;
 437         int nq_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp);
 438         uint8_t ring_type;
 439         int rc = 0;
 440
 441         if (!BNXT_HAS_NQ(bp))
 442                 return -EINVAL;
 443
 444         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 445
 446         rc = bnxt_hwrm_ring_alloc(bp, nq_ring, ring_type, nq_ring_index,
 447                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE);
 448         if (rc)
 449                 return rc;
 450
 451         bnxt_set_db(bp, &nqr->cp_db, ring_type, nq_ring_index,
 452                     nq_ring->fw_ring_id);
 453         bnxt_db_nq(nqr);
 454
 455         return 0;
 456 }
 457
 458 static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
 459 {
 460         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 461         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 462         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 463         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 464         struct bnxt_ring *ring = rxr->rx_ring_struct;
 465         uint8_t ring_type;
 466         int rc = 0;
 467
 468         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 469
 470         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
 471                                   queue_index, cpr->hw_stats_ctx_id,
 472                                   cp_ring->fw_ring_id);
 473         if (rc)
 474                 return rc;
 475
 476         rxr->rx_prod = 0;
 477         if (BNXT_HAS_RING_GRPS(bp))
 478                 bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
 479         bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id);
 480         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 481
 482         return 0;
 483 }
 484
 485 static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
 486 {
 487         unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
 488         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 489         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 490         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 491         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 492         struct bnxt_ring *ring = rxr->ag_ring_struct;
 493         uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 494         uint8_t ring_type;
 495         int rc = 0;
 496
 497         ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
 498
 499         if (BNXT_CHIP_THOR(bp)) {
 500                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
 501                 hw_stats_ctx_id = cpr->hw_stats_ctx_id;
 502         } else {
 503                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 504         }
 505
 506         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
 507                                   hw_stats_ctx_id, cp_ring->fw_ring_id);
 508
 509         if (rc)
 510                 return rc;
 511
 512         rxr->ag_prod = 0;
 513         if (BNXT_HAS_RING_GRPS(bp))
 514                 bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
 515         bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id);
 516         bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 517
 518         return 0;
 519 }
 520
 521 int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
 522 {
 523         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 524         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 525         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 526         struct bnxt_cp_ring_info *nqr = rxq->nq_ring;
 527         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 528         int rc;
 529
 530         if (BNXT_HAS_NQ(bp)) {
 531                 rc = bnxt_alloc_nq_ring(bp, queue_index, nqr);
 532                 if (rc)
 533                         goto err_out;
 534         }
 535
 536         rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr, nqr);
 537         if (rc)
 538                 goto err_out;
 539
 540         if (BNXT_HAS_RING_GRPS(bp)) {
 541                 bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
 542                 bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
 543         }
 544
 545         if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
 546                 /*
 547                  * If a dedicated async event completion ring is not enabled,
 548                  * use the first completion ring from PF or VF as the default
 549                  * completion ring for async event handling.
 550                  */
 551                 bp->async_cp_ring = cpr;
 552                 rc = bnxt_hwrm_set_async_event_cr(bp);
 553                 if (rc)
 554                         goto err_out;
 555         }
 556
 557         rc = bnxt_alloc_rx_ring(bp, queue_index);
 558         if (rc)
 559                 goto err_out;
 560
 561         rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
 562         if (rc)
 563                 goto err_out;
 564
 565         rxq->rx_buf_use_size = BNXT_MAX_MTU + RTE_ETHER_HDR_LEN +
 566                 RTE_ETHER_CRC_LEN + (2 * VLAN_TAG_SIZE);
 567
 568         if (bp->eth_dev->data->rx_queue_state[queue_index] ==
 569             RTE_ETH_QUEUE_STATE_STARTED) {
 570                 if (bnxt_init_one_rx_ring(rxq)) {
 571                         RTE_LOG(ERR, PMD,
 572                                 "bnxt_init_one_rx_ring failed!\n");
 573                         bnxt_rx_queue_release_op(rxq);
 574                         rc = -ENOMEM;
 575                         goto err_out;
 576                 }
 577                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 578                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 579         }
 580         rxq->index = queue_index;
 581
 582         return 0;
 583
 584 err_out:
 585         PMD_DRV_LOG(ERR,
 586                     "Failed to allocate receive queue %d, rc %d.\n",
 587                     queue_index, rc);
 588         return rc;
 589 }
 590
 591 /* ring_grp usage:
 592  * [0] = default completion ring
 593  * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
 594  * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
 595  */
 596 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 597 {
 598         struct bnxt_coal coal;
 599         unsigned int i;
 600         uint8_t ring_type;
 601         int rc = 0;
 602
 603         bnxt_init_dflt_coal(&coal);
 604
 605         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 606                 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
 607                 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 608                 struct bnxt_cp_ring_info *nqr = rxq->nq_ring;
 609                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 610                 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 611
 612                 if (BNXT_HAS_NQ(bp)) {
 613                         if (bnxt_alloc_nq_ring(bp, i, nqr))
 614                                 goto err_out;
 615                 }
 616
 617                 if (bnxt_alloc_cmpl_ring(bp, i, cpr, nqr))
 618                         goto err_out;
 619
 620                 if (BNXT_HAS_RING_GRPS(bp)) {
 621                         bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
 622                         bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
 623                 }
 624
 625                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 626                 if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
 627                         /*
 628                          * If a dedicated async event completion ring is not
 629                          * enabled, use the first completion ring as the default
 630                          * completion ring for async event handling.
 631                          */
 632                         bp->async_cp_ring = cpr;
 633                         rc = bnxt_hwrm_set_async_event_cr(bp);
 634                         if (rc)
 635                                 goto err_out;
 636                 }
 637
 638                 if (bnxt_alloc_rx_ring(bp, i))
 639                         goto err_out;
 640
 641                 if (bnxt_alloc_rx_agg_ring(bp, i))
 642                         goto err_out;
 643
 644                 rxq->rx_buf_use_size = BNXT_MAX_MTU + RTE_ETHER_HDR_LEN +
 645                                         RTE_ETHER_CRC_LEN + (2 * VLAN_TAG_SIZE);
 646                 if (bnxt_init_one_rx_ring(rxq)) {
 647                         PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
 648                         bnxt_rx_queue_release_op(rxq);
 649                         return -ENOMEM;
 650                 }
 651                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 652                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 653                 rxq->index = i;
 654 #ifdef RTE_ARCH_X86
 655                 bnxt_rxq_vec_setup(rxq);
 656 #endif
 657         }
 658
 659         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 660                 struct bnxt_tx_queue *txq = bp->tx_queues[i];
 661                 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 662                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 663                 struct bnxt_cp_ring_info *nqr = txq->nq_ring;
 664                 struct bnxt_tx_ring_info *txr = txq->tx_ring;
 665                 struct bnxt_ring *ring = txr->tx_ring_struct;
 666                 unsigned int idx = i + bp->rx_cp_nr_rings;
 667
 668                 if (BNXT_HAS_NQ(bp)) {
 669                         if (bnxt_alloc_nq_ring(bp, idx, nqr))
 670                                 goto err_out;
 671                 }
 672
 673                 if (bnxt_alloc_cmpl_ring(bp, idx, cpr, nqr))
 674                         goto err_out;
 675
 676                 /* Tx ring */
 677                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
 678                 rc = bnxt_hwrm_ring_alloc(bp, ring,
 679                                           ring_type,
 680                                           i, cpr->hw_stats_ctx_id,
 681                                           cp_ring->fw_ring_id);
 682                 if (rc)
 683                         goto err_out;
 684
 685                 bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id);
 686                 txq->index = idx;
 687                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 688         }
 689
 690 err_out:
 691         return rc;
 692 }
 693
 694 /* Allocate dedicated async completion ring. */
 695 int bnxt_alloc_async_cp_ring(struct bnxt *bp)
 696 {
 697         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 698         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 699         uint8_t ring_type;
 700         int rc;
 701
 702         if (BNXT_NUM_ASYNC_CPR(bp) == 0)
 703                 return 0;
 704
 705         if (BNXT_HAS_NQ(bp))
 706                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 707         else
 708                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 709
 710         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
 711                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE);
 712
 713         if (rc)
 714                 return rc;
 715
 716         cpr->cp_cons = 0;
 717         cpr->valid = 0;
 718         bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
 719                     cp_ring->fw_ring_id);
 720
 721         if (BNXT_HAS_NQ(bp))
 722                 bnxt_db_nq(cpr);
 723         else
 724                 bnxt_db_cq(cpr);
 725
 726         return bnxt_hwrm_set_async_event_cr(bp);
 727 }
 728
 729 /* Free dedicated async completion ring. */
 730 void bnxt_free_async_cp_ring(struct bnxt *bp)
 731 {
 732         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 733
 734         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 735                 return;
 736
 737         if (BNXT_HAS_NQ(bp))
 738                 bnxt_free_nq_ring(bp, cpr);
 739         else
 740                 bnxt_free_cp_ring(bp, cpr);
 741
 742         bnxt_free_ring(cpr->cp_ring_struct);
 743         rte_free(cpr->cp_ring_struct);
 744         cpr->cp_ring_struct = NULL;
 745         rte_free(cpr);
 746         bp->async_cp_ring = NULL;
 747 }
 748
 749 int bnxt_alloc_async_ring_struct(struct bnxt *bp)
 750 {
 751         struct bnxt_cp_ring_info *cpr = NULL;
 752         struct bnxt_ring *ring = NULL;
 753         unsigned int socket_id;
 754
 755         if (BNXT_NUM_ASYNC_CPR(bp) == 0)
 756                 return 0;
 757
 758         socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
 759
 760         cpr = rte_zmalloc_socket("cpr",
 761                                  sizeof(struct bnxt_cp_ring_info),
 762                                  RTE_CACHE_LINE_SIZE, socket_id);
 763         if (cpr == NULL)
 764                 return -ENOMEM;
 765
 766         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 767                                   sizeof(struct bnxt_ring),
 768                                   RTE_CACHE_LINE_SIZE, socket_id);
 769         if (ring == NULL) {
 770                 rte_free(cpr);
 771                 return -ENOMEM;
 772         }
 773
 774         ring->bd = (void *)cpr->cp_desc_ring;
 775         ring->bd_dma = cpr->cp_desc_mapping;
 776         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 777         ring->ring_mask = ring->ring_size - 1;
 778         ring->vmem_size = 0;
 779         ring->vmem = NULL;
 780
 781         bp->async_cp_ring = cpr;
 782         cpr->cp_ring_struct = ring;
 783
 784         return bnxt_alloc_rings(bp, 0, NULL, NULL,
 785                                 bp->async_cp_ring, NULL,
 786                                 "def_cp");
 787 }