drivers/net/bnxt/bnxt_ring.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <rte_bitmap.h>
   7 #include <rte_memzone.h>
   8 #include <rte_malloc.h>
   9 #include <unistd.h>
  10
  11 #include "bnxt.h"
  12 #include "bnxt_cpr.h"
  13 #include "bnxt_hwrm.h"
  14 #include "bnxt_ring.h"
  15 #include "bnxt_rxq.h"
  16 #include "bnxt_rxr.h"
  17 #include "bnxt_txq.h"
  18 #include "bnxt_txr.h"
  19
  20 #include "hsi_struct_def_dpdk.h"
  21
  22 /*
  23  * Generic ring handling
  24  */
  25
  26 void bnxt_free_ring(struct bnxt_ring *ring)
  27 {
  28         if (!ring)
  29                 return;
  30
  31         if (ring->vmem_size && *ring->vmem) {
  32                 memset((char *)*ring->vmem, 0, ring->vmem_size);
  33                 *ring->vmem = NULL;
  34         }
  35         ring->mem_zone = NULL;
  36 }
  37
  38 /*
  39  * Ring groups
  40  */
  41
  42 int bnxt_init_ring_grps(struct bnxt *bp)
  43 {
  44         unsigned int i;
  45
  46         for (i = 0; i < bp->max_ring_grps; i++)
  47                 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
  48                        sizeof(struct bnxt_ring_grp_info));
  49
  50         return 0;
  51 }
  52
  53 int bnxt_alloc_ring_grps(struct bnxt *bp)
  54 {
  55         if (bp->max_tx_rings == 0) {
  56                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
  57                 return -EBUSY;
  58         }
  59
  60         /* THOR does not support ring groups.
  61          * But we will use the array to save RSS context IDs.
  62          */
  63         if (BNXT_CHIP_THOR(bp)) {
  64                 bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
  65         } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
  66                 /* 1 ring is for default completion ring */
  67                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
  68                 return -ENOSPC;
  69         }
  70
  71         if (BNXT_HAS_RING_GRPS(bp)) {
  72                 bp->grp_info = rte_zmalloc("bnxt_grp_info",
  73                                            sizeof(*bp->grp_info) *
  74                                            bp->max_ring_grps, 0);
  75                 if (!bp->grp_info) {
  76                         PMD_DRV_LOG(ERR,
  77                                     "Failed to alloc grp info tbl.\n");
  78                         return -ENOMEM;
  79                 }
  80         }
  81
  82         return 0;
  83 }
  84
  85 /*
  86  * Allocates a completion ring with vmem and stats optionally also allocating
  87  * a TX and/or RX ring.  Passing NULL as tx_ring_info and/or rx_ring_info
  88  * to not allocate them.
  89  *
  90  * Order in the allocation is:
  91  * stats - Always non-zero length
  92  * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
  93  * tx vmem - Only non-zero length if tx_ring_info is not NULL
  94  * rx vmem - Only non-zero length if rx_ring_info is not NULL
  95  * cp bd ring - Always non-zero length
  96  * tx bd ring - Only non-zero length if tx_ring_info is not NULL
  97  * rx bd ring - Only non-zero length if rx_ring_info is not NULL
  98  */
  99 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
 100                             struct bnxt_tx_queue *txq,
 101                             struct bnxt_rx_queue *rxq,
 102                             struct bnxt_cp_ring_info *cp_ring_info,
 103                             struct bnxt_cp_ring_info *nq_ring_info,
 104                             const char *suffix)
 105 {
 106         struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
 107         struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
 108         struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
 109         struct bnxt_ring *tx_ring;
 110         struct bnxt_ring *rx_ring;
 111         struct rte_pci_device *pdev = bp->pdev;
 112         uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
 113         const struct rte_memzone *mz = NULL;
 114         char mz_name[RTE_MEMZONE_NAMESIZE];
 115         rte_iova_t mz_phys_addr_base;
 116         rte_iova_t mz_phys_addr;
 117         int sz;
 118
 119         int stats_len = (tx_ring_info || rx_ring_info) ?
 120             RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
 121                                    sizeof (struct hwrm_resp_hdr)) : 0;
 122         stats_len = RTE_ALIGN(stats_len, 128);
 123
 124         int cp_vmem_start = stats_len;
 125         int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
 126         cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
 127
 128         int nq_vmem_len = BNXT_CHIP_THOR(bp) ?
 129                 RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
 130         nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
 131
 132         int nq_vmem_start = cp_vmem_start + cp_vmem_len;
 133
 134         int tx_vmem_start = nq_vmem_start + nq_vmem_len;
 135         int tx_vmem_len =
 136             tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
 137                                                 tx_ring_struct->vmem_size) : 0;
 138         tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
 139
 140         int rx_vmem_start = tx_vmem_start + tx_vmem_len;
 141         int rx_vmem_len = rx_ring_info ?
 142                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
 143                                                 rx_ring_struct->vmem_size) : 0;
 144         rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
 145         int ag_vmem_start = 0;
 146         int ag_vmem_len = 0;
 147         int cp_ring_start =  0;
 148         int nq_ring_start = 0;
 149
 150         ag_vmem_start = rx_vmem_start + rx_vmem_len;
 151         ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
 152                                 rx_ring_info->ag_ring_struct->vmem_size) : 0;
 153         cp_ring_start = ag_vmem_start + ag_vmem_len;
 154         cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
 155
 156         int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
 157                                                  sizeof(struct cmpl_base));
 158         cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
 159         nq_ring_start = cp_ring_start + cp_ring_len;
 160         nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
 161
 162         int nq_ring_len = BNXT_CHIP_THOR(bp) ? cp_ring_len : 0;
 163
 164         int tx_ring_start = nq_ring_start + nq_ring_len;
 165         tx_ring_start = RTE_ALIGN(tx_ring_start, 4096);
 166         int tx_ring_len = tx_ring_info ?
 167             RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
 168                                    sizeof(struct tx_bd_long)) : 0;
 169         tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
 170
 171         int rx_ring_start = tx_ring_start + tx_ring_len;
 172         rx_ring_start = RTE_ALIGN(rx_ring_start, 4096);
 173         int rx_ring_len =  rx_ring_info ?
 174                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
 175                 sizeof(struct rx_prod_pkt_bd)) : 0;
 176         rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
 177
 178         int ag_ring_start = rx_ring_start + rx_ring_len;
 179         ag_ring_start = RTE_ALIGN(ag_ring_start, 4096);
 180         int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
 181         ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
 182
 183         int ag_bitmap_start = ag_ring_start + ag_ring_len;
 184         int ag_bitmap_len =  rx_ring_info ?
 185                 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
 186                         rx_ring_info->rx_ring_struct->ring_size *
 187                         AGG_RING_SIZE_FACTOR)) : 0;
 188
 189         int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
 190         int tpa_info_len = rx_ring_info ?
 191                 RTE_CACHE_LINE_ROUNDUP(BNXT_TPA_MAX *
 192                                        sizeof(struct bnxt_tpa_info)) : 0;
 193
 194         int total_alloc_len = tpa_info_start;
 195         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 196                 total_alloc_len += tpa_info_len;
 197
 198         snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
 199                  "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
 200                  pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
 201                  suffix);
 202         mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
 203         mz = rte_memzone_lookup(mz_name);
 204         if (!mz) {
 205                 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
 206                                 SOCKET_ID_ANY,
 207                                 RTE_MEMZONE_2MB |
 208                                 RTE_MEMZONE_SIZE_HINT_ONLY |
 209                                 RTE_MEMZONE_IOVA_CONTIG,
 210                                 getpagesize());
 211                 if (mz == NULL)
 212                         return -ENOMEM;
 213         }
 214         memset(mz->addr, 0, mz->len);
 215         mz_phys_addr_base = mz->iova;
 216         mz_phys_addr = mz->iova;
 217         if ((unsigned long)mz->addr == mz_phys_addr_base) {
 218                 PMD_DRV_LOG(DEBUG,
 219                             "Memzone physical address same as virtual.\n");
 220                 PMD_DRV_LOG(DEBUG, "Using rte_mem_virt2iova()\n");
 221                 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
 222                         rte_mem_lock_page(((char *)mz->addr) + sz);
 223                 mz_phys_addr_base = rte_mem_virt2iova(mz->addr);
 224                 mz_phys_addr = rte_mem_virt2iova(mz->addr);
 225                 if (mz_phys_addr == RTE_BAD_IOVA) {
 226                         PMD_DRV_LOG(ERR,
 227                         "unable to map ring address to physical memory\n");
 228                         return -ENOMEM;
 229                 }
 230         }
 231
 232         if (tx_ring_info) {
 233                 txq->mz = mz;
 234                 tx_ring = tx_ring_info->tx_ring_struct;
 235
 236                 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
 237                 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
 238                 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
 239                 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
 240                 tx_ring->mem_zone = (const void *)mz;
 241
 242                 if (!tx_ring->bd)
 243                         return -ENOMEM;
 244                 if (tx_ring->vmem_size) {
 245                         tx_ring->vmem =
 246                             (void **)((char *)mz->addr + tx_vmem_start);
 247                         tx_ring_info->tx_buf_ring =
 248                             (struct bnxt_sw_tx_bd *)tx_ring->vmem;
 249                 }
 250         }
 251
 252         if (rx_ring_info) {
 253                 rxq->mz = mz;
 254                 rx_ring = rx_ring_info->rx_ring_struct;
 255
 256                 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
 257                 rx_ring_info->rx_desc_ring =
 258                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 259                 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
 260                 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
 261                 rx_ring->mem_zone = (const void *)mz;
 262
 263                 if (!rx_ring->bd)
 264                         return -ENOMEM;
 265                 if (rx_ring->vmem_size) {
 266                         rx_ring->vmem =
 267                             (void **)((char *)mz->addr + rx_vmem_start);
 268                         rx_ring_info->rx_buf_ring =
 269                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 270                 }
 271
 272                 rx_ring = rx_ring_info->ag_ring_struct;
 273
 274                 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
 275                 rx_ring_info->ag_desc_ring =
 276                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 277                 rx_ring->bd_dma = mz->iova + ag_ring_start;
 278                 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
 279                 rx_ring->mem_zone = (const void *)mz;
 280
 281                 if (!rx_ring->bd)
 282                         return -ENOMEM;
 283                 if (rx_ring->vmem_size) {
 284                         rx_ring->vmem =
 285                             (void **)((char *)mz->addr + ag_vmem_start);
 286                         rx_ring_info->ag_buf_ring =
 287                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 288                 }
 289
 290                 rx_ring_info->ag_bitmap =
 291                     rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
 292                                     AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
 293                                     ag_bitmap_start, ag_bitmap_len);
 294
 295                 /* TPA info */
 296                 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 297                         rx_ring_info->tpa_info =
 298                                 ((struct bnxt_tpa_info *)((char *)mz->addr +
 299                                                           tpa_info_start));
 300         }
 301
 302         cp_ring->bd = ((char *)mz->addr + cp_ring_start);
 303         cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
 304         cp_ring_info->cp_desc_ring = cp_ring->bd;
 305         cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
 306         cp_ring->mem_zone = (const void *)mz;
 307
 308         if (!cp_ring->bd)
 309                 return -ENOMEM;
 310         if (cp_ring->vmem_size)
 311                 *cp_ring->vmem = ((char *)mz->addr + stats_len);
 312         if (stats_len) {
 313                 cp_ring_info->hw_stats = mz->addr;
 314                 cp_ring_info->hw_stats_map = mz_phys_addr;
 315         }
 316         cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 317
 318         if (nq_ring_info) {
 319                 struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
 320
 321                 nq_ring->bd = (char *)mz->addr + nq_ring_start;
 322                 nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
 323                 nq_ring_info->cp_desc_ring = nq_ring->bd;
 324                 nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
 325                 nq_ring->mem_zone = (const void *)mz;
 326
 327                 if (!nq_ring->bd)
 328                         return -ENOMEM;
 329                 if (nq_ring->vmem_size)
 330                         *nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
 331
 332                 nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 333         }
 334
 335         return 0;
 336 }
 337
 338 static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
 339 {
 340         /* Tick values in micro seconds.
 341          * 1 coal_buf x bufs_per_record = 1 completion record.
 342          */
 343         coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
 344         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 345         coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
 346         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 347         coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
 348         coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
 349         /* min timer set to 1/2 of interrupt timer */
 350         coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
 351         /* buf timer set to 1/4 of interrupt timer */
 352         coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
 353         coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
 354 }
 355
 356 static void bnxt_set_db(struct bnxt *bp,
 357                         struct bnxt_db_info *db,
 358                         uint32_t ring_type,
 359                         uint32_t map_idx,
 360                         uint32_t fid)
 361 {
 362         if (BNXT_CHIP_THOR(bp)) {
 363                 if (BNXT_PF(bp))
 364                         db->doorbell = (char *)bp->doorbell_base + 0x10000;
 365                 else
 366                         db->doorbell = (char *)bp->doorbell_base + 0x4000;
 367                 switch (ring_type) {
 368                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 369                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
 370                         break;
 371                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 372                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
 373                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
 374                         break;
 375                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 376                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
 377                         break;
 378                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
 379                         db->db_key64 = DBR_PATH_L2;
 380                         break;
 381                 }
 382                 db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
 383                 db->db_64 = true;
 384         } else {
 385                 db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
 386                 switch (ring_type) {
 387                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 388                         db->db_key32 = DB_KEY_TX;
 389                         break;
 390                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 391                         db->db_key32 = DB_KEY_RX;
 392                         break;
 393                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 394                         db->db_key32 = DB_KEY_CP;
 395                         break;
 396                 }
 397                 db->db_64 = false;
 398         }
 399 }
 400
 401 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
 402                                 struct bnxt_cp_ring_info *cpr,
 403                                 struct bnxt_cp_ring_info *nqr)
 404 {
 405         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 406         uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
 407         int cp_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp);
 408         uint8_t ring_type;
 409         int rc = 0;
 410
 411         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 412
 413         if (BNXT_HAS_NQ(bp)) {
 414                 if (nqr) {
 415                         nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
 416                 } else {
 417                         PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
 418                         return -EINVAL;
 419                 }
 420         }
 421
 422         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
 423                                   HWRM_NA_SIGNATURE, nq_ring_id);
 424         if (rc)
 425                 return rc;
 426
 427         cpr->cp_cons = 0;
 428         bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
 429                     cp_ring->fw_ring_id);
 430         bnxt_db_cq(cpr);
 431
 432         return 0;
 433 }
 434
 435 static int bnxt_alloc_nq_ring(struct bnxt *bp, int queue_index,
 436                               struct bnxt_cp_ring_info *nqr)
 437 {
 438         struct bnxt_ring *nq_ring = nqr->cp_ring_struct;
 439         int nq_ring_index = queue_index + BNXT_NUM_ASYNC_CPR(bp);
 440         uint8_t ring_type;
 441         int rc = 0;
 442
 443         if (!BNXT_HAS_NQ(bp))
 444                 return -EINVAL;
 445
 446         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 447
 448         rc = bnxt_hwrm_ring_alloc(bp, nq_ring, ring_type, nq_ring_index,
 449                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE);
 450         if (rc)
 451                 return rc;
 452
 453         bnxt_set_db(bp, &nqr->cp_db, ring_type, nq_ring_index,
 454                     nq_ring->fw_ring_id);
 455         bnxt_db_nq(nqr);
 456
 457         return 0;
 458 }
 459
 460 static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
 461 {
 462         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 463         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 464         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 465         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 466         struct bnxt_ring *ring = rxr->rx_ring_struct;
 467         uint8_t ring_type;
 468         int rc = 0;
 469
 470         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 471
 472         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
 473                                   queue_index, cpr->hw_stats_ctx_id,
 474                                   cp_ring->fw_ring_id);
 475         if (rc)
 476                 return rc;
 477
 478         rxr->rx_prod = 0;
 479         if (BNXT_HAS_RING_GRPS(bp))
 480                 bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
 481         bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id);
 482         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 483
 484         return 0;
 485 }
 486
 487 static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
 488 {
 489         unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
 490         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 491         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 492         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 493         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 494         struct bnxt_ring *ring = rxr->ag_ring_struct;
 495         uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 496         uint8_t ring_type;
 497         int rc = 0;
 498
 499         ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
 500
 501         if (BNXT_CHIP_THOR(bp)) {
 502                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
 503                 hw_stats_ctx_id = cpr->hw_stats_ctx_id;
 504         } else {
 505                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 506         }
 507
 508         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
 509                                   hw_stats_ctx_id, cp_ring->fw_ring_id);
 510
 511         if (rc)
 512                 return rc;
 513
 514         rxr->ag_prod = 0;
 515         if (BNXT_HAS_RING_GRPS(bp))
 516                 bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
 517         bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id);
 518         bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 519
 520         return 0;
 521 }
 522
 523 int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
 524 {
 525         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 526         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 527         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 528         struct bnxt_cp_ring_info *nqr = rxq->nq_ring;
 529         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 530         int rc;
 531
 532         if (BNXT_HAS_NQ(bp)) {
 533                 rc = bnxt_alloc_nq_ring(bp, queue_index, nqr);
 534                 if (rc)
 535                         goto err_out;
 536         }
 537
 538         rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr, nqr);
 539         if (rc)
 540                 goto err_out;
 541
 542         if (BNXT_HAS_RING_GRPS(bp)) {
 543                 bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
 544                 bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
 545         }
 546
 547         if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
 548                 /*
 549                  * If a dedicated async event completion ring is not enabled,
 550                  * use the first completion ring from PF or VF as the default
 551                  * completion ring for async event handling.
 552                  */
 553                 bp->async_cp_ring = cpr;
 554                 rc = bnxt_hwrm_set_async_event_cr(bp);
 555                 if (rc)
 556                         goto err_out;
 557         }
 558
 559         rc = bnxt_alloc_rx_ring(bp, queue_index);
 560         if (rc)
 561                 goto err_out;
 562
 563         rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
 564         if (rc)
 565                 goto err_out;
 566
 567         if (rxq->rx_started) {
 568                 if (bnxt_init_one_rx_ring(rxq)) {
 569                         RTE_LOG(ERR, PMD,
 570                                 "bnxt_init_one_rx_ring failed!\n");
 571                         bnxt_rx_queue_release_op(rxq);
 572                         rc = -ENOMEM;
 573                         goto err_out;
 574                 }
 575                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 576                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 577         }
 578         rxq->index = queue_index;
 579
 580         return 0;
 581
 582 err_out:
 583         PMD_DRV_LOG(ERR,
 584                     "Failed to allocate receive queue %d, rc %d.\n",
 585                     queue_index, rc);
 586         return rc;
 587 }
 588
 589 /* Initialise all rings to -1, its used to free rings later if allocation
 590  * of few rings fails.
 591  */
 592 static void bnxt_init_all_rings(struct bnxt *bp)
 593 {
 594         unsigned int i = 0;
 595         struct bnxt_rx_queue *rxq;
 596         struct bnxt_ring *cp_ring;
 597         struct bnxt_ring *ring;
 598         struct bnxt_rx_ring_info *rxr;
 599         struct bnxt_tx_queue *txq;
 600
 601         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 602                 rxq = bp->rx_queues[i];
 603                 /* Rx-compl */
 604                 cp_ring = rxq->cp_ring->cp_ring_struct;
 605                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 606                 /* Rx-Reg */
 607                 rxr = rxq->rx_ring;
 608                 ring = rxr->rx_ring_struct;
 609                 ring->fw_ring_id = INVALID_HW_RING_ID;
 610                 /* Rx-AGG */
 611                 ring = rxr->ag_ring_struct;
 612                 ring->fw_ring_id = INVALID_HW_RING_ID;
 613         }
 614         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 615                 txq = bp->tx_queues[i];
 616                 /* Tx cmpl */
 617                 cp_ring = txq->cp_ring->cp_ring_struct;
 618                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 619                 /*Tx Ring */
 620                 ring = txq->tx_ring->tx_ring_struct;
 621                 ring->fw_ring_id = INVALID_HW_RING_ID;
 622         }
 623 }
 624
 625 /* ring_grp usage:
 626  * [0] = default completion ring
 627  * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
 628  * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
 629  */
 630 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 631 {
 632         struct bnxt_coal coal;
 633         unsigned int i;
 634         uint8_t ring_type;
 635         int rc = 0;
 636
 637         bnxt_init_dflt_coal(&coal);
 638         bnxt_init_all_rings(bp);
 639
 640         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 641                 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
 642                 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 643                 struct bnxt_cp_ring_info *nqr = rxq->nq_ring;
 644                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 645                 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 646
 647                 if (BNXT_HAS_NQ(bp)) {
 648                         if (bnxt_alloc_nq_ring(bp, i, nqr))
 649                                 goto err_out;
 650                 }
 651
 652                 if (bnxt_alloc_cmpl_ring(bp, i, cpr, nqr))
 653                         goto err_out;
 654
 655                 if (BNXT_HAS_RING_GRPS(bp)) {
 656                         bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
 657                         bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
 658                 }
 659
 660                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 661                 if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
 662                         /*
 663                          * If a dedicated async event completion ring is not
 664                          * enabled, use the first completion ring as the default
 665                          * completion ring for async event handling.
 666                          */
 667                         bp->async_cp_ring = cpr;
 668                         rc = bnxt_hwrm_set_async_event_cr(bp);
 669                         if (rc)
 670                                 goto err_out;
 671                 }
 672
 673                 if (bnxt_alloc_rx_ring(bp, i))
 674                         goto err_out;
 675
 676                 if (bnxt_alloc_rx_agg_ring(bp, i))
 677                         goto err_out;
 678
 679                 if (bnxt_init_one_rx_ring(rxq)) {
 680                         PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
 681                         bnxt_rx_queue_release_op(rxq);
 682                         return -ENOMEM;
 683                 }
 684                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 685                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 686                 rxq->index = i;
 687 #ifdef RTE_ARCH_X86
 688                 bnxt_rxq_vec_setup(rxq);
 689 #endif
 690         }
 691
 692         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 693                 struct bnxt_tx_queue *txq = bp->tx_queues[i];
 694                 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 695                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 696                 struct bnxt_cp_ring_info *nqr = txq->nq_ring;
 697                 struct bnxt_tx_ring_info *txr = txq->tx_ring;
 698                 struct bnxt_ring *ring = txr->tx_ring_struct;
 699                 unsigned int idx = i + bp->rx_cp_nr_rings;
 700
 701                 if (BNXT_HAS_NQ(bp)) {
 702                         if (bnxt_alloc_nq_ring(bp, idx, nqr))
 703                                 goto err_out;
 704                 }
 705
 706                 if (bnxt_alloc_cmpl_ring(bp, idx, cpr, nqr))
 707                         goto err_out;
 708
 709                 /* Tx ring */
 710                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
 711                 rc = bnxt_hwrm_ring_alloc(bp, ring,
 712                                           ring_type,
 713                                           i, cpr->hw_stats_ctx_id,
 714                                           cp_ring->fw_ring_id);
 715                 if (rc)
 716                         goto err_out;
 717
 718                 bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id);
 719                 txq->index = idx;
 720                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 721         }
 722
 723 err_out:
 724         return rc;
 725 }
 726
 727 /* Allocate dedicated async completion ring. */
 728 int bnxt_alloc_async_cp_ring(struct bnxt *bp)
 729 {
 730         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 731         struct bnxt_ring *cp_ring;
 732         uint8_t ring_type;
 733         int rc;
 734
 735         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 736                 return 0;
 737
 738         cp_ring = cpr->cp_ring_struct;
 739
 740         if (BNXT_HAS_NQ(bp))
 741                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 742         else
 743                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 744
 745         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
 746                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE);
 747
 748         if (rc)
 749                 return rc;
 750
 751         cpr->cp_cons = 0;
 752         cpr->valid = 0;
 753         bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
 754                     cp_ring->fw_ring_id);
 755
 756         if (BNXT_HAS_NQ(bp))
 757                 bnxt_db_nq(cpr);
 758         else
 759                 bnxt_db_cq(cpr);
 760
 761         return bnxt_hwrm_set_async_event_cr(bp);
 762 }
 763
 764 /* Free dedicated async completion ring. */
 765 void bnxt_free_async_cp_ring(struct bnxt *bp)
 766 {
 767         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 768
 769         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 770                 return;
 771
 772         if (BNXT_HAS_NQ(bp))
 773                 bnxt_free_nq_ring(bp, cpr);
 774         else
 775                 bnxt_free_cp_ring(bp, cpr);
 776
 777         bnxt_free_ring(cpr->cp_ring_struct);
 778         rte_free(cpr->cp_ring_struct);
 779         cpr->cp_ring_struct = NULL;
 780         rte_free(cpr);
 781         bp->async_cp_ring = NULL;
 782 }
 783
 784 int bnxt_alloc_async_ring_struct(struct bnxt *bp)
 785 {
 786         struct bnxt_cp_ring_info *cpr = NULL;
 787         struct bnxt_ring *ring = NULL;
 788         unsigned int socket_id;
 789
 790         if (BNXT_NUM_ASYNC_CPR(bp) == 0)
 791                 return 0;
 792
 793         socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
 794
 795         cpr = rte_zmalloc_socket("cpr",
 796                                  sizeof(struct bnxt_cp_ring_info),
 797                                  RTE_CACHE_LINE_SIZE, socket_id);
 798         if (cpr == NULL)
 799                 return -ENOMEM;
 800
 801         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 802                                   sizeof(struct bnxt_ring),
 803                                   RTE_CACHE_LINE_SIZE, socket_id);
 804         if (ring == NULL) {
 805                 rte_free(cpr);
 806                 return -ENOMEM;
 807         }
 808
 809         ring->bd = (void *)cpr->cp_desc_ring;
 810         ring->bd_dma = cpr->cp_desc_mapping;
 811         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 812         ring->ring_mask = ring->ring_size - 1;
 813         ring->vmem_size = 0;
 814         ring->vmem = NULL;
 815
 816         bp->async_cp_ring = cpr;
 817         cpr->cp_ring_struct = ring;
 818
 819         return bnxt_alloc_rings(bp, 0, NULL, NULL,
 820                                 bp->async_cp_ring, NULL,
 821                                 "def_cp");
 822 }