1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
8 #include <rte_malloc.h>
11 #include "bnxt_filter.h"
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
16 #include "bnxt_vnic.h"
17 #include "hsi_struct_def_dpdk.h"
23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
25 if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
26 rxq->cp_ring->hw_stats = NULL;
29 int bnxt_mq_rx_configure(struct bnxt *bp)
31 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
32 const struct rte_eth_vmdq_rx_conf *conf =
33 &dev_conf->rx_adv_conf.vmdq_rx_conf;
34 unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
35 int start_grp_id, end_grp_id = 1, rc = 0;
36 struct bnxt_vnic_info *vnic;
37 struct bnxt_filter_info *filter;
38 enum rte_eth_nb_pools pools = 1, max_pools = 0;
39 struct bnxt_rx_queue *rxq;
43 /* Single queue mode */
44 if (bp->rx_cp_nr_rings < 2) {
45 vnic = &bp->vnic_info[0];
47 PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
51 vnic->flags |= BNXT_VNIC_INFO_BCAST;
54 rxq = bp->eth_dev->data->rx_queues[0];
57 vnic->func_default = true;
58 vnic->start_grp_id = 0;
59 vnic->end_grp_id = vnic->start_grp_id;
60 filter = bnxt_alloc_filter(bp);
62 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
66 filter->mac_index = 0;
67 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
68 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
72 /* Multi-queue mode */
73 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
74 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
76 switch (dev_conf->rxmode.mq_mode) {
77 case ETH_MQ_RX_VMDQ_RSS:
78 case ETH_MQ_RX_VMDQ_ONLY:
79 case ETH_MQ_RX_VMDQ_DCB_RSS:
82 pools = conf->nb_queue_pools;
83 /* For each pool, allocate MACVLAN CFA rule & VNIC */
84 max_pools = RTE_MIN(bp->max_vnics,
85 RTE_MIN(bp->max_l2_ctx,
86 RTE_MIN(bp->max_rsscos_ctx,
89 "pools = %u max_pools = %u\n",
91 if (pools > max_pools)
95 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
98 PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
99 dev_conf->rxmode.mq_mode);
103 } else if (!dev_conf->rxmode.mq_mode) {
104 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
107 pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
108 nb_q_per_grp = bp->rx_cp_nr_rings / pools;
109 bp->rx_num_qs_per_vnic = nb_q_per_grp;
110 PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
111 pools, nb_q_per_grp);
113 end_grp_id = nb_q_per_grp;
115 for (i = 0; i < pools; i++) {
116 vnic = &bp->vnic_info[i];
118 PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
122 vnic->flags |= BNXT_VNIC_INFO_BCAST;
125 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
126 rxq = bp->eth_dev->data->rx_queues[ring_idx];
129 "rxq[%d] = %p vnic[%d] = %p\n",
130 ring_idx, rxq, i, vnic);
133 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
134 bp->eth_dev->data->promiscuous = 1;
135 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
137 vnic->func_default = true;
139 vnic->start_grp_id = start_grp_id;
140 vnic->end_grp_id = end_grp_id;
143 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
144 !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
145 vnic->rss_dflt_cr = true;
146 goto skip_filter_allocation;
148 filter = bnxt_alloc_filter(bp);
150 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
154 filter->mac_index = 0;
155 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
157 * TODO: Configure & associate CFA rule for
158 * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
160 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
162 skip_filter_allocation:
163 start_grp_id = end_grp_id;
164 end_grp_id += nb_q_per_grp;
168 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
169 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
171 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
172 bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
174 for (i = 0; i < bp->nr_vnics; i++) {
175 uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
177 vnic = &bp->vnic_info[i];
179 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
181 bnxt_rte_to_hwrm_hash_level(bp,
186 * Use the supplied key if the key length is
187 * acceptable and the rss_key is not NULL
190 rss->rss_key_len <= HW_HASH_KEY_SIZE)
191 memcpy(vnic->rss_hash_key,
192 rss->rss_key, rss->rss_key_len);
199 /* Free allocated vnic/filters */
204 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
206 struct rte_mbuf **sw_ring;
207 struct bnxt_tpa_info *tpa_info;
213 rte_spinlock_lock(&rxq->lock);
215 sw_ring = rxq->rx_ring->rx_buf_ring;
218 i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
220 if (sw_ring[i] != &rxq->fake_mbuf)
221 rte_pktmbuf_free_seg(sw_ring[i]);
226 /* Free up mbufs in Agg ring */
227 sw_ring = rxq->rx_ring->ag_buf_ring;
230 i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
232 rte_pktmbuf_free_seg(sw_ring[i]);
238 /* Free up mbufs in TPA */
239 tpa_info = rxq->rx_ring->tpa_info;
241 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
243 for (i = 0; i < max_aggs; i++) {
244 if (tpa_info[i].mbuf) {
245 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
246 tpa_info[i].mbuf = NULL;
251 rte_spinlock_unlock(&rxq->lock);
254 void bnxt_free_rx_mbufs(struct bnxt *bp)
256 struct bnxt_rx_queue *rxq;
259 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
260 rxq = bp->rx_queues[i];
261 bnxt_rx_queue_release_mbufs(rxq);
265 void bnxt_rx_queue_release_op(void *rx_queue)
267 struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
270 if (is_bnxt_in_error(rxq->bp))
273 bnxt_rx_queue_release_mbufs(rxq);
275 /* Free RX ring hardware descriptors */
276 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
277 /* Free RX Agg ring hardware descriptors */
278 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
280 /* Free RX completion ring hardware descriptors */
281 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
283 bnxt_free_rxq_stats(rxq);
284 rte_memzone_free(rxq->mz);
291 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
294 unsigned int socket_id,
295 const struct rte_eth_rxconf *rx_conf,
296 struct rte_mempool *mp)
298 struct bnxt *bp = eth_dev->data->dev_private;
299 uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
300 struct bnxt_rx_queue *rxq;
304 rc = is_bnxt_in_error(bp);
308 if (queue_idx >= BNXT_MAX_RINGS(bp)) {
310 "Cannot create Rx ring %d. Only %d rings available\n",
311 queue_idx, bp->max_rx_rings);
315 if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
316 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
321 if (eth_dev->data->rx_queues) {
322 rxq = eth_dev->data->rx_queues[queue_idx];
324 bnxt_rx_queue_release_op(rxq);
326 rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
327 RTE_CACHE_LINE_SIZE, socket_id);
329 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
335 rxq->nb_rx_desc = nb_desc;
336 rxq->rx_free_thresh =
337 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
339 if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
341 "Per-queue config of drop-en is not supported.\n");
342 rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
344 PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
346 rc = bnxt_init_rx_ring_struct(rxq, socket_id);
350 PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
351 rxq->queue_id = queue_idx;
352 rxq->port_id = eth_dev->data->port_id;
353 if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
354 rxq->crc_len = RTE_ETHER_CRC_LEN;
358 eth_dev->data->rx_queues[queue_idx] = rxq;
359 /* Allocate RX ring hardware descriptors */
360 if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
363 "ring_dma_zone_reserve for rx_ring failed!\n");
364 bnxt_rx_queue_release_op(rxq);
368 rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
370 /* rxq 0 must not be stopped when used as async CPR */
371 if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
372 rxq->rx_deferred_start = false;
374 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
376 if (rxq->rx_deferred_start) {
377 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
378 rxq->rx_started = false;
380 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
381 rxq->rx_started = true;
383 eth_dev->data->rx_queue_state[queue_idx] = queue_state;
384 rte_spinlock_init(&rxq->lock);
386 /* Configure mtu if it is different from what was configured before */
388 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
395 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
397 struct bnxt *bp = eth_dev->data->dev_private;
398 struct bnxt_rx_queue *rxq;
399 struct bnxt_cp_ring_info *cpr;
402 rc = is_bnxt_in_error(bp);
406 if (eth_dev->data->rx_queues) {
407 rxq = eth_dev->data->rx_queues[queue_id];
412 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
418 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
420 struct bnxt *bp = eth_dev->data->dev_private;
421 struct bnxt_rx_queue *rxq;
422 struct bnxt_cp_ring_info *cpr;
425 rc = is_bnxt_in_error(bp);
429 if (eth_dev->data->rx_queues) {
430 rxq = eth_dev->data->rx_queues[queue_id];
440 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
442 struct bnxt *bp = dev->data->dev_private;
443 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
444 struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
445 struct bnxt_vnic_info *vnic = NULL;
448 rc = is_bnxt_in_error(bp);
453 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
457 /* Set the queue state to started here.
458 * We check the status of the queue while posting buffer.
459 * If queue is it started, we do not post buffers for Rx.
461 rxq->rx_started = true;
462 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
464 bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
465 rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
469 if (BNXT_CHIP_THOR(bp)) {
470 /* Reconfigure default receive ring and MRU. */
471 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
473 PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
475 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
478 if (BNXT_HAS_RING_GRPS(bp)) {
479 if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
482 vnic->fw_grp_ids[rx_queue_id] =
483 bp->grp_info[rx_queue_id].fw_grp_id;
485 "vnic = %p fw_grp_id = %d\n",
486 vnic, bp->grp_info[rx_queue_id].fw_grp_id);
489 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
490 rc = bnxt_vnic_rss_configure(bp, vnic);
494 dev->data->rx_queue_state[rx_queue_id] =
495 RTE_ETH_QUEUE_STATE_STOPPED;
496 rxq->rx_started = false;
500 "queue %d, rx_deferred_start %d, state %d!\n",
501 rx_queue_id, rxq->rx_deferred_start,
502 bp->eth_dev->data->rx_queue_state[rx_queue_id]);
507 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
509 struct bnxt *bp = dev->data->dev_private;
510 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
511 struct bnxt_vnic_info *vnic = NULL;
512 struct bnxt_rx_queue *rxq = NULL;
513 int active_queue_cnt = 0;
516 rc = is_bnxt_in_error(bp);
520 /* For the stingray platform and other platforms needing tighter
521 * control of resource utilization, Rx CQ 0 also works as
522 * Default CQ for async notifications
524 if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
525 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
529 rxq = bp->rx_queues[rx_queue_id];
531 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
537 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
542 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
543 rxq->rx_started = false;
544 PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
546 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
547 if (BNXT_HAS_RING_GRPS(bp))
548 vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
550 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
551 rc = bnxt_vnic_rss_configure(bp, vnic);
554 if (BNXT_CHIP_THOR(bp)) {
555 /* Compute current number of active receive queues. */
556 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
557 if (bp->rx_queues[i]->rx_started)
561 * For Thor, we need to ensure that the VNIC default receive
562 * ring corresponds to an active receive queue. When no queue
563 * is active, we need to temporarily set the MRU to zero so
564 * that packets are dropped early in the receive pipeline in
565 * order to prevent the VNIC default receive ring from being
568 if (active_queue_cnt == 0) {
569 uint16_t saved_mru = vnic->mru;
572 /* Reconfigure default receive ring and MRU. */
573 bnxt_hwrm_vnic_cfg(bp, vnic);
574 vnic->mru = saved_mru;
576 /* Reconfigure default receive ring. */
577 bnxt_hwrm_vnic_cfg(bp, vnic);
582 bnxt_rx_queue_release_mbufs(rxq);