1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2021 Broadcom
8 #include <rte_malloc.h>
11 #include "bnxt_filter.h"
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
16 #include "bnxt_vnic.h"
17 #include "hsi_struct_def_dpdk.h"
23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
25 if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
26 rxq->cp_ring->hw_stats = NULL;
29 int bnxt_mq_rx_configure(struct bnxt *bp)
31 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
32 const struct rte_eth_vmdq_rx_conf *conf =
33 &dev_conf->rx_adv_conf.vmdq_rx_conf;
34 unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
35 int start_grp_id, end_grp_id = 1, rc = 0;
36 struct bnxt_vnic_info *vnic;
37 struct bnxt_filter_info *filter;
38 enum rte_eth_nb_pools pools = 1, max_pools = 0;
39 struct bnxt_rx_queue *rxq;
43 /* Single queue mode */
44 if (bp->rx_cp_nr_rings < 2) {
45 vnic = &bp->vnic_info[0];
47 PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
51 vnic->flags |= BNXT_VNIC_INFO_BCAST;
54 rxq = bp->eth_dev->data->rx_queues[0];
57 vnic->func_default = true;
58 vnic->start_grp_id = 0;
59 vnic->end_grp_id = vnic->start_grp_id;
60 filter = bnxt_alloc_filter(bp);
62 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
66 filter->mac_index = 0;
67 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
68 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
72 /* Multi-queue mode */
73 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
74 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
76 switch (dev_conf->rxmode.mq_mode) {
77 case ETH_MQ_RX_VMDQ_RSS:
78 case ETH_MQ_RX_VMDQ_ONLY:
79 case ETH_MQ_RX_VMDQ_DCB_RSS:
82 pools = conf->nb_queue_pools;
83 /* For each pool, allocate MACVLAN CFA rule & VNIC */
84 max_pools = RTE_MIN(bp->max_vnics,
85 RTE_MIN(bp->max_l2_ctx,
86 RTE_MIN(bp->max_rsscos_ctx,
89 "pools = %u max_pools = %u\n",
91 if (pools > max_pools)
95 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
98 PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
99 dev_conf->rxmode.mq_mode);
103 } else if (!dev_conf->rxmode.mq_mode) {
104 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
107 pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
108 nb_q_per_grp = bp->rx_cp_nr_rings / pools;
109 PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
110 pools, nb_q_per_grp);
112 end_grp_id = nb_q_per_grp;
114 for (i = 0; i < pools; i++) {
115 vnic = &bp->vnic_info[i];
117 PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
121 vnic->flags |= BNXT_VNIC_INFO_BCAST;
124 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
125 rxq = bp->eth_dev->data->rx_queues[ring_idx];
128 "rxq[%d] = %p vnic[%d] = %p\n",
129 ring_idx, rxq, i, vnic);
132 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
133 bp->eth_dev->data->promiscuous = 1;
134 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
136 vnic->func_default = true;
138 vnic->start_grp_id = start_grp_id;
139 vnic->end_grp_id = end_grp_id;
142 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
143 !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
144 vnic->rss_dflt_cr = true;
145 goto skip_filter_allocation;
147 filter = bnxt_alloc_filter(bp);
149 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
153 filter->mac_index = 0;
154 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
156 * TODO: Configure & associate CFA rule for
157 * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
159 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
161 skip_filter_allocation:
162 start_grp_id = end_grp_id;
163 end_grp_id += nb_q_per_grp;
167 bp->rx_num_qs_per_vnic = nb_q_per_grp;
169 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
170 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
172 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
173 bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
175 for (i = 0; i < bp->nr_vnics; i++) {
176 uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
178 vnic = &bp->vnic_info[i];
180 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
182 bnxt_rte_to_hwrm_hash_level(bp,
187 * Use the supplied key if the key length is
188 * acceptable and the rss_key is not NULL
191 rss->rss_key_len <= HW_HASH_KEY_SIZE)
192 memcpy(vnic->rss_hash_key,
193 rss->rss_key, rss->rss_key_len);
200 /* Free allocated vnic/filters */
205 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
207 struct rte_mbuf **sw_ring;
208 struct bnxt_tpa_info *tpa_info;
211 if (!rxq || !rxq->rx_ring)
214 sw_ring = rxq->rx_ring->rx_buf_ring;
216 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
218 * The vector receive burst function does not set used
219 * mbuf pointers to NULL, do that here to simplify
222 for (i = 0; i < rxq->rxrearm_nb; i++)
223 sw_ring[rxq->rxrearm_start + i] = NULL;
227 i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
229 if (sw_ring[i] != &rxq->fake_mbuf)
230 rte_pktmbuf_free_seg(sw_ring[i]);
235 /* Free up mbufs in Agg ring */
236 sw_ring = rxq->rx_ring->ag_buf_ring;
239 i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
241 rte_pktmbuf_free_seg(sw_ring[i]);
247 /* Free up mbufs in TPA */
248 tpa_info = rxq->rx_ring->tpa_info;
250 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
252 for (i = 0; i < max_aggs; i++) {
253 if (tpa_info[i].mbuf) {
254 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
255 tpa_info[i].mbuf = NULL;
262 void bnxt_free_rx_mbufs(struct bnxt *bp)
264 struct bnxt_rx_queue *rxq;
267 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
268 rxq = bp->rx_queues[i];
269 bnxt_rx_queue_release_mbufs(rxq);
273 void bnxt_rx_queue_release_op(void *rx_queue)
275 struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
278 if (is_bnxt_in_error(rxq->bp))
281 bnxt_rx_queue_release_mbufs(rxq);
283 /* Free RX ring hardware descriptors */
285 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
286 rte_free(rxq->rx_ring->rx_ring_struct);
287 /* Free RX Agg ring hardware descriptors */
288 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
289 rte_free(rxq->rx_ring->ag_ring_struct);
291 rte_free(rxq->rx_ring);
293 /* Free RX completion ring hardware descriptors */
295 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
296 rte_free(rxq->cp_ring->cp_ring_struct);
297 rte_free(rxq->cp_ring);
300 bnxt_free_rxq_stats(rxq);
301 rte_memzone_free(rxq->mz);
308 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
311 unsigned int socket_id,
312 const struct rte_eth_rxconf *rx_conf,
313 struct rte_mempool *mp)
315 struct bnxt *bp = eth_dev->data->dev_private;
316 uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
317 struct bnxt_rx_queue *rxq;
321 rc = is_bnxt_in_error(bp);
325 if (queue_idx >= bnxt_max_rings(bp)) {
327 "Cannot create Rx ring %d. Only %d rings available\n",
328 queue_idx, bp->max_rx_rings);
332 if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
333 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
337 if (eth_dev->data->rx_queues) {
338 rxq = eth_dev->data->rx_queues[queue_idx];
340 bnxt_rx_queue_release_op(rxq);
342 rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
343 RTE_CACHE_LINE_SIZE, socket_id);
345 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
350 rxq->nb_rx_desc = nb_desc;
351 rxq->rx_free_thresh =
352 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
354 if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
356 "Per-queue config of drop-en is not supported.\n");
357 rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
359 PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
361 rc = bnxt_init_rx_ring_struct(rxq, socket_id);
364 "init_rx_ring_struct failed!\n");
368 PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
369 rxq->queue_id = queue_idx;
370 rxq->port_id = eth_dev->data->port_id;
371 if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
372 rxq->crc_len = RTE_ETHER_CRC_LEN;
376 eth_dev->data->rx_queues[queue_idx] = rxq;
377 /* Allocate RX ring hardware descriptors */
378 rc = bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
382 "ring_dma_zone_reserve for rx_ring failed!\n");
385 rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
387 /* rxq 0 must not be stopped when used as async CPR */
388 if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
389 rxq->rx_deferred_start = false;
391 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
393 if (rxq->rx_deferred_start) {
394 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
395 rxq->rx_started = false;
397 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
398 rxq->rx_started = true;
400 eth_dev->data->rx_queue_state[queue_idx] = queue_state;
402 /* Configure mtu if it is different from what was configured before */
404 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
408 bnxt_rx_queue_release_op(rxq);
413 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
415 struct bnxt *bp = eth_dev->data->dev_private;
416 struct bnxt_rx_queue *rxq;
417 struct bnxt_cp_ring_info *cpr;
420 rc = is_bnxt_in_error(bp);
424 if (eth_dev->data->rx_queues) {
425 rxq = eth_dev->data->rx_queues[queue_id];
430 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
436 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
438 struct bnxt *bp = eth_dev->data->dev_private;
439 struct bnxt_rx_queue *rxq;
440 struct bnxt_cp_ring_info *cpr;
443 rc = is_bnxt_in_error(bp);
447 if (eth_dev->data->rx_queues) {
448 rxq = eth_dev->data->rx_queues[queue_id];
458 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
460 struct bnxt *bp = dev->data->dev_private;
461 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
462 struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
463 struct bnxt_vnic_info *vnic = NULL;
466 rc = is_bnxt_in_error(bp);
471 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
475 /* Set the queue state to started here.
476 * We check the status of the queue while posting buffer.
477 * If queue is it started, we do not post buffers for Rx.
479 rxq->rx_started = true;
480 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
482 bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
483 rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
487 if (BNXT_CHIP_P5(bp)) {
488 /* Reconfigure default receive ring and MRU. */
489 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
491 PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
493 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
496 if (BNXT_HAS_RING_GRPS(bp)) {
497 if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
500 vnic->fw_grp_ids[rx_queue_id] =
501 bp->grp_info[rx_queue_id].fw_grp_id;
503 "vnic = %p fw_grp_id = %d\n",
504 vnic, bp->grp_info[rx_queue_id].fw_grp_id);
507 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
508 rc = bnxt_vnic_rss_configure(bp, vnic);
512 dev->data->rx_queue_state[rx_queue_id] =
513 RTE_ETH_QUEUE_STATE_STOPPED;
514 rxq->rx_started = false;
518 "queue %d, rx_deferred_start %d, state %d!\n",
519 rx_queue_id, rxq->rx_deferred_start,
520 bp->eth_dev->data->rx_queue_state[rx_queue_id]);
525 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
527 struct bnxt *bp = dev->data->dev_private;
528 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
529 struct bnxt_vnic_info *vnic = NULL;
530 struct bnxt_rx_queue *rxq = NULL;
531 int active_queue_cnt = 0;
534 rc = is_bnxt_in_error(bp);
538 /* For the stingray platform and other platforms needing tighter
539 * control of resource utilization, Rx CQ 0 also works as
540 * Default CQ for async notifications
542 if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
543 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
547 rxq = bp->rx_queues[rx_queue_id];
549 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
555 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
560 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
561 rxq->rx_started = false;
562 PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
564 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
565 if (BNXT_HAS_RING_GRPS(bp))
566 vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
568 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
569 rc = bnxt_vnic_rss_configure(bp, vnic);
572 /* Compute current number of active receive queues. */
573 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
574 if (bp->rx_queues[i]->rx_started)
577 if (BNXT_CHIP_P5(bp)) {
579 * For Thor, we need to ensure that the VNIC default receive
580 * ring corresponds to an active receive queue. When no queue
581 * is active, we need to temporarily set the MRU to zero so
582 * that packets are dropped early in the receive pipeline in
583 * order to prevent the VNIC default receive ring from being
586 if (active_queue_cnt == 0) {
587 uint16_t saved_mru = vnic->mru;
590 /* Reconfigure default receive ring and MRU. */
591 bnxt_hwrm_vnic_cfg(bp, vnic);
592 vnic->mru = saved_mru;
594 /* Reconfigure default receive ring. */
595 bnxt_hwrm_vnic_cfg(bp, vnic);
597 } else if (active_queue_cnt) {
599 * If the queue being stopped is the current default queue and
600 * there are other active queues, pick one of them as the
601 * default and reconfigure the vnic.
603 if (vnic->dflt_ring_grp == bp->grp_info[rx_queue_id].fw_grp_id) {
604 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++) {
605 if (bp->rx_queues[i]->rx_started) {
606 vnic->dflt_ring_grp =
607 bp->grp_info[i].fw_grp_id;
608 bnxt_hwrm_vnic_cfg(bp, vnic);
616 bnxt_rx_queue_release_mbufs(rxq);