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36 #include <rte_malloc.h>
40 #include "bnxt_filter.h"
41 #include "bnxt_hwrm.h"
42 #include "bnxt_ring.h"
45 #include "bnxt_vnic.h"
46 #include "hsi_struct_def_dpdk.h"
52 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
54 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
60 int bnxt_mq_rx_configure(struct bnxt *bp)
62 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
63 unsigned int i, j, nb_q_per_grp, ring_idx;
64 int start_grp_id, end_grp_id, rc = 0;
65 struct bnxt_vnic_info *vnic;
66 struct bnxt_filter_info *filter;
67 struct bnxt_rx_queue *rxq;
71 /* Single queue mode */
72 if (bp->rx_cp_nr_rings < 2) {
73 vnic = bnxt_alloc_vnic(bp);
75 RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
79 vnic->flags |= BNXT_VNIC_INFO_BCAST;
80 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
83 rxq = bp->eth_dev->data->rx_queues[0];
86 vnic->func_default = true;
87 vnic->ff_pool_idx = 0;
88 vnic->start_grp_id = 0;
89 vnic->end_grp_id = vnic->start_grp_id;
90 filter = bnxt_alloc_filter(bp);
92 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
96 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
100 /* Multi-queue mode */
101 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG) {
102 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
103 enum rte_eth_nb_pools pools;
105 switch (dev_conf->rxmode.mq_mode) {
106 case ETH_MQ_RX_VMDQ_RSS:
107 case ETH_MQ_RX_VMDQ_ONLY:
109 const struct rte_eth_vmdq_rx_conf *conf =
110 &dev_conf->rx_adv_conf.vmdq_rx_conf;
113 pools = conf->nb_queue_pools;
117 RTE_LOG(ERR, PMD, "Unsupported mq_mod %d\n",
118 dev_conf->rxmode.mq_mode);
122 /* For each pool, allocate MACVLAN CFA rule & VNIC */
124 pools = RTE_MIN(bp->max_vnics,
125 RTE_MIN(bp->max_l2_ctx,
126 RTE_MIN(bp->max_rsscos_ctx, ETH_64_POOLS)));
128 "VMDq pool not set, defaulted to %d\n", pools);
130 nb_q_per_grp = bp->rx_cp_nr_rings / pools;
132 end_grp_id = nb_q_per_grp;
135 for (i = 0; i < pools; i++) {
136 vnic = bnxt_alloc_vnic(bp);
139 "VNIC alloc failed\n");
143 vnic->flags |= BNXT_VNIC_INFO_BCAST;
144 STAILQ_INSERT_TAIL(&bp->ff_pool[i], vnic, next);
147 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
148 rxq = bp->eth_dev->data->rx_queues[ring_idx];
152 vnic->func_default = true;
153 vnic->ff_pool_idx = i;
154 vnic->start_grp_id = start_grp_id;
155 vnic->end_grp_id = end_grp_id;
157 filter = bnxt_alloc_filter(bp);
160 "L2 filter alloc failed\n");
165 * TODO: Configure & associate CFA rule for
166 * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
168 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
170 start_grp_id = end_grp_id;
171 end_grp_id += nb_q_per_grp;
176 /* Non-VMDq mode - RSS, DCB, RSS+DCB */
177 /* Init default VNIC for RSS or DCB only */
178 vnic = bnxt_alloc_vnic(bp);
180 RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
184 vnic->flags |= BNXT_VNIC_INFO_BCAST;
185 /* Partition the rx queues for the single pool */
186 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
187 rxq = bp->eth_dev->data->rx_queues[i];
190 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
193 vnic->func_default = true;
194 vnic->ff_pool_idx = 0;
195 vnic->start_grp_id = 0;
196 vnic->end_grp_id = bp->rx_cp_nr_rings;
197 filter = bnxt_alloc_filter(bp);
199 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
203 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
205 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
207 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 |
208 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
214 /* Free allocated vnic/filters */
219 static void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
221 struct bnxt_sw_rx_bd *sw_ring;
222 struct bnxt_tpa_info *tpa_info;
226 sw_ring = rxq->rx_ring->rx_buf_ring;
228 for (i = 0; i < rxq->nb_rx_desc; i++) {
229 if (sw_ring[i].mbuf) {
230 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
231 sw_ring[i].mbuf = NULL;
235 /* Free up mbufs in Agg ring */
236 sw_ring = rxq->rx_ring->ag_buf_ring;
238 for (i = 0; i < rxq->nb_rx_desc; i++) {
239 if (sw_ring[i].mbuf) {
240 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
241 sw_ring[i].mbuf = NULL;
246 /* Free up mbufs in TPA */
247 tpa_info = rxq->rx_ring->tpa_info;
249 for (i = 0; i < BNXT_TPA_MAX; i++) {
250 if (tpa_info[i].mbuf) {
251 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
252 tpa_info[i].mbuf = NULL;
259 void bnxt_free_rx_mbufs(struct bnxt *bp)
261 struct bnxt_rx_queue *rxq;
264 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
265 rxq = bp->rx_queues[i];
266 bnxt_rx_queue_release_mbufs(rxq);
270 void bnxt_rx_queue_release_op(void *rx_queue)
272 struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
275 bnxt_rx_queue_release_mbufs(rxq);
277 /* Free RX ring hardware descriptors */
278 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
279 /* Free RX Agg ring hardware descriptors */
280 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
282 /* Free RX completion ring hardware descriptors */
283 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
285 bnxt_free_rxq_stats(rxq);
291 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
294 unsigned int socket_id,
295 const struct rte_eth_rxconf *rx_conf,
296 struct rte_mempool *mp)
298 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
299 struct bnxt_rx_queue *rxq;
302 if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
303 RTE_LOG(ERR, PMD, "nb_desc %d is invalid\n", nb_desc);
308 if (eth_dev->data->rx_queues) {
309 rxq = eth_dev->data->rx_queues[queue_idx];
311 bnxt_rx_queue_release_op(rxq);
313 rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
314 RTE_CACHE_LINE_SIZE, socket_id);
316 RTE_LOG(ERR, PMD, "bnxt_rx_queue allocation failed!\n");
322 rxq->nb_rx_desc = nb_desc;
323 rxq->rx_free_thresh = rx_conf->rx_free_thresh;
325 RTE_LOG(DEBUG, PMD, "RX Buf size is %d\n", rxq->rx_buf_use_size);
326 RTE_LOG(DEBUG, PMD, "RX Buf MTU %d\n", eth_dev->data->mtu);
328 rc = bnxt_init_rx_ring_struct(rxq, socket_id);
332 rxq->queue_id = queue_idx;
333 rxq->port_id = eth_dev->data->port_id;
334 rxq->crc_len = (uint8_t)((eth_dev->data->dev_conf.rxmode.hw_strip_crc) ?
337 eth_dev->data->rx_queues[queue_idx] = rxq;
338 /* Allocate RX ring hardware descriptors */
339 if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq->rx_ring, rxq->cp_ring,
342 "ring_dma_zone_reserve for rx_ring failed!\n");
343 bnxt_rx_queue_release_op(rxq);