drivers/net/bnxt/bnxt_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2021 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7
   8 #include <rte_malloc.h>
   9
  10 #include "bnxt.h"
  11 #include "bnxt_filter.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_vnic.h"
  17 #include "hsi_struct_def_dpdk.h"
  18
  19 /*
  20  * RX Queues
  21  */
  22
  23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  24 {
  25         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
  26                 rxq->cp_ring->hw_stats = NULL;
  27 }
  28
  29 int bnxt_mq_rx_configure(struct bnxt *bp)
  30 {
  31         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  32         const struct rte_eth_vmdq_rx_conf *conf =
  33                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  34         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  35         int start_grp_id, end_grp_id = 1, rc = 0;
  36         struct bnxt_vnic_info *vnic;
  37         struct bnxt_filter_info *filter;
  38         enum rte_eth_nb_pools pools = 1, max_pools = 0;
  39         struct bnxt_rx_queue *rxq;
  40
  41         bp->nr_vnics = 0;
  42
  43         /* Multi-queue mode */
  44         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
  45                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
  46
  47                 switch (dev_conf->rxmode.mq_mode) {
  48                 case ETH_MQ_RX_VMDQ_RSS:
  49                 case ETH_MQ_RX_VMDQ_ONLY:
  50                 case ETH_MQ_RX_VMDQ_DCB_RSS:
  51                         /* FALLTHROUGH */
  52                         /* ETH_8/64_POOLs */
  53                         pools = conf->nb_queue_pools;
  54                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
  55                         max_pools = RTE_MIN(bp->max_vnics,
  56                                             RTE_MIN(bp->max_l2_ctx,
  57                                             RTE_MIN(bp->max_rsscos_ctx,
  58                                                     ETH_64_POOLS)));
  59                         PMD_DRV_LOG(DEBUG,
  60                                     "pools = %u max_pools = %u\n",
  61                                     pools, max_pools);
  62                         if (pools > max_pools)
  63                                 pools = max_pools;
  64                         break;
  65                 case ETH_MQ_RX_RSS:
  66                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
  67                         break;
  68                 default:
  69                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
  70                                 dev_conf->rxmode.mq_mode);
  71                         rc = -EINVAL;
  72                         goto err_out;
  73                 }
  74         } else if (!dev_conf->rxmode.mq_mode) {
  75                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
  76         }
  77
  78         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
  79         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
  80         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
  81                     pools, nb_q_per_grp);
  82         start_grp_id = 0;
  83         end_grp_id = nb_q_per_grp;
  84
  85         for (i = 0; i < pools; i++) {
  86                 vnic = &bp->vnic_info[i];
  87                 if (!vnic) {
  88                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
  89                         rc = -ENOMEM;
  90                         goto err_out;
  91                 }
  92                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
  93                 bp->nr_vnics++;
  94
  95                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
  96                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
  97                         rxq->vnic = vnic;
  98                         PMD_DRV_LOG(DEBUG,
  99                                     "rxq[%d] = %p vnic[%d] = %p\n",
 100                                     ring_idx, rxq, i, vnic);
 101                 }
 102                 if (i == 0) {
 103                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
 104                                 bp->eth_dev->data->promiscuous = 1;
 105                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 106                         }
 107                         vnic->func_default = true;
 108                 }
 109                 vnic->start_grp_id = start_grp_id;
 110                 vnic->end_grp_id = end_grp_id;
 111
 112                 if (i) {
 113                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
 114                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
 115                                 vnic->rss_dflt_cr = true;
 116                         goto skip_filter_allocation;
 117                 }
 118                 filter = bnxt_alloc_filter(bp);
 119                 if (!filter) {
 120                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 121                         rc = -ENOMEM;
 122                         goto err_out;
 123                 }
 124                 filter->mac_index = 0;
 125                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
 126                 /*
 127                  * TODO: Configure & associate CFA rule for
 128                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 129                  */
 130                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 131
 132 skip_filter_allocation:
 133                 start_grp_id = end_grp_id;
 134                 end_grp_id += nb_q_per_grp;
 135         }
 136
 137         bp->rx_num_qs_per_vnic = nb_q_per_grp;
 138
 139         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 140                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
 141
 142                 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
 143                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 144
 145                 for (i = 0; i < bp->nr_vnics; i++) {
 146                         uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
 147
 148                         vnic = &bp->vnic_info[i];
 149                         vnic->hash_type =
 150                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
 151                         vnic->hash_mode =
 152                                 bnxt_rte_to_hwrm_hash_level(bp,
 153                                                             rss->rss_hf,
 154                                                             lvl);
 155
 156                         /*
 157                          * Use the supplied key if the key length is
 158                          * acceptable and the rss_key is not NULL
 159                          */
 160                         if (rss->rss_key &&
 161                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
 162                                 memcpy(vnic->rss_hash_key,
 163                                        rss->rss_key, rss->rss_key_len);
 164                 }
 165         }
 166
 167         return rc;
 168
 169 err_out:
 170         /* Free allocated vnic/filters */
 171
 172         return rc;
 173 }
 174
 175 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 176 {
 177         struct rte_mbuf **sw_ring;
 178         struct bnxt_tpa_info *tpa_info;
 179         uint16_t i;
 180
 181         if (!rxq || !rxq->rx_ring)
 182                 return;
 183
 184         sw_ring = rxq->rx_ring->rx_buf_ring;
 185         if (sw_ring) {
 186 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 187                 /*
 188                  * The vector receive burst function does not set used
 189                  * mbuf pointers to NULL, do that here to simplify
 190                  * cleanup logic.
 191                  */
 192                 for (i = 0; i < rxq->rxrearm_nb; i++)
 193                         sw_ring[rxq->rxrearm_start + i] = NULL;
 194                 rxq->rxrearm_nb = 0;
 195 #endif
 196                 for (i = 0;
 197                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
 198                         if (sw_ring[i]) {
 199                                 if (sw_ring[i] != &rxq->fake_mbuf)
 200                                         rte_pktmbuf_free_seg(sw_ring[i]);
 201                                 sw_ring[i] = NULL;
 202                         }
 203                 }
 204         }
 205         /* Free up mbufs in Agg ring */
 206         sw_ring = rxq->rx_ring->ag_buf_ring;
 207         if (sw_ring) {
 208                 for (i = 0;
 209                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
 210                         if (sw_ring[i]) {
 211                                 rte_pktmbuf_free_seg(sw_ring[i]);
 212                                 sw_ring[i] = NULL;
 213                         }
 214                 }
 215         }
 216
 217         /* Free up mbufs in TPA */
 218         tpa_info = rxq->rx_ring->tpa_info;
 219         if (tpa_info) {
 220                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 221
 222                 for (i = 0; i < max_aggs; i++) {
 223                         if (tpa_info[i].mbuf) {
 224                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 225                                 tpa_info[i].mbuf = NULL;
 226                         }
 227                 }
 228         }
 229
 230 }
 231
 232 void bnxt_free_rx_mbufs(struct bnxt *bp)
 233 {
 234         struct bnxt_rx_queue *rxq;
 235         int i;
 236
 237         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 238                 rxq = bp->rx_queues[i];
 239                 bnxt_rx_queue_release_mbufs(rxq);
 240         }
 241 }
 242
 243 void bnxt_rx_queue_release_op(void *rx_queue)
 244 {
 245         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
 246
 247         if (rxq) {
 248                 if (is_bnxt_in_error(rxq->bp))
 249                         return;
 250
 251                 bnxt_rx_queue_release_mbufs(rxq);
 252
 253                 /* Free RX ring hardware descriptors */
 254                 if (rxq->rx_ring) {
 255                         bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 256                         rte_free(rxq->rx_ring->rx_ring_struct);
 257                         /* Free RX Agg ring hardware descriptors */
 258                         bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 259                         rte_free(rxq->rx_ring->ag_ring_struct);
 260
 261                         rte_free(rxq->rx_ring);
 262                 }
 263                 /* Free RX completion ring hardware descriptors */
 264                 if (rxq->cp_ring) {
 265                         bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 266                         rte_free(rxq->cp_ring->cp_ring_struct);
 267                         rte_free(rxq->cp_ring);
 268                 }
 269
 270                 bnxt_free_rxq_stats(rxq);
 271                 rte_memzone_free(rxq->mz);
 272                 rxq->mz = NULL;
 273
 274                 rte_free(rxq);
 275         }
 276 }
 277
 278 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 279                                uint16_t queue_idx,
 280                                uint16_t nb_desc,
 281                                unsigned int socket_id,
 282                                const struct rte_eth_rxconf *rx_conf,
 283                                struct rte_mempool *mp)
 284 {
 285         struct bnxt *bp = eth_dev->data->dev_private;
 286         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 287         struct bnxt_rx_queue *rxq;
 288         int rc = 0;
 289         uint8_t queue_state;
 290
 291         rc = is_bnxt_in_error(bp);
 292         if (rc)
 293                 return rc;
 294
 295         if (queue_idx >= bnxt_max_rings(bp)) {
 296                 PMD_DRV_LOG(ERR,
 297                         "Cannot create Rx ring %d. Only %d rings available\n",
 298                         queue_idx, bp->max_rx_rings);
 299                 return -EINVAL;
 300         }
 301
 302         if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
 303                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
 304                 return -EINVAL;
 305         }
 306
 307         if (eth_dev->data->rx_queues) {
 308                 rxq = eth_dev->data->rx_queues[queue_idx];
 309                 if (rxq)
 310                         bnxt_rx_queue_release_op(rxq);
 311         }
 312         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 313                                  RTE_CACHE_LINE_SIZE, socket_id);
 314         if (!rxq) {
 315                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
 316                 return -ENOMEM;
 317         }
 318         rxq->bp = bp;
 319         rxq->mb_pool = mp;
 320         rxq->nb_rx_desc = nb_desc;
 321         rxq->rx_free_thresh =
 322                 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
 323
 324         if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
 325                 PMD_DRV_LOG(NOTICE,
 326                             "Per-queue config of drop-en is not supported.\n");
 327         rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
 328
 329         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
 330
 331         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 332         if (rc) {
 333                 PMD_DRV_LOG(ERR,
 334                             "init_rx_ring_struct failed!\n");
 335                 goto err;
 336         }
 337
 338         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
 339         rxq->queue_id = queue_idx;
 340         rxq->port_id = eth_dev->data->port_id;
 341         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
 342                 rxq->crc_len = RTE_ETHER_CRC_LEN;
 343         else
 344                 rxq->crc_len = 0;
 345
 346         eth_dev->data->rx_queues[queue_idx] = rxq;
 347         /* Allocate RX ring hardware descriptors */
 348         rc = bnxt_alloc_rings(bp, socket_id, queue_idx, NULL, rxq, rxq->cp_ring,
 349                               NULL, "rxr");
 350         if (rc) {
 351                 PMD_DRV_LOG(ERR,
 352                             "ring_dma_zone_reserve for rx_ring failed!\n");
 353                 goto err;
 354         }
 355         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
 356
 357         /* rxq 0 must not be stopped when used as async CPR */
 358         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
 359                 rxq->rx_deferred_start = false;
 360         else
 361                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
 362
 363         if (rxq->rx_deferred_start) {
 364                 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
 365                 rxq->rx_started = false;
 366         } else {
 367                 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
 368                 rxq->rx_started = true;
 369         }
 370         eth_dev->data->rx_queue_state[queue_idx] = queue_state;
 371
 372         /* Configure mtu if it is different from what was configured before */
 373         if (!queue_idx)
 374                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 375
 376         return 0;
 377 err:
 378         bnxt_rx_queue_release_op(rxq);
 379         return rc;
 380 }
 381
 382 int
 383 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 384 {
 385         struct bnxt *bp = eth_dev->data->dev_private;
 386         struct bnxt_rx_queue *rxq;
 387         struct bnxt_cp_ring_info *cpr;
 388         int rc = 0;
 389
 390         rc = is_bnxt_in_error(bp);
 391         if (rc)
 392                 return rc;
 393
 394         if (eth_dev->data->rx_queues) {
 395                 rxq = eth_dev->data->rx_queues[queue_id];
 396                 if (!rxq)
 397                         return -EINVAL;
 398
 399                 cpr = rxq->cp_ring;
 400                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
 401         }
 402         return rc;
 403 }
 404
 405 int
 406 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 407 {
 408         struct bnxt *bp = eth_dev->data->dev_private;
 409         struct bnxt_rx_queue *rxq;
 410         struct bnxt_cp_ring_info *cpr;
 411         int rc = 0;
 412
 413         rc = is_bnxt_in_error(bp);
 414         if (rc)
 415                 return rc;
 416
 417         if (eth_dev->data->rx_queues) {
 418                 rxq = eth_dev->data->rx_queues[queue_id];
 419                 if (!rxq)
 420                         return -EINVAL;
 421
 422                 cpr = rxq->cp_ring;
 423                 B_CP_DB_DISARM(cpr);
 424         }
 425         return rc;
 426 }
 427
 428 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 429 {
 430         struct bnxt *bp = dev->data->dev_private;
 431         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 432         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
 433         struct bnxt_vnic_info *vnic = NULL;
 434         int rc = 0;
 435
 436         rc = is_bnxt_in_error(bp);
 437         if (rc)
 438                 return rc;
 439
 440         if (rxq == NULL) {
 441                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 442                 return -EINVAL;
 443         }
 444
 445         /* Set the queue state to started here.
 446          * We check the status of the queue while posting buffer.
 447          * If queue is it started, we do not post buffers for Rx.
 448          */
 449         rxq->rx_started = true;
 450         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 451
 452         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
 453         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
 454         if (rc)
 455                 return rc;
 456
 457         if (BNXT_CHIP_P5(bp)) {
 458                 /* Reconfigure default receive ring and MRU. */
 459                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
 460         }
 461         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
 462
 463         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 464                 vnic = rxq->vnic;
 465
 466                 if (BNXT_HAS_RING_GRPS(bp)) {
 467                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
 468                                 return 0;
 469
 470                         vnic->fw_grp_ids[rx_queue_id] =
 471                                         bp->grp_info[rx_queue_id].fw_grp_id;
 472                         PMD_DRV_LOG(DEBUG,
 473                                     "vnic = %p fw_grp_id = %d\n",
 474                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
 475                 }
 476
 477                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 478                 rc = bnxt_vnic_rss_configure(bp, vnic);
 479         }
 480
 481         if (rc != 0) {
 482                 dev->data->rx_queue_state[rx_queue_id] =
 483                                 RTE_ETH_QUEUE_STATE_STOPPED;
 484                 rxq->rx_started = false;
 485         }
 486
 487         PMD_DRV_LOG(INFO,
 488                     "queue %d, rx_deferred_start %d, state %d!\n",
 489                     rx_queue_id, rxq->rx_deferred_start,
 490                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
 491
 492         return rc;
 493 }
 494
 495 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 496 {
 497         struct bnxt *bp = dev->data->dev_private;
 498         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 499         struct bnxt_vnic_info *vnic = NULL;
 500         struct bnxt_rx_queue *rxq = NULL;
 501         int active_queue_cnt = 0;
 502         int i, rc = 0;
 503
 504         rc = is_bnxt_in_error(bp);
 505         if (rc)
 506                 return rc;
 507
 508         /* For the stingray platform and other platforms needing tighter
 509          * control of resource utilization, Rx CQ 0 also works as
 510          * Default CQ for async notifications
 511          */
 512         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
 513                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
 514                 return -EINVAL;
 515         }
 516
 517         rxq = bp->rx_queues[rx_queue_id];
 518         if (!rxq) {
 519                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 520                 return -EINVAL;
 521         }
 522
 523         vnic = rxq->vnic;
 524         if (!vnic) {
 525                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
 526                             rx_queue_id);
 527                 return -EINVAL;
 528         }
 529
 530         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 531         rxq->rx_started = false;
 532         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
 533
 534         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 535                 if (BNXT_HAS_RING_GRPS(bp))
 536                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
 537
 538                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 539                 rc = bnxt_vnic_rss_configure(bp, vnic);
 540         }
 541
 542         /* Compute current number of active receive queues. */
 543         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
 544                 if (bp->rx_queues[i]->rx_started)
 545                         active_queue_cnt++;
 546
 547         if (BNXT_CHIP_P5(bp)) {
 548                 /*
 549                  * For Thor, we need to ensure that the VNIC default receive
 550                  * ring corresponds to an active receive queue. When no queue
 551                  * is active, we need to temporarily set the MRU to zero so
 552                  * that packets are dropped early in the receive pipeline in
 553                  * order to prevent the VNIC default receive ring from being
 554                  * accessed.
 555                  */
 556                 if (active_queue_cnt == 0) {
 557                         uint16_t saved_mru = vnic->mru;
 558
 559                         vnic->mru = 0;
 560                         /* Reconfigure default receive ring and MRU. */
 561                         bnxt_hwrm_vnic_cfg(bp, vnic);
 562                         vnic->mru = saved_mru;
 563                 } else {
 564                         /* Reconfigure default receive ring. */
 565                         bnxt_hwrm_vnic_cfg(bp, vnic);
 566                 }
 567         } else if (active_queue_cnt) {
 568                 /*
 569                  * If the queue being stopped is the current default queue and
 570                  * there are other active queues, pick one of them as the
 571                  * default and reconfigure the vnic.
 572                  */
 573                 if (vnic->dflt_ring_grp == bp->grp_info[rx_queue_id].fw_grp_id) {
 574                         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++) {
 575                                 if (bp->rx_queues[i]->rx_started) {
 576                                         vnic->dflt_ring_grp =
 577                                                 bp->grp_info[i].fw_grp_id;
 578                                         bnxt_hwrm_vnic_cfg(bp, vnic);
 579                                         break;
 580                                 }
 581                         }
 582                 }
 583         }
 584
 585         if (rc == 0)
 586                 bnxt_rx_queue_release_mbufs(rxq);
 587
 588         return rc;
 589 }