drivers/net/bnxt/bnxt_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7
   8 #include <rte_malloc.h>
   9
  10 #include "bnxt.h"
  11 #include "bnxt_filter.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_vnic.h"
  17 #include "hsi_struct_def_dpdk.h"
  18
  19 /*
  20  * RX Queues
  21  */
  22
  23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  24 {
  25         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
  26                 rxq->cp_ring->hw_stats = NULL;
  27 }
  28
  29 int bnxt_mq_rx_configure(struct bnxt *bp)
  30 {
  31         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  32         const struct rte_eth_vmdq_rx_conf *conf =
  33                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  34         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  35         int start_grp_id, end_grp_id = 1, rc = 0;
  36         struct bnxt_vnic_info *vnic;
  37         struct bnxt_filter_info *filter;
  38         enum rte_eth_nb_pools pools = 1, max_pools = 0;
  39         struct bnxt_rx_queue *rxq;
  40
  41         bp->nr_vnics = 0;
  42
  43         /* Single queue mode */
  44         if (bp->rx_cp_nr_rings < 2) {
  45                 vnic = &bp->vnic_info[0];
  46                 if (!vnic) {
  47                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
  48                         rc = -ENOMEM;
  49                         goto err_out;
  50                 }
  51                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
  52                 bp->nr_vnics++;
  53
  54                 rxq = bp->eth_dev->data->rx_queues[0];
  55                 rxq->vnic = vnic;
  56
  57                 vnic->func_default = true;
  58                 vnic->start_grp_id = 0;
  59                 vnic->end_grp_id = vnic->start_grp_id;
  60                 filter = bnxt_alloc_filter(bp);
  61                 if (!filter) {
  62                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
  63                         rc = -ENOMEM;
  64                         goto err_out;
  65                 }
  66                 filter->mac_index = 0;
  67                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
  68                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
  69                 goto out;
  70         }
  71
  72         /* Multi-queue mode */
  73         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
  74                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
  75
  76                 switch (dev_conf->rxmode.mq_mode) {
  77                 case ETH_MQ_RX_VMDQ_RSS:
  78                 case ETH_MQ_RX_VMDQ_ONLY:
  79                 case ETH_MQ_RX_VMDQ_DCB_RSS:
  80                         /* FALLTHROUGH */
  81                         /* ETH_8/64_POOLs */
  82                         pools = conf->nb_queue_pools;
  83                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
  84                         max_pools = RTE_MIN(bp->max_vnics,
  85                                             RTE_MIN(bp->max_l2_ctx,
  86                                             RTE_MIN(bp->max_rsscos_ctx,
  87                                                     ETH_64_POOLS)));
  88                         PMD_DRV_LOG(DEBUG,
  89                                     "pools = %u max_pools = %u\n",
  90                                     pools, max_pools);
  91                         if (pools > max_pools)
  92                                 pools = max_pools;
  93                         break;
  94                 case ETH_MQ_RX_RSS:
  95                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
  96                         break;
  97                 default:
  98                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
  99                                 dev_conf->rxmode.mq_mode);
 100                         rc = -EINVAL;
 101                         goto err_out;
 102                 }
 103         } else if (!dev_conf->rxmode.mq_mode) {
 104                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
 105         }
 106
 107         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
 108         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
 109         bp->rx_num_qs_per_vnic = nb_q_per_grp;
 110         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
 111                     pools, nb_q_per_grp);
 112         start_grp_id = 0;
 113         end_grp_id = nb_q_per_grp;
 114
 115         for (i = 0; i < pools; i++) {
 116                 vnic = &bp->vnic_info[i];
 117                 if (!vnic) {
 118                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
 119                         rc = -ENOMEM;
 120                         goto err_out;
 121                 }
 122                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
 123                 bp->nr_vnics++;
 124
 125                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
 126                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
 127                         rxq->vnic = vnic;
 128                         PMD_DRV_LOG(DEBUG,
 129                                     "rxq[%d] = %p vnic[%d] = %p\n",
 130                                     ring_idx, rxq, i, vnic);
 131                 }
 132                 if (i == 0) {
 133                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
 134                                 bp->eth_dev->data->promiscuous = 1;
 135                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 136                         }
 137                         vnic->func_default = true;
 138                 }
 139                 vnic->start_grp_id = start_grp_id;
 140                 vnic->end_grp_id = end_grp_id;
 141
 142                 if (i) {
 143                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
 144                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
 145                                 vnic->rss_dflt_cr = true;
 146                         goto skip_filter_allocation;
 147                 }
 148                 filter = bnxt_alloc_filter(bp);
 149                 if (!filter) {
 150                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 151                         rc = -ENOMEM;
 152                         goto err_out;
 153                 }
 154                 filter->mac_index = 0;
 155                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
 156                 /*
 157                  * TODO: Configure & associate CFA rule for
 158                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 159                  */
 160                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 161
 162 skip_filter_allocation:
 163                 start_grp_id = end_grp_id;
 164                 end_grp_id += nb_q_per_grp;
 165         }
 166
 167 out:
 168         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 169                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
 170
 171                 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
 172                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 173
 174                 for (i = 0; i < bp->nr_vnics; i++) {
 175                         uint32_t lvl = ETH_RSS_LEVEL(rss->rss_hf);
 176
 177                         vnic = &bp->vnic_info[i];
 178                         vnic->hash_type =
 179                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
 180                         vnic->hash_mode =
 181                                 bnxt_rte_to_hwrm_hash_level(bp,
 182                                                             rss->rss_hf,
 183                                                             lvl);
 184
 185                         /*
 186                          * Use the supplied key if the key length is
 187                          * acceptable and the rss_key is not NULL
 188                          */
 189                         if (rss->rss_key &&
 190                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
 191                                 memcpy(vnic->rss_hash_key,
 192                                        rss->rss_key, rss->rss_key_len);
 193                 }
 194         }
 195
 196         return rc;
 197
 198 err_out:
 199         /* Free allocated vnic/filters */
 200
 201         return rc;
 202 }
 203
 204 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 205 {
 206         struct rte_mbuf **sw_ring;
 207         struct bnxt_tpa_info *tpa_info;
 208         uint16_t i;
 209
 210         if (!rxq || !rxq->rx_ring)
 211                 return;
 212
 213         rte_spinlock_lock(&rxq->lock);
 214
 215         sw_ring = rxq->rx_ring->rx_buf_ring;
 216         if (sw_ring) {
 217                 for (i = 0;
 218                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
 219                         if (sw_ring[i]) {
 220                                 if (sw_ring[i] != &rxq->fake_mbuf)
 221                                         rte_pktmbuf_free_seg(sw_ring[i]);
 222                                 sw_ring[i] = NULL;
 223                         }
 224                 }
 225         }
 226         /* Free up mbufs in Agg ring */
 227         sw_ring = rxq->rx_ring->ag_buf_ring;
 228         if (sw_ring) {
 229                 for (i = 0;
 230                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
 231                         if (sw_ring[i]) {
 232                                 rte_pktmbuf_free_seg(sw_ring[i]);
 233                                 sw_ring[i] = NULL;
 234                         }
 235                 }
 236         }
 237
 238         /* Free up mbufs in TPA */
 239         tpa_info = rxq->rx_ring->tpa_info;
 240         if (tpa_info) {
 241                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 242
 243                 for (i = 0; i < max_aggs; i++) {
 244                         if (tpa_info[i].mbuf) {
 245                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 246                                 tpa_info[i].mbuf = NULL;
 247                         }
 248                 }
 249         }
 250
 251         rte_spinlock_unlock(&rxq->lock);
 252 }
 253
 254 void bnxt_free_rx_mbufs(struct bnxt *bp)
 255 {
 256         struct bnxt_rx_queue *rxq;
 257         int i;
 258
 259         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 260                 rxq = bp->rx_queues[i];
 261                 bnxt_rx_queue_release_mbufs(rxq);
 262         }
 263 }
 264
 265 void bnxt_rx_queue_release_op(void *rx_queue)
 266 {
 267         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
 268
 269         if (rxq) {
 270                 if (is_bnxt_in_error(rxq->bp))
 271                         return;
 272
 273                 bnxt_rx_queue_release_mbufs(rxq);
 274
 275                 /* Free RX ring hardware descriptors */
 276                 if (rxq->rx_ring) {
 277                         bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 278                         rte_free(rxq->rx_ring->rx_ring_struct);
 279                         /* Free RX Agg ring hardware descriptors */
 280                         bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 281                         rte_free(rxq->rx_ring->ag_ring_struct);
 282
 283                         rte_free(rxq->rx_ring);
 284                 }
 285                 /* Free RX completion ring hardware descriptors */
 286                 if (rxq->cp_ring) {
 287                         bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 288                         rte_free(rxq->cp_ring->cp_ring_struct);
 289                         rte_free(rxq->cp_ring);
 290                 }
 291
 292                 bnxt_free_rxq_stats(rxq);
 293                 rte_memzone_free(rxq->mz);
 294                 rxq->mz = NULL;
 295
 296                 rte_free(rxq);
 297         }
 298 }
 299
 300 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 301                                uint16_t queue_idx,
 302                                uint16_t nb_desc,
 303                                unsigned int socket_id,
 304                                const struct rte_eth_rxconf *rx_conf,
 305                                struct rte_mempool *mp)
 306 {
 307         struct bnxt *bp = eth_dev->data->dev_private;
 308         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 309         struct bnxt_rx_queue *rxq;
 310         int rc = 0;
 311         uint8_t queue_state;
 312
 313         rc = is_bnxt_in_error(bp);
 314         if (rc)
 315                 return rc;
 316
 317         if (queue_idx >= BNXT_MAX_RINGS(bp)) {
 318                 PMD_DRV_LOG(ERR,
 319                         "Cannot create Rx ring %d. Only %d rings available\n",
 320                         queue_idx, bp->max_rx_rings);
 321                 return -EINVAL;
 322         }
 323
 324         if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
 325                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
 326                 return -EINVAL;
 327         }
 328
 329         if (eth_dev->data->rx_queues) {
 330                 rxq = eth_dev->data->rx_queues[queue_idx];
 331                 if (rxq)
 332                         bnxt_rx_queue_release_op(rxq);
 333         }
 334         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 335                                  RTE_CACHE_LINE_SIZE, socket_id);
 336         if (!rxq) {
 337                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
 338                 return -ENOMEM;
 339         }
 340         rxq->bp = bp;
 341         rxq->mb_pool = mp;
 342         rxq->nb_rx_desc = nb_desc;
 343         rxq->rx_free_thresh =
 344                 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
 345
 346         if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
 347                 PMD_DRV_LOG(NOTICE,
 348                             "Per-queue config of drop-en is not supported.\n");
 349         rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
 350
 351         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
 352
 353         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 354         if (rc) {
 355                 PMD_DRV_LOG(ERR,
 356                             "init_rx_ring_struct failed!\n");
 357                 goto err;
 358         }
 359
 360         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
 361         rxq->queue_id = queue_idx;
 362         rxq->port_id = eth_dev->data->port_id;
 363         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
 364                 rxq->crc_len = RTE_ETHER_CRC_LEN;
 365         else
 366                 rxq->crc_len = 0;
 367
 368         eth_dev->data->rx_queues[queue_idx] = rxq;
 369         /* Allocate RX ring hardware descriptors */
 370         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
 371                              "rxr")) {
 372                 PMD_DRV_LOG(ERR,
 373                             "ring_dma_zone_reserve for rx_ring failed!\n");
 374                 goto err;
 375         }
 376         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
 377
 378         /* rxq 0 must not be stopped when used as async CPR */
 379         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
 380                 rxq->rx_deferred_start = false;
 381         else
 382                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
 383
 384         if (rxq->rx_deferred_start) {
 385                 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
 386                 rxq->rx_started = false;
 387         } else {
 388                 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
 389                 rxq->rx_started = true;
 390         }
 391         eth_dev->data->rx_queue_state[queue_idx] = queue_state;
 392         rte_spinlock_init(&rxq->lock);
 393
 394         /* Configure mtu if it is different from what was configured before */
 395         if (!queue_idx)
 396                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 397
 398         return 0;
 399 err:
 400         bnxt_rx_queue_release_op(rxq);
 401         return rc;
 402 }
 403
 404 int
 405 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 406 {
 407         struct bnxt *bp = eth_dev->data->dev_private;
 408         struct bnxt_rx_queue *rxq;
 409         struct bnxt_cp_ring_info *cpr;
 410         int rc = 0;
 411
 412         rc = is_bnxt_in_error(bp);
 413         if (rc)
 414                 return rc;
 415
 416         if (eth_dev->data->rx_queues) {
 417                 rxq = eth_dev->data->rx_queues[queue_id];
 418                 if (!rxq)
 419                         return -EINVAL;
 420
 421                 cpr = rxq->cp_ring;
 422                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
 423         }
 424         return rc;
 425 }
 426
 427 int
 428 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 429 {
 430         struct bnxt *bp = eth_dev->data->dev_private;
 431         struct bnxt_rx_queue *rxq;
 432         struct bnxt_cp_ring_info *cpr;
 433         int rc = 0;
 434
 435         rc = is_bnxt_in_error(bp);
 436         if (rc)
 437                 return rc;
 438
 439         if (eth_dev->data->rx_queues) {
 440                 rxq = eth_dev->data->rx_queues[queue_id];
 441                 if (!rxq)
 442                         return -EINVAL;
 443
 444                 cpr = rxq->cp_ring;
 445                 B_CP_DB_DISARM(cpr);
 446         }
 447         return rc;
 448 }
 449
 450 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 451 {
 452         struct bnxt *bp = dev->data->dev_private;
 453         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 454         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
 455         struct bnxt_vnic_info *vnic = NULL;
 456         int rc = 0;
 457
 458         rc = is_bnxt_in_error(bp);
 459         if (rc)
 460                 return rc;
 461
 462         if (rxq == NULL) {
 463                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 464                 return -EINVAL;
 465         }
 466
 467         /* Set the queue state to started here.
 468          * We check the status of the queue while posting buffer.
 469          * If queue is it started, we do not post buffers for Rx.
 470          */
 471         rxq->rx_started = true;
 472         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 473
 474         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
 475         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
 476         if (rc)
 477                 return rc;
 478
 479         if (BNXT_CHIP_THOR(bp)) {
 480                 /* Reconfigure default receive ring and MRU. */
 481                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
 482         }
 483         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
 484
 485         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 486                 vnic = rxq->vnic;
 487
 488                 if (BNXT_HAS_RING_GRPS(bp)) {
 489                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
 490                                 return 0;
 491
 492                         vnic->fw_grp_ids[rx_queue_id] =
 493                                         bp->grp_info[rx_queue_id].fw_grp_id;
 494                         PMD_DRV_LOG(DEBUG,
 495                                     "vnic = %p fw_grp_id = %d\n",
 496                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
 497                 }
 498
 499                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 500                 rc = bnxt_vnic_rss_configure(bp, vnic);
 501         }
 502
 503         if (rc != 0) {
 504                 dev->data->rx_queue_state[rx_queue_id] =
 505                                 RTE_ETH_QUEUE_STATE_STOPPED;
 506                 rxq->rx_started = false;
 507         }
 508
 509         PMD_DRV_LOG(INFO,
 510                     "queue %d, rx_deferred_start %d, state %d!\n",
 511                     rx_queue_id, rxq->rx_deferred_start,
 512                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
 513
 514         return rc;
 515 }
 516
 517 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 518 {
 519         struct bnxt *bp = dev->data->dev_private;
 520         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 521         struct bnxt_vnic_info *vnic = NULL;
 522         struct bnxt_rx_queue *rxq = NULL;
 523         int active_queue_cnt = 0;
 524         int i, rc = 0;
 525
 526         rc = is_bnxt_in_error(bp);
 527         if (rc)
 528                 return rc;
 529
 530         /* For the stingray platform and other platforms needing tighter
 531          * control of resource utilization, Rx CQ 0 also works as
 532          * Default CQ for async notifications
 533          */
 534         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
 535                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
 536                 return -EINVAL;
 537         }
 538
 539         rxq = bp->rx_queues[rx_queue_id];
 540         if (!rxq) {
 541                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 542                 return -EINVAL;
 543         }
 544
 545         vnic = rxq->vnic;
 546         if (!vnic) {
 547                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
 548                             rx_queue_id);
 549                 return -EINVAL;
 550         }
 551
 552         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 553         rxq->rx_started = false;
 554         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
 555
 556         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 557                 if (BNXT_HAS_RING_GRPS(bp))
 558                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
 559
 560                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 561                 rc = bnxt_vnic_rss_configure(bp, vnic);
 562         }
 563
 564         if (BNXT_CHIP_THOR(bp)) {
 565                 /* Compute current number of active receive queues. */
 566                 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
 567                         if (bp->rx_queues[i]->rx_started)
 568                                 active_queue_cnt++;
 569
 570                 /*
 571                  * For Thor, we need to ensure that the VNIC default receive
 572                  * ring corresponds to an active receive queue. When no queue
 573                  * is active, we need to temporarily set the MRU to zero so
 574                  * that packets are dropped early in the receive pipeline in
 575                  * order to prevent the VNIC default receive ring from being
 576                  * accessed.
 577                  */
 578                 if (active_queue_cnt == 0) {
 579                         uint16_t saved_mru = vnic->mru;
 580
 581                         vnic->mru = 0;
 582                         /* Reconfigure default receive ring and MRU. */
 583                         bnxt_hwrm_vnic_cfg(bp, vnic);
 584                         vnic->mru = saved_mru;
 585                 } else {
 586                         /* Reconfigure default receive ring. */
 587                         bnxt_hwrm_vnic_cfg(bp, vnic);
 588                 }
 589         }
 590
 591         if (rc == 0)
 592                 bnxt_rx_queue_release_mbufs(rxq);
 593
 594         return rc;
 595 }