drivers/net/bnxt/bnxt_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2021 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7
   8 #include <rte_malloc.h>
   9
  10 #include "bnxt.h"
  11 #include "bnxt_filter.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_vnic.h"
  17 #include "hsi_struct_def_dpdk.h"
  18
  19 /*
  20  * RX Queues
  21  */
  22
  23 uint64_t bnxt_get_rx_port_offloads(struct bnxt *bp)
  24 {
  25         uint64_t rx_offload_capa;
  26
  27         rx_offload_capa = RTE_ETH_RX_OFFLOAD_IPV4_CKSUM  |
  28                           RTE_ETH_RX_OFFLOAD_UDP_CKSUM   |
  29                           RTE_ETH_RX_OFFLOAD_TCP_CKSUM   |
  30                           RTE_ETH_RX_OFFLOAD_KEEP_CRC    |
  31                           RTE_ETH_RX_OFFLOAD_VLAN_FILTER |
  32                           RTE_ETH_RX_OFFLOAD_VLAN_EXTEND |
  33                           RTE_ETH_RX_OFFLOAD_TCP_LRO |
  34                           RTE_ETH_RX_OFFLOAD_SCATTER |
  35                           RTE_ETH_RX_OFFLOAD_RSS_HASH;
  36
  37         rx_offload_capa |= RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  38                            RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM;
  39
  40         if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
  41                 rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TIMESTAMP;
  42         if (bp->vnic_cap_flags & BNXT_VNIC_CAP_VLAN_RX_STRIP)
  43                 rx_offload_capa |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
  44
  45         return rx_offload_capa;
  46 }
  47
  48 /* Determine whether the current configuration needs aggregation ring in HW. */
  49 int bnxt_need_agg_ring(struct rte_eth_dev *eth_dev)
  50 {
  51         /* scattered_rx will be true if OFFLOAD_SCATTER is enabled,
  52          * if LRO is enabled, or if the max packet len is greater than the
  53          * mbuf data size. So AGG ring will be needed whenever scattered_rx
  54          * is set.
  55          */
  56         return eth_dev->data->scattered_rx ? 1 : 0;
  57 }
  58
  59 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  60 {
  61         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
  62                 rxq->cp_ring->hw_stats = NULL;
  63 }
  64
  65 int bnxt_mq_rx_configure(struct bnxt *bp)
  66 {
  67         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  68         struct rte_eth_rss_conf *rss = &bp->rss_conf;
  69         const struct rte_eth_vmdq_rx_conf *conf =
  70                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  71         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  72         int start_grp_id, end_grp_id = 1, rc = 0;
  73         struct bnxt_vnic_info *vnic;
  74         struct bnxt_filter_info *filter;
  75         enum rte_eth_nb_pools pools = 1, max_pools = 0;
  76         struct bnxt_rx_queue *rxq;
  77
  78         bp->nr_vnics = 0;
  79
  80         /* Multi-queue mode */
  81         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB_RSS) {
  82                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
  83
  84                 switch (dev_conf->rxmode.mq_mode) {
  85                 case RTE_ETH_MQ_RX_VMDQ_RSS:
  86                 case RTE_ETH_MQ_RX_VMDQ_ONLY:
  87                 case RTE_ETH_MQ_RX_VMDQ_DCB_RSS:
  88                         /* FALLTHROUGH */
  89                         /* ETH_8/64_POOLs */
  90                         pools = conf->nb_queue_pools;
  91                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
  92                         max_pools = RTE_MIN(bp->max_vnics,
  93                                             RTE_MIN(bp->max_l2_ctx,
  94                                             RTE_MIN(bp->max_rsscos_ctx,
  95                                                     RTE_ETH_64_POOLS)));
  96                         PMD_DRV_LOG(DEBUG,
  97                                     "pools = %u max_pools = %u\n",
  98                                     pools, max_pools);
  99                         if (pools > max_pools)
 100                                 pools = max_pools;
 101                         break;
 102                 case RTE_ETH_MQ_RX_RSS:
 103                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
 104                         break;
 105                 default:
 106                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
 107                                 dev_conf->rxmode.mq_mode);
 108                         rc = -EINVAL;
 109                         goto err_out;
 110                 }
 111         } else if (!dev_conf->rxmode.mq_mode) {
 112                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
 113         }
 114
 115         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
 116         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
 117         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
 118                     pools, nb_q_per_grp);
 119         start_grp_id = 0;
 120         end_grp_id = nb_q_per_grp;
 121
 122         for (i = 0; i < pools; i++) {
 123                 vnic = &bp->vnic_info[i];
 124                 if (!vnic) {
 125                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
 126                         rc = -ENOMEM;
 127                         goto err_out;
 128                 }
 129                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
 130                 bp->nr_vnics++;
 131
 132                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
 133                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
 134                         rxq->vnic = vnic;
 135                         PMD_DRV_LOG(DEBUG,
 136                                     "rxq[%d] = %p vnic[%d] = %p\n",
 137                                     ring_idx, rxq, i, vnic);
 138                 }
 139                 if (i == 0) {
 140                         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB) {
 141                                 bp->eth_dev->data->promiscuous = 1;
 142                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 143                         }
 144                         vnic->func_default = true;
 145                 }
 146                 vnic->start_grp_id = start_grp_id;
 147                 vnic->end_grp_id = end_grp_id;
 148
 149                 if (i) {
 150                         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB ||
 151                             !(dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS))
 152                                 vnic->rss_dflt_cr = true;
 153                         goto skip_filter_allocation;
 154                 }
 155                 filter = bnxt_alloc_filter(bp);
 156                 if (!filter) {
 157                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 158                         rc = -ENOMEM;
 159                         goto err_out;
 160                 }
 161                 filter->mac_index = 0;
 162                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
 163                 /*
 164                  * TODO: Configure & associate CFA rule for
 165                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 166                  */
 167                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 168
 169 skip_filter_allocation:
 170                 start_grp_id = end_grp_id;
 171                 end_grp_id += nb_q_per_grp;
 172         }
 173
 174         bp->rx_num_qs_per_vnic = nb_q_per_grp;
 175
 176         for (i = 0; i < bp->nr_vnics; i++) {
 177                 uint32_t lvl = RTE_ETH_RSS_LEVEL(rss->rss_hf);
 178
 179                 vnic = &bp->vnic_info[i];
 180                 vnic->hash_type = bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
 181                 vnic->hash_mode = bnxt_rte_to_hwrm_hash_level(bp, rss->rss_hf, lvl);
 182
 183                 /*
 184                  * Use the supplied key if the key length is
 185                  * acceptable and the rss_key is not NULL
 186                  */
 187                 if (rss->rss_key && rss->rss_key_len <= HW_HASH_KEY_SIZE)
 188                         memcpy(vnic->rss_hash_key, rss->rss_key, rss->rss_key_len);
 189         }
 190
 191         return rc;
 192
 193 err_out:
 194         /* Free allocated vnic/filters */
 195
 196         return rc;
 197 }
 198
 199 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 200 {
 201         struct rte_mbuf **sw_ring;
 202         struct bnxt_tpa_info *tpa_info;
 203         uint16_t i;
 204
 205         if (!rxq || !rxq->rx_ring)
 206                 return;
 207
 208         sw_ring = rxq->rx_ring->rx_buf_ring;
 209         if (sw_ring) {
 210 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 211                 /*
 212                  * The vector receive burst function does not set used
 213                  * mbuf pointers to NULL, do that here to simplify
 214                  * cleanup logic.
 215                  */
 216                 for (i = 0; i < rxq->rxrearm_nb; i++)
 217                         sw_ring[rxq->rxrearm_start + i] = NULL;
 218                 rxq->rxrearm_nb = 0;
 219 #endif
 220                 for (i = 0;
 221                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
 222                         if (sw_ring[i]) {
 223                                 if (sw_ring[i] != &rxq->fake_mbuf)
 224                                         rte_pktmbuf_free_seg(sw_ring[i]);
 225                                 sw_ring[i] = NULL;
 226                         }
 227                 }
 228         }
 229         /* Free up mbufs in Agg ring */
 230         if (rxq->bp == NULL ||
 231             rxq->bp->eth_dev == NULL ||
 232             !bnxt_need_agg_ring(rxq->bp->eth_dev))
 233                 return;
 234
 235         sw_ring = rxq->rx_ring->ag_buf_ring;
 236         if (sw_ring) {
 237                 for (i = 0;
 238                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
 239                         if (sw_ring[i]) {
 240                                 rte_pktmbuf_free_seg(sw_ring[i]);
 241                                 sw_ring[i] = NULL;
 242                         }
 243                 }
 244         }
 245
 246         /* Free up mbufs in TPA */
 247         tpa_info = rxq->rx_ring->tpa_info;
 248         if (tpa_info) {
 249                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 250
 251                 for (i = 0; i < max_aggs; i++) {
 252                         if (tpa_info[i].mbuf) {
 253                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 254                                 tpa_info[i].mbuf = NULL;
 255                         }
 256                 }
 257         }
 258
 259 }
 260
 261 void bnxt_free_rx_mbufs(struct bnxt *bp)
 262 {
 263         struct bnxt_rx_queue *rxq;
 264         int i;
 265
 266         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 267                 rxq = bp->rx_queues[i];
 268                 bnxt_rx_queue_release_mbufs(rxq);
 269         }
 270 }
 271
 272 void bnxt_free_rxq_mem(struct bnxt_rx_queue *rxq)
 273 {
 274         bnxt_rx_queue_release_mbufs(rxq);
 275
 276         /* Free RX, AGG ring hardware descriptors */
 277         if (rxq->rx_ring) {
 278                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 279                 rte_free(rxq->rx_ring->rx_ring_struct);
 280                 rxq->rx_ring->rx_ring_struct = NULL;
 281                 /* Free RX Agg ring hardware descriptors */
 282                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 283                 rte_free(rxq->rx_ring->ag_ring_struct);
 284                 rxq->rx_ring->ag_ring_struct = NULL;
 285
 286                 rte_free(rxq->rx_ring);
 287                 rxq->rx_ring = NULL;
 288         }
 289         /* Free RX completion ring hardware descriptors */
 290         if (rxq->cp_ring) {
 291                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 292                 rte_free(rxq->cp_ring->cp_ring_struct);
 293                 rxq->cp_ring->cp_ring_struct = NULL;
 294                 rte_free(rxq->cp_ring);
 295                 rxq->cp_ring = NULL;
 296         }
 297
 298         bnxt_free_rxq_stats(rxq);
 299         rte_memzone_free(rxq->mz);
 300         rxq->mz = NULL;
 301 }
 302
 303 void bnxt_rx_queue_release_op(struct rte_eth_dev *dev, uint16_t queue_idx)
 304 {
 305         struct bnxt_rx_queue *rxq = dev->data->rx_queues[queue_idx];
 306
 307         if (rxq != NULL) {
 308                 if (is_bnxt_in_error(rxq->bp))
 309                         return;
 310
 311                 bnxt_free_hwrm_rx_ring(rxq->bp, rxq->queue_id);
 312                 bnxt_free_rxq_mem(rxq);
 313                 rte_free(rxq);
 314         }
 315 }
 316
 317 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 318                                uint16_t queue_idx,
 319                                uint16_t nb_desc,
 320                                unsigned int socket_id,
 321                                const struct rte_eth_rxconf *rx_conf,
 322                                struct rte_mempool *mp)
 323 {
 324         struct bnxt *bp = eth_dev->data->dev_private;
 325         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 326         struct bnxt_rx_queue *rxq;
 327         int rc = 0;
 328
 329         rc = is_bnxt_in_error(bp);
 330         if (rc)
 331                 return rc;
 332
 333         if (queue_idx >= bnxt_max_rings(bp)) {
 334                 PMD_DRV_LOG(ERR,
 335                         "Cannot create Rx ring %d. Only %d rings available\n",
 336                         queue_idx, bp->max_rx_rings);
 337                 return -EINVAL;
 338         }
 339
 340         if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
 341                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
 342                 return -EINVAL;
 343         }
 344
 345         if (eth_dev->data->rx_queues) {
 346                 rxq = eth_dev->data->rx_queues[queue_idx];
 347                 if (rxq)
 348                         bnxt_rx_queue_release_op(eth_dev, queue_idx);
 349         }
 350         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 351                                  RTE_CACHE_LINE_SIZE, socket_id);
 352         if (!rxq) {
 353                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
 354                 return -ENOMEM;
 355         }
 356         rxq->bp = bp;
 357         rxq->mb_pool = mp;
 358         rxq->nb_rx_desc = nb_desc;
 359         rxq->rx_free_thresh =
 360                 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
 361
 362         if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
 363                 PMD_DRV_LOG(NOTICE,
 364                             "Per-queue config of drop-en is not supported.\n");
 365         rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
 366
 367         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
 368
 369         eth_dev->data->rx_queues[queue_idx] = rxq;
 370
 371         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 372         if (rc) {
 373                 PMD_DRV_LOG(ERR,
 374                             "init_rx_ring_struct failed!\n");
 375                 goto err;
 376         }
 377
 378         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
 379         rxq->queue_id = queue_idx;
 380         rxq->port_id = eth_dev->data->port_id;
 381         if (rx_offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC)
 382                 rxq->crc_len = RTE_ETHER_CRC_LEN;
 383         else
 384                 rxq->crc_len = 0;
 385
 386         /* Allocate RX ring hardware descriptors */
 387         rc = bnxt_alloc_rings(bp, socket_id, queue_idx, NULL, rxq, rxq->cp_ring,
 388                               NULL, "rxr");
 389         if (rc) {
 390                 PMD_DRV_LOG(ERR,
 391                             "ring_dma_zone_reserve for rx_ring failed!\n");
 392                 goto err;
 393         }
 394         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
 395
 396         /* rxq 0 must not be stopped when used as async CPR */
 397         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
 398                 rxq->rx_deferred_start = false;
 399         else
 400                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
 401
 402         rxq->rx_started = rxq->rx_deferred_start ? false : true;
 403         rxq->vnic = BNXT_GET_DEFAULT_VNIC(bp);
 404
 405         /* Configure mtu if it is different from what was configured before */
 406         if (!queue_idx)
 407                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 408
 409         return 0;
 410 err:
 411         bnxt_rx_queue_release_op(eth_dev, queue_idx);
 412         return rc;
 413 }
 414
 415 int
 416 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 417 {
 418         struct bnxt *bp = eth_dev->data->dev_private;
 419         struct bnxt_rx_queue *rxq;
 420         struct bnxt_cp_ring_info *cpr;
 421         int rc = 0;
 422
 423         rc = is_bnxt_in_error(bp);
 424         if (rc)
 425                 return rc;
 426
 427         if (eth_dev->data->rx_queues) {
 428                 rxq = eth_dev->data->rx_queues[queue_id];
 429                 if (!rxq)
 430                         return -EINVAL;
 431
 432                 cpr = rxq->cp_ring;
 433                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
 434         }
 435         return rc;
 436 }
 437
 438 int
 439 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 440 {
 441         struct bnxt *bp = eth_dev->data->dev_private;
 442         struct bnxt_rx_queue *rxq;
 443         struct bnxt_cp_ring_info *cpr;
 444         int rc = 0;
 445
 446         rc = is_bnxt_in_error(bp);
 447         if (rc)
 448                 return rc;
 449
 450         if (eth_dev->data->rx_queues) {
 451                 rxq = eth_dev->data->rx_queues[queue_id];
 452                 if (!rxq)
 453                         return -EINVAL;
 454
 455                 cpr = rxq->cp_ring;
 456                 B_CP_DB_DISARM(cpr);
 457         }
 458         return rc;
 459 }
 460
 461 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 462 {
 463         struct bnxt *bp = dev->data->dev_private;
 464         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 465         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
 466         struct bnxt_vnic_info *vnic = NULL;
 467         int rc = 0;
 468
 469         rc = is_bnxt_in_error(bp);
 470         if (rc)
 471                 return rc;
 472
 473         if (rxq == NULL) {
 474                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 475                 return -EINVAL;
 476         }
 477
 478         /* Set the queue state to started here.
 479          * We check the status of the queue while posting buffer.
 480          * If queue is it started, we do not post buffers for Rx.
 481          */
 482         rxq->rx_started = true;
 483         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 484
 485         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
 486         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
 487         if (rc)
 488                 return rc;
 489
 490         if (BNXT_CHIP_P5(bp)) {
 491                 /* Reconfigure default receive ring and MRU. */
 492                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
 493         }
 494         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
 495
 496         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) {
 497                 vnic = rxq->vnic;
 498
 499                 if (BNXT_HAS_RING_GRPS(bp)) {
 500                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
 501                                 return 0;
 502
 503                         vnic->fw_grp_ids[rx_queue_id] =
 504                                         bp->grp_info[rx_queue_id].fw_grp_id;
 505                         PMD_DRV_LOG(DEBUG,
 506                                     "vnic = %p fw_grp_id = %d\n",
 507                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
 508                 }
 509
 510                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 511                 rc = bnxt_vnic_rss_configure(bp, vnic);
 512         }
 513
 514         if (rc != 0) {
 515                 dev->data->rx_queue_state[rx_queue_id] =
 516                                 RTE_ETH_QUEUE_STATE_STOPPED;
 517                 rxq->rx_started = false;
 518         }
 519
 520         PMD_DRV_LOG(INFO,
 521                     "queue %d, rx_deferred_start %d, state %d!\n",
 522                     rx_queue_id, rxq->rx_deferred_start,
 523                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
 524
 525         return rc;
 526 }
 527
 528 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 529 {
 530         struct bnxt *bp = dev->data->dev_private;
 531         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 532         struct bnxt_vnic_info *vnic = NULL;
 533         struct bnxt_rx_queue *rxq = NULL;
 534         int active_queue_cnt = 0;
 535         int i, rc = 0;
 536
 537         rc = is_bnxt_in_error(bp);
 538         if (rc)
 539                 return rc;
 540
 541         /* For the stingray platform and other platforms needing tighter
 542          * control of resource utilization, Rx CQ 0 also works as
 543          * Default CQ for async notifications
 544          */
 545         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
 546                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
 547                 return -EINVAL;
 548         }
 549
 550         rxq = bp->rx_queues[rx_queue_id];
 551         if (!rxq) {
 552                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 553                 return -EINVAL;
 554         }
 555
 556         vnic = rxq->vnic;
 557         if (!vnic) {
 558                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
 559                             rx_queue_id);
 560                 return -EINVAL;
 561         }
 562
 563         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 564         rxq->rx_started = false;
 565         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
 566
 567         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) {
 568                 if (BNXT_HAS_RING_GRPS(bp))
 569                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
 570
 571                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 572                 rc = bnxt_vnic_rss_configure(bp, vnic);
 573         }
 574
 575         /* Compute current number of active receive queues. */
 576         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
 577                 if (bp->rx_queues[i]->rx_started)
 578                         active_queue_cnt++;
 579
 580         if (BNXT_CHIP_P5(bp)) {
 581                 /*
 582                  * For Thor, we need to ensure that the VNIC default receive
 583                  * ring corresponds to an active receive queue. When no queue
 584                  * is active, we need to temporarily set the MRU to zero so
 585                  * that packets are dropped early in the receive pipeline in
 586                  * order to prevent the VNIC default receive ring from being
 587                  * accessed.
 588                  */
 589                 if (active_queue_cnt == 0) {
 590                         uint16_t saved_mru = vnic->mru;
 591
 592                         /* clear RSS setting on vnic. */
 593                         bnxt_vnic_rss_clear_p5(bp, vnic);
 594
 595                         vnic->mru = 0;
 596                         /* Reconfigure default receive ring and MRU. */
 597                         bnxt_hwrm_vnic_cfg(bp, vnic);
 598                         vnic->mru = saved_mru;
 599                 } else {
 600                         /* Reconfigure default receive ring. */
 601                         bnxt_hwrm_vnic_cfg(bp, vnic);
 602                 }
 603         } else if (active_queue_cnt) {
 604                 /*
 605                  * If the queue being stopped is the current default queue and
 606                  * there are other active queues, pick one of them as the
 607                  * default and reconfigure the vnic.
 608                  */
 609                 if (vnic->dflt_ring_grp == bp->grp_info[rx_queue_id].fw_grp_id) {
 610                         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++) {
 611                                 if (bp->rx_queues[i]->rx_started) {
 612                                         vnic->dflt_ring_grp =
 613                                                 bp->grp_info[i].fw_grp_id;
 614                                         bnxt_hwrm_vnic_cfg(bp, vnic);
 615                                         break;
 616                                 }
 617                         }
 618                 }
 619         }
 620
 621         if (rc == 0)
 622                 bnxt_rx_queue_release_mbufs(rxq);
 623
 624         return rc;
 625 }