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36 #include <rte_malloc.h>
40 #include "bnxt_filter.h"
41 #include "bnxt_hwrm.h"
42 #include "bnxt_ring.h"
45 #include "bnxt_vnic.h"
46 #include "hsi_struct_def_dpdk.h"
52 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
54 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
60 int bnxt_mq_rx_configure(struct bnxt *bp)
62 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
63 const struct rte_eth_vmdq_rx_conf *conf =
64 &dev_conf->rx_adv_conf.vmdq_rx_conf;
65 unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
66 int start_grp_id, end_grp_id = 1, rc = 0;
67 struct bnxt_vnic_info *vnic;
68 struct bnxt_filter_info *filter;
69 enum rte_eth_nb_pools pools = bp->rx_cp_nr_rings, max_pools = 0;
70 struct bnxt_rx_queue *rxq;
74 /* Single queue mode */
75 if (bp->rx_cp_nr_rings < 2) {
76 vnic = bnxt_alloc_vnic(bp);
78 RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
82 vnic->flags |= BNXT_VNIC_INFO_BCAST;
83 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
86 rxq = bp->eth_dev->data->rx_queues[0];
89 vnic->func_default = true;
90 vnic->ff_pool_idx = 0;
91 vnic->start_grp_id = 0;
92 vnic->end_grp_id = vnic->start_grp_id;
93 filter = bnxt_alloc_filter(bp);
95 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
99 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
103 /* Multi-queue mode */
104 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
105 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
107 switch (dev_conf->rxmode.mq_mode) {
108 case ETH_MQ_RX_VMDQ_RSS:
109 case ETH_MQ_RX_VMDQ_ONLY:
111 pools = conf->nb_queue_pools;
112 /* For each pool, allocate MACVLAN CFA rule & VNIC */
113 max_pools = RTE_MIN(bp->max_vnics,
114 RTE_MIN(bp->max_l2_ctx,
115 RTE_MIN(bp->max_rsscos_ctx,
117 if (pools > max_pools)
121 pools = bp->rx_cp_nr_rings;
124 RTE_LOG(ERR, PMD, "Unsupported mq_mod %d\n",
125 dev_conf->rxmode.mq_mode);
131 nb_q_per_grp = bp->rx_cp_nr_rings / pools;
133 end_grp_id = nb_q_per_grp;
135 for (i = 0; i < pools; i++) {
136 vnic = bnxt_alloc_vnic(bp);
138 RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
142 vnic->flags |= BNXT_VNIC_INFO_BCAST;
143 STAILQ_INSERT_TAIL(&bp->ff_pool[i], vnic, next);
146 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
147 rxq = bp->eth_dev->data->rx_queues[ring_idx];
151 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
152 bp->eth_dev->data->promiscuous = 1;
153 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
155 vnic->func_default = true;
157 vnic->ff_pool_idx = i;
158 vnic->start_grp_id = start_grp_id;
159 vnic->end_grp_id = end_grp_id;
162 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
163 !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
164 vnic->rss_dflt_cr = true;
165 goto skip_filter_allocation;
167 filter = bnxt_alloc_filter(bp);
169 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
174 * TODO: Configure & associate CFA rule for
175 * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
177 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
179 skip_filter_allocation:
180 start_grp_id = end_grp_id;
181 end_grp_id += nb_q_per_grp;
185 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
186 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
187 uint16_t hash_type = 0;
189 if (bp->flags & BNXT_FLAG_UPDATE_HASH) {
191 bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
194 if (rss->rss_hf & ETH_RSS_IPV4)
195 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
196 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
197 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
198 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
199 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
200 if (rss->rss_hf & ETH_RSS_IPV6)
201 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
202 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
203 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
204 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
205 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
207 for (i = 0; i < bp->nr_vnics; i++) {
208 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
209 vnic->hash_type = hash_type;
212 * Use the supplied key if the key length is
213 * acceptable and the rss_key is not NULL
216 rss->rss_key_len <= HW_HASH_KEY_SIZE)
217 memcpy(vnic->rss_hash_key,
218 rss->rss_key, rss->rss_key_len);
226 /* Free allocated vnic/filters */
231 static void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
233 struct bnxt_sw_rx_bd *sw_ring;
234 struct bnxt_tpa_info *tpa_info;
238 sw_ring = rxq->rx_ring->rx_buf_ring;
240 for (i = 0; i < rxq->nb_rx_desc; i++) {
241 if (sw_ring[i].mbuf) {
242 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
243 sw_ring[i].mbuf = NULL;
247 /* Free up mbufs in Agg ring */
248 sw_ring = rxq->rx_ring->ag_buf_ring;
250 for (i = 0; i < rxq->nb_rx_desc; i++) {
251 if (sw_ring[i].mbuf) {
252 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
253 sw_ring[i].mbuf = NULL;
258 /* Free up mbufs in TPA */
259 tpa_info = rxq->rx_ring->tpa_info;
261 for (i = 0; i < BNXT_TPA_MAX; i++) {
262 if (tpa_info[i].mbuf) {
263 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
264 tpa_info[i].mbuf = NULL;
271 void bnxt_free_rx_mbufs(struct bnxt *bp)
273 struct bnxt_rx_queue *rxq;
276 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
277 rxq = bp->rx_queues[i];
278 bnxt_rx_queue_release_mbufs(rxq);
282 void bnxt_rx_queue_release_op(void *rx_queue)
284 struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
287 bnxt_rx_queue_release_mbufs(rxq);
289 /* Free RX ring hardware descriptors */
290 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
291 /* Free RX Agg ring hardware descriptors */
292 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
294 /* Free RX completion ring hardware descriptors */
295 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
297 bnxt_free_rxq_stats(rxq);
303 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
306 unsigned int socket_id,
307 const struct rte_eth_rxconf *rx_conf,
308 struct rte_mempool *mp)
310 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
311 struct bnxt_rx_queue *rxq;
314 if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
315 RTE_LOG(ERR, PMD, "nb_desc %d is invalid\n", nb_desc);
320 if (eth_dev->data->rx_queues) {
321 rxq = eth_dev->data->rx_queues[queue_idx];
323 bnxt_rx_queue_release_op(rxq);
325 rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
326 RTE_CACHE_LINE_SIZE, socket_id);
328 RTE_LOG(ERR, PMD, "bnxt_rx_queue allocation failed!\n");
334 rxq->nb_rx_desc = nb_desc;
335 rxq->rx_free_thresh = rx_conf->rx_free_thresh;
337 RTE_LOG(DEBUG, PMD, "RX Buf size is %d\n", rxq->rx_buf_use_size);
338 RTE_LOG(DEBUG, PMD, "RX Buf MTU %d\n", eth_dev->data->mtu);
340 rc = bnxt_init_rx_ring_struct(rxq, socket_id);
344 rxq->queue_id = queue_idx;
345 rxq->port_id = eth_dev->data->port_id;
346 rxq->crc_len = (uint8_t)((eth_dev->data->dev_conf.rxmode.hw_strip_crc) ?
349 eth_dev->data->rx_queues[queue_idx] = rxq;
350 /* Allocate RX ring hardware descriptors */
351 if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq->rx_ring, rxq->cp_ring,
354 "ring_dma_zone_reserve for rx_ring failed!\n");
355 bnxt_rx_queue_release_op(rxq);
365 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
367 struct bnxt_rx_queue *rxq;
368 struct bnxt_cp_ring_info *cpr;
371 if (eth_dev->data->rx_queues) {
372 rxq = eth_dev->data->rx_queues[queue_id];
384 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
386 struct bnxt_rx_queue *rxq;
387 struct bnxt_cp_ring_info *cpr;
390 if (eth_dev->data->rx_queues) {
391 rxq = eth_dev->data->rx_queues[queue_id];