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36 #include <rte_malloc.h>
40 #include "bnxt_filter.h"
41 #include "bnxt_hwrm.h"
42 #include "bnxt_ring.h"
45 #include "bnxt_vnic.h"
46 #include "hsi_struct_def_dpdk.h"
52 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
54 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
60 int bnxt_mq_rx_configure(struct bnxt *bp)
62 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
63 unsigned int i, j, nb_q_per_grp, ring_idx;
64 int start_grp_id, end_grp_id, rc = 0;
65 struct bnxt_vnic_info *vnic;
66 struct bnxt_filter_info *filter;
67 struct bnxt_rx_queue *rxq;
71 /* Single queue mode */
72 if (bp->rx_cp_nr_rings < 2) {
73 vnic = bnxt_alloc_vnic(bp);
75 RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
79 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
82 rxq = bp->eth_dev->data->rx_queues[0];
85 vnic->func_default = true;
86 vnic->ff_pool_idx = 0;
87 vnic->start_grp_id = 0;
88 vnic->end_grp_id = vnic->start_grp_id;
89 filter = bnxt_alloc_filter(bp);
91 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
95 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
99 /* Multi-queue mode */
100 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG) {
101 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
102 enum rte_eth_nb_pools pools;
104 switch (dev_conf->rxmode.mq_mode) {
105 case ETH_MQ_RX_VMDQ_RSS:
106 case ETH_MQ_RX_VMDQ_ONLY:
108 const struct rte_eth_vmdq_rx_conf *conf =
109 &dev_conf->rx_adv_conf.vmdq_rx_conf;
112 pools = conf->nb_queue_pools;
116 RTE_LOG(ERR, PMD, "Unsupported mq_mod %d\n",
117 dev_conf->rxmode.mq_mode);
121 /* For each pool, allocate MACVLAN CFA rule & VNIC */
124 "VMDq pool not set, defaulted to 64\n");
125 pools = ETH_64_POOLS;
127 nb_q_per_grp = bp->rx_cp_nr_rings / pools;
129 end_grp_id = nb_q_per_grp;
132 for (i = 0; i < pools; i++) {
133 vnic = bnxt_alloc_vnic(bp);
136 "VNIC alloc failed\n");
140 STAILQ_INSERT_TAIL(&bp->ff_pool[i], vnic, next);
143 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
144 rxq = bp->eth_dev->data->rx_queues[ring_idx];
148 vnic->func_default = true;
149 vnic->ff_pool_idx = i;
150 vnic->start_grp_id = start_grp_id;
151 vnic->end_grp_id = end_grp_id;
153 filter = bnxt_alloc_filter(bp);
156 "L2 filter alloc failed\n");
161 * TODO: Configure & associate CFA rule for
162 * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
164 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
166 start_grp_id = end_grp_id + 1;
167 end_grp_id += nb_q_per_grp;
172 /* Non-VMDq mode - RSS, DCB, RSS+DCB */
173 /* Init default VNIC for RSS or DCB only */
174 vnic = bnxt_alloc_vnic(bp);
176 RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
180 /* Partition the rx queues for the single pool */
181 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
182 rxq = bp->eth_dev->data->rx_queues[i];
185 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
188 vnic->func_default = true;
189 vnic->ff_pool_idx = 0;
190 vnic->start_grp_id = 0;
191 vnic->end_grp_id = bp->rx_cp_nr_rings;
192 filter = bnxt_alloc_filter(bp);
194 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
198 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
200 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
202 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 |
203 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
209 /* Free allocated vnic/filters */
214 static void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
216 struct bnxt_sw_rx_bd *sw_ring;
217 struct bnxt_tpa_info *tpa_info;
221 sw_ring = rxq->rx_ring->rx_buf_ring;
223 for (i = 0; i < rxq->nb_rx_desc; i++) {
224 if (sw_ring[i].mbuf) {
225 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
226 sw_ring[i].mbuf = NULL;
230 /* Free up mbufs in Agg ring */
231 sw_ring = rxq->rx_ring->ag_buf_ring;
233 for (i = 0; i < rxq->nb_rx_desc; i++) {
234 if (sw_ring[i].mbuf) {
235 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
236 sw_ring[i].mbuf = NULL;
241 /* Free up mbufs in TPA */
242 tpa_info = rxq->rx_ring->tpa_info;
244 for (i = 0; i < BNXT_TPA_MAX; i++) {
245 if (tpa_info[i].mbuf) {
246 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
247 tpa_info[i].mbuf = NULL;
254 void bnxt_free_rx_mbufs(struct bnxt *bp)
256 struct bnxt_rx_queue *rxq;
259 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
260 rxq = bp->rx_queues[i];
261 bnxt_rx_queue_release_mbufs(rxq);
265 void bnxt_rx_queue_release_op(void *rx_queue)
267 struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
270 bnxt_rx_queue_release_mbufs(rxq);
272 /* Free RX ring hardware descriptors */
273 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
274 /* Free RX Agg ring hardware descriptors */
275 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
277 /* Free RX completion ring hardware descriptors */
278 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
280 bnxt_free_rxq_stats(rxq);
286 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
289 unsigned int socket_id,
290 const struct rte_eth_rxconf *rx_conf,
291 struct rte_mempool *mp)
293 struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
294 struct bnxt_rx_queue *rxq;
297 if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
298 RTE_LOG(ERR, PMD, "nb_desc %d is invalid", nb_desc);
303 if (eth_dev->data->rx_queues) {
304 rxq = eth_dev->data->rx_queues[queue_idx];
306 bnxt_rx_queue_release_op(rxq);
308 rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
309 RTE_CACHE_LINE_SIZE, socket_id);
311 RTE_LOG(ERR, PMD, "bnxt_rx_queue allocation failed!");
317 rxq->nb_rx_desc = nb_desc;
318 rxq->rx_free_thresh = rx_conf->rx_free_thresh;
320 RTE_LOG(DEBUG, PMD, "RX Buf size is %d\n", rxq->rx_buf_use_size);
321 RTE_LOG(DEBUG, PMD, "RX Buf MTU %d\n", eth_dev->data->mtu);
323 rc = bnxt_init_rx_ring_struct(rxq, socket_id);
327 rxq->queue_id = queue_idx;
328 rxq->port_id = eth_dev->data->port_id;
329 rxq->crc_len = (uint8_t)((eth_dev->data->dev_conf.rxmode.hw_strip_crc) ?
332 eth_dev->data->rx_queues[queue_idx] = rxq;
333 /* Allocate RX ring hardware descriptors */
334 if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq->rx_ring, rxq->cp_ring,
336 RTE_LOG(ERR, PMD, "ring_dma_zone_reserve for rx_ring failed!");
337 bnxt_rx_queue_release_op(rxq);