drivers/net/bnxt/bnxt_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2021 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7
   8 #include <rte_malloc.h>
   9
  10 #include "bnxt.h"
  11 #include "bnxt_filter.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_vnic.h"
  17 #include "hsi_struct_def_dpdk.h"
  18
  19 /*
  20  * RX Queues
  21  */
  22
  23 /* Determine whether the current configuration needs aggregation ring in HW. */
  24 int bnxt_need_agg_ring(struct rte_eth_dev *eth_dev)
  25 {
  26         /* scattered_rx will be true if OFFLOAD_SCATTER is enabled,
  27          * if LRO is enabled, or if the max packet len is greater than the
  28          * mbuf data size. So AGG ring will be needed whenever scattered_rx
  29          * is set.
  30          */
  31         return eth_dev->data->scattered_rx ? 1 : 0;
  32 }
  33
  34 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  35 {
  36         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
  37                 rxq->cp_ring->hw_stats = NULL;
  38 }
  39
  40 int bnxt_mq_rx_configure(struct bnxt *bp)
  41 {
  42         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  43         const struct rte_eth_vmdq_rx_conf *conf =
  44                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  45         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  46         int start_grp_id, end_grp_id = 1, rc = 0;
  47         struct bnxt_vnic_info *vnic;
  48         struct bnxt_filter_info *filter;
  49         enum rte_eth_nb_pools pools = 1, max_pools = 0;
  50         struct bnxt_rx_queue *rxq;
  51
  52         bp->nr_vnics = 0;
  53
  54         /* Multi-queue mode */
  55         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB_RSS) {
  56                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
  57
  58                 switch (dev_conf->rxmode.mq_mode) {
  59                 case RTE_ETH_MQ_RX_VMDQ_RSS:
  60                 case RTE_ETH_MQ_RX_VMDQ_ONLY:
  61                 case RTE_ETH_MQ_RX_VMDQ_DCB_RSS:
  62                         /* FALLTHROUGH */
  63                         /* ETH_8/64_POOLs */
  64                         pools = conf->nb_queue_pools;
  65                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
  66                         max_pools = RTE_MIN(bp->max_vnics,
  67                                             RTE_MIN(bp->max_l2_ctx,
  68                                             RTE_MIN(bp->max_rsscos_ctx,
  69                                                     RTE_ETH_64_POOLS)));
  70                         PMD_DRV_LOG(DEBUG,
  71                                     "pools = %u max_pools = %u\n",
  72                                     pools, max_pools);
  73                         if (pools > max_pools)
  74                                 pools = max_pools;
  75                         break;
  76                 case RTE_ETH_MQ_RX_RSS:
  77                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
  78                         break;
  79                 default:
  80                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
  81                                 dev_conf->rxmode.mq_mode);
  82                         rc = -EINVAL;
  83                         goto err_out;
  84                 }
  85         } else if (!dev_conf->rxmode.mq_mode) {
  86                 pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : pools;
  87         }
  88
  89         pools = RTE_MIN(pools, bp->rx_cp_nr_rings);
  90         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
  91         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
  92                     pools, nb_q_per_grp);
  93         start_grp_id = 0;
  94         end_grp_id = nb_q_per_grp;
  95
  96         for (i = 0; i < pools; i++) {
  97                 vnic = &bp->vnic_info[i];
  98                 if (!vnic) {
  99                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
 100                         rc = -ENOMEM;
 101                         goto err_out;
 102                 }
 103                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
 104                 bp->nr_vnics++;
 105
 106                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
 107                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
 108                         rxq->vnic = vnic;
 109                         PMD_DRV_LOG(DEBUG,
 110                                     "rxq[%d] = %p vnic[%d] = %p\n",
 111                                     ring_idx, rxq, i, vnic);
 112                 }
 113                 if (i == 0) {
 114                         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB) {
 115                                 bp->eth_dev->data->promiscuous = 1;
 116                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 117                         }
 118                         vnic->func_default = true;
 119                 }
 120                 vnic->start_grp_id = start_grp_id;
 121                 vnic->end_grp_id = end_grp_id;
 122
 123                 if (i) {
 124                         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB ||
 125                             !(dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS))
 126                                 vnic->rss_dflt_cr = true;
 127                         goto skip_filter_allocation;
 128                 }
 129                 filter = bnxt_alloc_filter(bp);
 130                 if (!filter) {
 131                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 132                         rc = -ENOMEM;
 133                         goto err_out;
 134                 }
 135                 filter->mac_index = 0;
 136                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
 137                 /*
 138                  * TODO: Configure & associate CFA rule for
 139                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 140                  */
 141                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 142
 143 skip_filter_allocation:
 144                 start_grp_id = end_grp_id;
 145                 end_grp_id += nb_q_per_grp;
 146         }
 147
 148         bp->rx_num_qs_per_vnic = nb_q_per_grp;
 149
 150         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) {
 151                 struct rte_eth_rss_conf *rss = &bp->rss_conf;
 152
 153                 if (bp->flags & BNXT_FLAG_UPDATE_HASH)
 154                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 155
 156                 for (i = 0; i < bp->nr_vnics; i++) {
 157                         uint32_t lvl = RTE_ETH_RSS_LEVEL(rss->rss_hf);
 158
 159                         vnic = &bp->vnic_info[i];
 160                         vnic->hash_type =
 161                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
 162                         vnic->hash_mode =
 163                                 bnxt_rte_to_hwrm_hash_level(bp,
 164                                                             rss->rss_hf,
 165                                                             lvl);
 166
 167                         /*
 168                          * Use the supplied key if the key length is
 169                          * acceptable and the rss_key is not NULL
 170                          */
 171                         if (rss->rss_key &&
 172                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
 173                                 memcpy(vnic->rss_hash_key,
 174                                        rss->rss_key, rss->rss_key_len);
 175                 }
 176         }
 177
 178         return rc;
 179
 180 err_out:
 181         /* Free allocated vnic/filters */
 182
 183         return rc;
 184 }
 185
 186 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 187 {
 188         struct rte_mbuf **sw_ring;
 189         struct bnxt_tpa_info *tpa_info;
 190         uint16_t i;
 191
 192         if (!rxq || !rxq->rx_ring)
 193                 return;
 194
 195         sw_ring = rxq->rx_ring->rx_buf_ring;
 196         if (sw_ring) {
 197 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 198                 /*
 199                  * The vector receive burst function does not set used
 200                  * mbuf pointers to NULL, do that here to simplify
 201                  * cleanup logic.
 202                  */
 203                 for (i = 0; i < rxq->rxrearm_nb; i++)
 204                         sw_ring[rxq->rxrearm_start + i] = NULL;
 205                 rxq->rxrearm_nb = 0;
 206 #endif
 207                 for (i = 0;
 208                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
 209                         if (sw_ring[i]) {
 210                                 if (sw_ring[i] != &rxq->fake_mbuf)
 211                                         rte_pktmbuf_free_seg(sw_ring[i]);
 212                                 sw_ring[i] = NULL;
 213                         }
 214                 }
 215         }
 216         /* Free up mbufs in Agg ring */
 217         if (rxq->bp == NULL ||
 218             rxq->bp->eth_dev == NULL ||
 219             !bnxt_need_agg_ring(rxq->bp->eth_dev))
 220                 return;
 221
 222         sw_ring = rxq->rx_ring->ag_buf_ring;
 223         if (sw_ring) {
 224                 for (i = 0;
 225                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
 226                         if (sw_ring[i]) {
 227                                 rte_pktmbuf_free_seg(sw_ring[i]);
 228                                 sw_ring[i] = NULL;
 229                         }
 230                 }
 231         }
 232
 233         /* Free up mbufs in TPA */
 234         tpa_info = rxq->rx_ring->tpa_info;
 235         if (tpa_info) {
 236                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 237
 238                 for (i = 0; i < max_aggs; i++) {
 239                         if (tpa_info[i].mbuf) {
 240                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 241                                 tpa_info[i].mbuf = NULL;
 242                         }
 243                 }
 244         }
 245
 246 }
 247
 248 void bnxt_free_rx_mbufs(struct bnxt *bp)
 249 {
 250         struct bnxt_rx_queue *rxq;
 251         int i;
 252
 253         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 254                 rxq = bp->rx_queues[i];
 255                 bnxt_rx_queue_release_mbufs(rxq);
 256         }
 257 }
 258
 259 void bnxt_free_rxq_mem(struct bnxt_rx_queue *rxq)
 260 {
 261         bnxt_rx_queue_release_mbufs(rxq);
 262
 263         /* Free RX, AGG ring hardware descriptors */
 264         if (rxq->rx_ring) {
 265                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 266                 rte_free(rxq->rx_ring->rx_ring_struct);
 267                 rxq->rx_ring->rx_ring_struct = NULL;
 268                 /* Free RX Agg ring hardware descriptors */
 269                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 270                 rte_free(rxq->rx_ring->ag_ring_struct);
 271                 rxq->rx_ring->ag_ring_struct = NULL;
 272
 273                 rte_free(rxq->rx_ring);
 274                 rxq->rx_ring = NULL;
 275         }
 276         /* Free RX completion ring hardware descriptors */
 277         if (rxq->cp_ring) {
 278                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 279                 rte_free(rxq->cp_ring->cp_ring_struct);
 280                 rxq->cp_ring->cp_ring_struct = NULL;
 281                 rte_free(rxq->cp_ring);
 282                 rxq->cp_ring = NULL;
 283         }
 284
 285         bnxt_free_rxq_stats(rxq);
 286         rte_memzone_free(rxq->mz);
 287         rxq->mz = NULL;
 288 }
 289
 290 void bnxt_rx_queue_release_op(struct rte_eth_dev *dev, uint16_t queue_idx)
 291 {
 292         struct bnxt_rx_queue *rxq = dev->data->rx_queues[queue_idx];
 293
 294         if (rxq != NULL) {
 295                 if (is_bnxt_in_error(rxq->bp))
 296                         return;
 297
 298                 bnxt_free_hwrm_rx_ring(rxq->bp, rxq->queue_id);
 299                 bnxt_free_rxq_mem(rxq);
 300                 rte_free(rxq);
 301         }
 302 }
 303
 304 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 305                                uint16_t queue_idx,
 306                                uint16_t nb_desc,
 307                                unsigned int socket_id,
 308                                const struct rte_eth_rxconf *rx_conf,
 309                                struct rte_mempool *mp)
 310 {
 311         struct bnxt *bp = eth_dev->data->dev_private;
 312         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 313         struct bnxt_rx_queue *rxq;
 314         int rc = 0;
 315
 316         rc = is_bnxt_in_error(bp);
 317         if (rc)
 318                 return rc;
 319
 320         if (queue_idx >= bnxt_max_rings(bp)) {
 321                 PMD_DRV_LOG(ERR,
 322                         "Cannot create Rx ring %d. Only %d rings available\n",
 323                         queue_idx, bp->max_rx_rings);
 324                 return -EINVAL;
 325         }
 326
 327         if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_RX_DESC_CNT) {
 328                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
 329                 return -EINVAL;
 330         }
 331
 332         if (eth_dev->data->rx_queues) {
 333                 rxq = eth_dev->data->rx_queues[queue_idx];
 334                 if (rxq)
 335                         bnxt_rx_queue_release_op(eth_dev, queue_idx);
 336         }
 337         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 338                                  RTE_CACHE_LINE_SIZE, socket_id);
 339         if (!rxq) {
 340                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
 341                 return -ENOMEM;
 342         }
 343         rxq->bp = bp;
 344         rxq->mb_pool = mp;
 345         rxq->nb_rx_desc = nb_desc;
 346         rxq->rx_free_thresh =
 347                 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_RX_BURST);
 348
 349         if (rx_conf->rx_drop_en != BNXT_DEFAULT_RX_DROP_EN)
 350                 PMD_DRV_LOG(NOTICE,
 351                             "Per-queue config of drop-en is not supported.\n");
 352         rxq->drop_en = BNXT_DEFAULT_RX_DROP_EN;
 353
 354         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
 355
 356         eth_dev->data->rx_queues[queue_idx] = rxq;
 357
 358         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 359         if (rc) {
 360                 PMD_DRV_LOG(ERR,
 361                             "init_rx_ring_struct failed!\n");
 362                 goto err;
 363         }
 364
 365         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
 366         rxq->queue_id = queue_idx;
 367         rxq->port_id = eth_dev->data->port_id;
 368         if (rx_offloads & RTE_ETH_RX_OFFLOAD_KEEP_CRC)
 369                 rxq->crc_len = RTE_ETHER_CRC_LEN;
 370         else
 371                 rxq->crc_len = 0;
 372
 373         /* Allocate RX ring hardware descriptors */
 374         rc = bnxt_alloc_rings(bp, socket_id, queue_idx, NULL, rxq, rxq->cp_ring,
 375                               NULL, "rxr");
 376         if (rc) {
 377                 PMD_DRV_LOG(ERR,
 378                             "ring_dma_zone_reserve for rx_ring failed!\n");
 379                 goto err;
 380         }
 381         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
 382
 383         /* rxq 0 must not be stopped when used as async CPR */
 384         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
 385                 rxq->rx_deferred_start = false;
 386         else
 387                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
 388
 389         rxq->rx_started = rxq->rx_deferred_start ? false : true;
 390         rxq->vnic = BNXT_GET_DEFAULT_VNIC(bp);
 391
 392         /* Configure mtu if it is different from what was configured before */
 393         if (!queue_idx)
 394                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 395
 396         return 0;
 397 err:
 398         bnxt_rx_queue_release_op(eth_dev, queue_idx);
 399         return rc;
 400 }
 401
 402 int
 403 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 404 {
 405         struct bnxt *bp = eth_dev->data->dev_private;
 406         struct bnxt_rx_queue *rxq;
 407         struct bnxt_cp_ring_info *cpr;
 408         int rc = 0;
 409
 410         rc = is_bnxt_in_error(bp);
 411         if (rc)
 412                 return rc;
 413
 414         if (eth_dev->data->rx_queues) {
 415                 rxq = eth_dev->data->rx_queues[queue_id];
 416                 if (!rxq)
 417                         return -EINVAL;
 418
 419                 cpr = rxq->cp_ring;
 420                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
 421         }
 422         return rc;
 423 }
 424
 425 int
 426 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 427 {
 428         struct bnxt *bp = eth_dev->data->dev_private;
 429         struct bnxt_rx_queue *rxq;
 430         struct bnxt_cp_ring_info *cpr;
 431         int rc = 0;
 432
 433         rc = is_bnxt_in_error(bp);
 434         if (rc)
 435                 return rc;
 436
 437         if (eth_dev->data->rx_queues) {
 438                 rxq = eth_dev->data->rx_queues[queue_id];
 439                 if (!rxq)
 440                         return -EINVAL;
 441
 442                 cpr = rxq->cp_ring;
 443                 B_CP_DB_DISARM(cpr);
 444         }
 445         return rc;
 446 }
 447
 448 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 449 {
 450         struct bnxt *bp = dev->data->dev_private;
 451         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 452         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
 453         struct bnxt_vnic_info *vnic = NULL;
 454         int rc = 0;
 455
 456         rc = is_bnxt_in_error(bp);
 457         if (rc)
 458                 return rc;
 459
 460         if (rxq == NULL) {
 461                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 462                 return -EINVAL;
 463         }
 464
 465         /* Set the queue state to started here.
 466          * We check the status of the queue while posting buffer.
 467          * If queue is it started, we do not post buffers for Rx.
 468          */
 469         rxq->rx_started = true;
 470         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 471
 472         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
 473         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
 474         if (rc)
 475                 return rc;
 476
 477         if (BNXT_CHIP_P5(bp)) {
 478                 /* Reconfigure default receive ring and MRU. */
 479                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
 480         }
 481         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
 482
 483         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) {
 484                 vnic = rxq->vnic;
 485
 486                 if (BNXT_HAS_RING_GRPS(bp)) {
 487                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
 488                                 return 0;
 489
 490                         vnic->fw_grp_ids[rx_queue_id] =
 491                                         bp->grp_info[rx_queue_id].fw_grp_id;
 492                         PMD_DRV_LOG(DEBUG,
 493                                     "vnic = %p fw_grp_id = %d\n",
 494                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
 495                 }
 496
 497                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 498                 rc = bnxt_vnic_rss_configure(bp, vnic);
 499         }
 500
 501         if (rc != 0) {
 502                 dev->data->rx_queue_state[rx_queue_id] =
 503                                 RTE_ETH_QUEUE_STATE_STOPPED;
 504                 rxq->rx_started = false;
 505         }
 506
 507         PMD_DRV_LOG(INFO,
 508                     "queue %d, rx_deferred_start %d, state %d!\n",
 509                     rx_queue_id, rxq->rx_deferred_start,
 510                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
 511
 512         return rc;
 513 }
 514
 515 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 516 {
 517         struct bnxt *bp = dev->data->dev_private;
 518         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 519         struct bnxt_vnic_info *vnic = NULL;
 520         struct bnxt_rx_queue *rxq = NULL;
 521         int active_queue_cnt = 0;
 522         int i, rc = 0;
 523
 524         rc = is_bnxt_in_error(bp);
 525         if (rc)
 526                 return rc;
 527
 528         /* For the stingray platform and other platforms needing tighter
 529          * control of resource utilization, Rx CQ 0 also works as
 530          * Default CQ for async notifications
 531          */
 532         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
 533                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
 534                 return -EINVAL;
 535         }
 536
 537         rxq = bp->rx_queues[rx_queue_id];
 538         if (!rxq) {
 539                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 540                 return -EINVAL;
 541         }
 542
 543         vnic = rxq->vnic;
 544         if (!vnic) {
 545                 PMD_DRV_LOG(ERR, "VNIC not initialized for RxQ %d\n",
 546                             rx_queue_id);
 547                 return -EINVAL;
 548         }
 549
 550         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 551         rxq->rx_started = false;
 552         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
 553
 554         if (dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) {
 555                 if (BNXT_HAS_RING_GRPS(bp))
 556                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
 557
 558                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 559                 rc = bnxt_vnic_rss_configure(bp, vnic);
 560         }
 561
 562         /* Compute current number of active receive queues. */
 563         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
 564                 if (bp->rx_queues[i]->rx_started)
 565                         active_queue_cnt++;
 566
 567         if (BNXT_CHIP_P5(bp)) {
 568                 /*
 569                  * For Thor, we need to ensure that the VNIC default receive
 570                  * ring corresponds to an active receive queue. When no queue
 571                  * is active, we need to temporarily set the MRU to zero so
 572                  * that packets are dropped early in the receive pipeline in
 573                  * order to prevent the VNIC default receive ring from being
 574                  * accessed.
 575                  */
 576                 if (active_queue_cnt == 0) {
 577                         uint16_t saved_mru = vnic->mru;
 578
 579                         /* clear RSS setting on vnic. */
 580                         bnxt_vnic_rss_clear_p5(bp, vnic);
 581
 582                         vnic->mru = 0;
 583                         /* Reconfigure default receive ring and MRU. */
 584                         bnxt_hwrm_vnic_cfg(bp, vnic);
 585                         vnic->mru = saved_mru;
 586                 } else {
 587                         /* Reconfigure default receive ring. */
 588                         bnxt_hwrm_vnic_cfg(bp, vnic);
 589                 }
 590         } else if (active_queue_cnt) {
 591                 /*
 592                  * If the queue being stopped is the current default queue and
 593                  * there are other active queues, pick one of them as the
 594                  * default and reconfigure the vnic.
 595                  */
 596                 if (vnic->dflt_ring_grp == bp->grp_info[rx_queue_id].fw_grp_id) {
 597                         for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++) {
 598                                 if (bp->rx_queues[i]->rx_started) {
 599                                         vnic->dflt_ring_grp =
 600                                                 bp->grp_info[i].fw_grp_id;
 601                                         bnxt_hwrm_vnic_cfg(bp, vnic);
 602                                         break;
 603                                 }
 604                         }
 605                 }
 606         }
 607
 608         if (rc == 0)
 609                 bnxt_rx_queue_release_mbufs(rxq);
 610
 611         return rc;
 612 }