net/bnxt: fix number of MAC addresses for VMDq
[dpdk.git] / drivers / net / bnxt / bnxt_rxq.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) Broadcom Limited.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Broadcom Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <inttypes.h>
35
36 #include <rte_malloc.h>
37
38 #include "bnxt.h"
39 #include "bnxt_cpr.h"
40 #include "bnxt_filter.h"
41 #include "bnxt_hwrm.h"
42 #include "bnxt_ring.h"
43 #include "bnxt_rxq.h"
44 #include "bnxt_rxr.h"
45 #include "bnxt_vnic.h"
46 #include "hsi_struct_def_dpdk.h"
47
48 /*
49  * RX Queues
50  */
51
52 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
53 {
54         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
55
56         if (cpr->hw_stats)
57                 cpr->hw_stats = NULL;
58 }
59
60 int bnxt_mq_rx_configure(struct bnxt *bp)
61 {
62         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
63         const struct rte_eth_vmdq_rx_conf *conf =
64                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
65         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
66         int start_grp_id, end_grp_id = 1, rc = 0;
67         struct bnxt_vnic_info *vnic;
68         struct bnxt_filter_info *filter;
69         enum rte_eth_nb_pools pools = bp->rx_cp_nr_rings, max_pools = 0;
70         struct bnxt_rx_queue *rxq;
71         bool rss_dflt_cr = false;
72
73         bp->nr_vnics = 0;
74
75         /* Single queue mode */
76         if (bp->rx_cp_nr_rings < 2) {
77                 vnic = bnxt_alloc_vnic(bp);
78                 if (!vnic) {
79                         RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
80                         rc = -ENOMEM;
81                         goto err_out;
82                 }
83                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
84                 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
85                 bp->nr_vnics++;
86
87                 rxq = bp->eth_dev->data->rx_queues[0];
88                 rxq->vnic = vnic;
89
90                 vnic->func_default = true;
91                 vnic->ff_pool_idx = 0;
92                 vnic->start_grp_id = 0;
93                 vnic->end_grp_id = vnic->start_grp_id;
94                 filter = bnxt_alloc_filter(bp);
95                 if (!filter) {
96                         RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
97                         rc = -ENOMEM;
98                         goto err_out;
99                 }
100                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
101                 goto out;
102         }
103
104         /* Multi-queue mode */
105         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
106                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
107
108                 switch (dev_conf->rxmode.mq_mode) {
109                 case ETH_MQ_RX_VMDQ_RSS:
110                 case ETH_MQ_RX_VMDQ_ONLY:
111                         /* ETH_8/64_POOLs */
112                         pools = conf->nb_queue_pools;
113                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
114                         max_pools = RTE_MIN(bp->max_vnics,
115                                             RTE_MIN(bp->max_l2_ctx,
116                                             RTE_MIN(bp->max_rsscos_ctx,
117                                                     ETH_64_POOLS)));
118                         if (pools > max_pools)
119                                 pools = max_pools;
120                         break;
121                 case ETH_MQ_RX_RSS:
122                         pools = 1;
123                         break;
124                 default:
125                         RTE_LOG(ERR, PMD, "Unsupported mq_mod %d\n",
126                                 dev_conf->rxmode.mq_mode);
127                         rc = -EINVAL;
128                         goto err_out;
129                 }
130         }
131         /*
132          * If MQ RX w/o RSS no need for per VNIC filter.
133          */
134         if ((dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) ||
135             (bp->rx_cp_nr_rings &&
136              !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS)))
137                 rss_dflt_cr = true;
138
139         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
140         start_grp_id = 0;
141         end_grp_id = nb_q_per_grp;
142
143         for (i = 0; i < pools; i++) {
144                 vnic = bnxt_alloc_vnic(bp);
145                 if (!vnic) {
146                         RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
147                         rc = -ENOMEM;
148                         goto err_out;
149                 }
150                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
151                 STAILQ_INSERT_TAIL(&bp->ff_pool[i], vnic, next);
152                 bp->nr_vnics++;
153
154                 for (j = 0, ring_idx = 0; j < nb_q_per_grp; j++, ring_idx++) {
155                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
156                         rxq->vnic = vnic;
157                 }
158                 if (i == 0) {
159                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
160                                 bp->eth_dev->data->promiscuous = 1;
161                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
162                         }
163                         vnic->func_default = true;
164                 }
165                 vnic->ff_pool_idx = i;
166                 vnic->start_grp_id = start_grp_id;
167                 vnic->end_grp_id = end_grp_id;
168
169                 if (rss_dflt_cr && i) {
170                         vnic->rss_dflt_cr = true;
171                         goto skip_filter_allocation;
172                 }
173                 filter = bnxt_alloc_filter(bp);
174                 if (!filter) {
175                         RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
176                         rc = -ENOMEM;
177                         goto err_out;
178                 }
179                 for (j = 0; j < conf->nb_pool_maps; j++) {
180                         if (conf->pool_map[j].pools & (1UL << i)) {
181                                 RTE_LOG(ERR, PMD,
182                                         "Add vlan %u to vmdq pool %u\n",
183                                         conf->pool_map[j].vlan_id, i);
184
185                                 filter->l2_ivlan = conf->pool_map[j].vlan_id;
186                                 filter->enables |=
187                                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
188                         }
189                 }
190                 /*
191                  * TODO: Configure & associate CFA rule for
192                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
193                  */
194                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
195
196 skip_filter_allocation:
197                 start_grp_id = end_grp_id;
198                 end_grp_id += nb_q_per_grp;
199         }
200
201 out:
202         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
203                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
204                 uint16_t hash_type = 0;
205
206                 if (bp->flags & BNXT_FLAG_UPDATE_HASH) {
207                         rss = &bp->rss_conf;
208                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
209                 }
210
211                 if (rss->rss_hf & ETH_RSS_IPV4)
212                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
213                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
214                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
215                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
216                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
217                 if (rss->rss_hf & ETH_RSS_IPV6)
218                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
219                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
220                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
221                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
222                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
223
224                 for (i = 0; i < bp->nr_vnics; i++) {
225                         STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
226                         vnic->hash_type |= hash_type;
227
228                         /*
229                          * Use the supplied key if the key length is
230                          * acceptable and the rss_key is not NULL
231                          */
232                         if (rss->rss_key &&
233                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
234                                 memcpy(vnic->rss_hash_key,
235                                        rss->rss_key, rss->rss_key_len);
236                         }
237                 }
238         }
239
240         return rc;
241
242 err_out:
243         /* Free allocated vnic/filters */
244
245         return rc;
246 }
247
248 static void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
249 {
250         struct bnxt_sw_rx_bd *sw_ring;
251         struct bnxt_tpa_info *tpa_info;
252         uint16_t i;
253
254         if (rxq) {
255                 sw_ring = rxq->rx_ring->rx_buf_ring;
256                 if (sw_ring) {
257                         for (i = 0; i < rxq->nb_rx_desc; i++) {
258                                 if (sw_ring[i].mbuf) {
259                                         rte_pktmbuf_free_seg(sw_ring[i].mbuf);
260                                         sw_ring[i].mbuf = NULL;
261                                 }
262                         }
263                 }
264                 /* Free up mbufs in Agg ring */
265                 sw_ring = rxq->rx_ring->ag_buf_ring;
266                 if (sw_ring) {
267                         for (i = 0; i < rxq->nb_rx_desc; i++) {
268                                 if (sw_ring[i].mbuf) {
269                                         rte_pktmbuf_free_seg(sw_ring[i].mbuf);
270                                         sw_ring[i].mbuf = NULL;
271                                 }
272                         }
273                 }
274
275                 /* Free up mbufs in TPA */
276                 tpa_info = rxq->rx_ring->tpa_info;
277                 if (tpa_info) {
278                         for (i = 0; i < BNXT_TPA_MAX; i++) {
279                                 if (tpa_info[i].mbuf) {
280                                         rte_pktmbuf_free_seg(tpa_info[i].mbuf);
281                                         tpa_info[i].mbuf = NULL;
282                                 }
283                         }
284                 }
285         }
286 }
287
288 void bnxt_free_rx_mbufs(struct bnxt *bp)
289 {
290         struct bnxt_rx_queue *rxq;
291         int i;
292
293         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
294                 rxq = bp->rx_queues[i];
295                 bnxt_rx_queue_release_mbufs(rxq);
296         }
297 }
298
299 void bnxt_rx_queue_release_op(void *rx_queue)
300 {
301         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
302
303         if (rxq) {
304                 bnxt_rx_queue_release_mbufs(rxq);
305
306                 /* Free RX ring hardware descriptors */
307                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
308                 /* Free RX Agg ring hardware descriptors */
309                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
310
311                 /* Free RX completion ring hardware descriptors */
312                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
313
314                 bnxt_free_rxq_stats(rxq);
315
316                 rte_free(rxq);
317         }
318 }
319
320 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
321                                uint16_t queue_idx,
322                                uint16_t nb_desc,
323                                unsigned int socket_id,
324                                const struct rte_eth_rxconf *rx_conf,
325                                struct rte_mempool *mp)
326 {
327         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
328         struct bnxt_rx_queue *rxq;
329         int rc = 0;
330
331         if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
332                 RTE_LOG(ERR, PMD, "nb_desc %d is invalid\n", nb_desc);
333                 rc = -EINVAL;
334                 goto out;
335         }
336
337         if (eth_dev->data->rx_queues) {
338                 rxq = eth_dev->data->rx_queues[queue_idx];
339                 if (rxq)
340                         bnxt_rx_queue_release_op(rxq);
341         }
342         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
343                                  RTE_CACHE_LINE_SIZE, socket_id);
344         if (!rxq) {
345                 RTE_LOG(ERR, PMD, "bnxt_rx_queue allocation failed!\n");
346                 rc = -ENOMEM;
347                 goto out;
348         }
349         rxq->bp = bp;
350         rxq->mb_pool = mp;
351         rxq->nb_rx_desc = nb_desc;
352         rxq->rx_free_thresh = rx_conf->rx_free_thresh;
353
354         RTE_LOG(DEBUG, PMD, "RX Buf size is %d\n", rxq->rx_buf_use_size);
355         RTE_LOG(DEBUG, PMD, "RX Buf MTU %d\n", eth_dev->data->mtu);
356
357         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
358         if (rc)
359                 goto out;
360
361         rxq->queue_id = queue_idx;
362         rxq->port_id = eth_dev->data->port_id;
363         rxq->crc_len = (uint8_t)((eth_dev->data->dev_conf.rxmode.hw_strip_crc) ?
364                                 0 : ETHER_CRC_LEN);
365
366         eth_dev->data->rx_queues[queue_idx] = rxq;
367         /* Allocate RX ring hardware descriptors */
368         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq->rx_ring, rxq->cp_ring,
369                         "rxr")) {
370                 RTE_LOG(ERR, PMD,
371                         "ring_dma_zone_reserve for rx_ring failed!\n");
372                 bnxt_rx_queue_release_op(rxq);
373                 rc = -ENOMEM;
374                 goto out;
375         }
376
377 out:
378         return rc;
379 }
380
381 int
382 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
383 {
384         struct bnxt_rx_queue *rxq;
385         struct bnxt_cp_ring_info *cpr;
386         int rc = 0;
387
388         if (eth_dev->data->rx_queues) {
389                 rxq = eth_dev->data->rx_queues[queue_id];
390                 if (!rxq) {
391                         rc = -EINVAL;
392                         return rc;
393                 }
394                 cpr = rxq->cp_ring;
395                 B_CP_DB_ARM(cpr);
396         }
397         return rc;
398 }
399
400 int
401 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
402 {
403         struct bnxt_rx_queue *rxq;
404         struct bnxt_cp_ring_info *cpr;
405         int rc = 0;
406
407         if (eth_dev->data->rx_queues) {
408                 rxq = eth_dev->data->rx_queues[queue_id];
409                 if (!rxq) {
410                         rc = -EINVAL;
411                         return rc;
412                 }
413                 cpr = rxq->cp_ring;
414                 B_CP_DB_DISARM(cpr);
415         }
416         return rc;
417 }