1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
9 #include <rte_bitmap.h>
10 #include <rte_byteorder.h>
11 #include <rte_malloc.h>
12 #include <rte_memory.h>
16 #include "bnxt_ring.h"
19 #include "hsi_struct_def_dpdk.h"
20 #ifdef RTE_LIBRTE_IEEE1588
21 #include "bnxt_hwrm.h"
28 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
30 struct rte_mbuf *data;
32 data = rte_mbuf_raw_alloc(mb);
37 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
38 struct bnxt_rx_ring_info *rxr,
41 struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
42 struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[prod];
43 struct rte_mbuf *mbuf;
45 mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
47 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
52 mbuf->data_off = RTE_PKTMBUF_HEADROOM;
54 rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
59 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
60 struct bnxt_rx_ring_info *rxr,
63 struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
64 struct bnxt_sw_rx_bd *rx_buf = &rxr->ag_buf_ring[prod];
65 struct rte_mbuf *mbuf;
67 mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
69 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
74 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
76 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
80 mbuf->data_off = RTE_PKTMBUF_HEADROOM;
82 rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
87 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
88 struct rte_mbuf *mbuf)
90 uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
91 struct bnxt_sw_rx_bd *prod_rx_buf;
92 struct rx_prod_pkt_bd *prod_bd;
94 prod_rx_buf = &rxr->rx_buf_ring[prod];
96 RTE_ASSERT(prod_rx_buf->mbuf == NULL);
97 RTE_ASSERT(mbuf != NULL);
99 prod_rx_buf->mbuf = mbuf;
101 prod_bd = &rxr->rx_desc_ring[prod];
103 prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
109 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
112 struct bnxt_sw_rx_bd *cons_rx_buf;
113 struct rte_mbuf *mbuf;
115 cons_rx_buf = &rxr->rx_buf_ring[cons];
116 RTE_ASSERT(cons_rx_buf->mbuf != NULL);
117 mbuf = cons_rx_buf->mbuf;
118 cons_rx_buf->mbuf = NULL;
122 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
123 struct rx_tpa_start_cmpl *tpa_start,
124 struct rx_tpa_start_cmpl_hi *tpa_start1)
126 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
129 struct bnxt_tpa_info *tpa_info;
130 struct rte_mbuf *mbuf;
132 agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
134 data_cons = tpa_start->opaque;
135 tpa_info = &rxr->tpa_info[agg_id];
137 mbuf = bnxt_consume_rx_buf(rxr, data_cons);
139 bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
141 tpa_info->agg_count = 0;
142 tpa_info->mbuf = mbuf;
143 tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
147 mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
148 mbuf->data_len = mbuf->pkt_len;
149 mbuf->port = rxq->port_id;
150 mbuf->ol_flags = PKT_RX_LRO;
151 if (likely(tpa_start->flags_type &
152 rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
153 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
154 mbuf->ol_flags |= PKT_RX_RSS_HASH;
156 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
157 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
159 if (tpa_start1->flags2 &
160 rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
161 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
162 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
164 if (likely(tpa_start1->flags2 &
165 rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
166 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
168 /* recycle next mbuf */
169 data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
170 bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
173 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
174 uint8_t agg_bufs, uint32_t raw_cp_cons)
176 uint16_t last_cp_cons;
177 struct rx_pkt_cmpl *agg_cmpl;
179 raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
180 last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
181 agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
182 cpr->valid = FLIP_VALID(raw_cp_cons,
183 cpr->cp_ring_struct->ring_mask,
185 return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
188 /* TPA consume agg buffer out of order, allocate connected data only */
189 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
191 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
192 uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
194 /* TODO batch allocation for better performance */
195 while (rte_bitmap_get(rxr->ag_bitmap, next)) {
196 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
198 "agg mbuf alloc failed: prod=0x%x\n", next);
201 rte_bitmap_clear(rxr->ag_bitmap, next);
203 next = RING_NEXT(rxr->ag_ring_struct, next);
209 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
210 struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
211 uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
213 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
214 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
216 uint16_t cp_cons, ag_cons;
217 struct rx_pkt_cmpl *rxcmp;
218 struct rte_mbuf *last = mbuf;
219 bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
221 for (i = 0; i < agg_buf; i++) {
222 struct bnxt_sw_rx_bd *ag_buf;
223 struct rte_mbuf *ag_mbuf;
226 rxcmp = (void *)&tpa_info->agg_arr[i];
228 *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
229 cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
230 rxcmp = (struct rx_pkt_cmpl *)
231 &cpr->cp_desc_ring[cp_cons];
235 bnxt_dump_cmpl(cp_cons, rxcmp);
238 ag_cons = rxcmp->opaque;
239 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
240 ag_buf = &rxr->ag_buf_ring[ag_cons];
241 ag_mbuf = ag_buf->mbuf;
242 RTE_ASSERT(ag_mbuf != NULL);
244 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
247 mbuf->pkt_len += ag_mbuf->data_len;
249 last->next = ag_mbuf;
255 * As aggregation buffer consumed out of order in TPA module,
256 * use bitmap to track freed slots to be allocated and notified
259 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
261 bnxt_prod_ag_mbuf(rxq);
265 static inline struct rte_mbuf *bnxt_tpa_end(
266 struct bnxt_rx_queue *rxq,
267 uint32_t *raw_cp_cons,
268 struct rx_tpa_end_cmpl *tpa_end,
269 struct rx_tpa_end_cmpl_hi *tpa_end1)
271 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
272 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
274 struct rte_mbuf *mbuf;
276 uint8_t payload_offset;
277 struct bnxt_tpa_info *tpa_info;
279 if (BNXT_CHIP_THOR(rxq->bp)) {
280 struct rx_tpa_v2_end_cmpl *th_tpa_end;
281 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
283 th_tpa_end = (void *)tpa_end;
284 th_tpa_end1 = (void *)tpa_end1;
285 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
286 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
287 payload_offset = th_tpa_end1->payload_offset;
289 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
290 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
291 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
293 payload_offset = tpa_end->payload_offset;
296 tpa_info = &rxr->tpa_info[agg_id];
297 mbuf = tpa_info->mbuf;
298 RTE_ASSERT(mbuf != NULL);
302 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
304 mbuf->l4_len = payload_offset;
306 struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
307 RTE_ASSERT(new_data != NULL);
309 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
312 tpa_info->mbuf = new_data;
318 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
320 uint32_t l3, pkt_type = 0;
321 uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
324 vlan = !!(rxcmp1->flags2 &
325 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
326 pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
328 t_ipcs = !!(rxcmp1->flags2 &
329 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
330 ip6 = !!(rxcmp1->flags2 &
331 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
333 flags_type = rxcmp->flags_type &
334 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
337 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
338 else if (!t_ipcs && ip6)
339 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
340 else if (t_ipcs && !ip6)
341 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
343 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
345 switch (flags_type) {
346 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
348 pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
350 pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
353 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
355 pkt_type |= l3 | RTE_PTYPE_L4_TCP;
357 pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
360 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
362 pkt_type |= l3 | RTE_PTYPE_L4_UDP;
364 pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
367 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
375 #ifdef RTE_LIBRTE_IEEE1588
377 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
379 uint64_t systime_cycles = 0;
381 if (!BNXT_CHIP_THOR(bp))
384 /* On Thor, Rx timestamps are provided directly in the
385 * Rx completion records to the driver. Only 32 bits of
386 * the timestamp is present in the completion. Driver needs
387 * to read the current 48 bit free running timer using the
388 * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
389 * from the HWRM response with the lower 32 bits in the
390 * Rx completion to produce the 48 bit timestamp for the Rx packet
392 bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
394 bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
395 bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
399 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
400 struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
402 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
403 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
404 struct rx_pkt_cmpl *rxcmp;
405 struct rx_pkt_cmpl_hi *rxcmp1;
406 uint32_t tmp_raw_cons = *raw_cons;
407 uint16_t cons, prod, cp_cons =
408 RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
409 struct rte_mbuf *mbuf;
413 uint32_t flags2_f = 0;
416 rxcmp = (struct rx_pkt_cmpl *)
417 &cpr->cp_desc_ring[cp_cons];
419 cmp_type = CMP_TYPE(rxcmp);
421 if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
422 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
423 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
424 struct bnxt_tpa_info *tpa_info;
426 tpa_info = &rxr->tpa_info[agg_id];
427 RTE_ASSERT(tpa_info->agg_count < 16);
428 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
429 rc = -EINVAL; /* Continue w/o new mbuf */
433 tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
434 cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
435 rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
437 if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
440 cpr->valid = FLIP_VALID(cp_cons,
441 cpr->cp_ring_struct->ring_mask,
444 if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
445 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
446 (struct rx_tpa_start_cmpl_hi *)rxcmp1);
447 rc = -EINVAL; /* Continue w/o new mbuf */
449 } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
450 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
451 (struct rx_tpa_end_cmpl *)rxcmp,
452 (struct rx_tpa_end_cmpl_hi *)rxcmp1);
457 } else if (cmp_type != 0x11) {
462 agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
463 >> RX_PKT_CMPL_AGG_BUFS_SFT;
464 if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
469 cons = rxcmp->opaque;
470 mbuf = bnxt_consume_rx_buf(rxr, cons);
476 mbuf->data_off = RTE_PKTMBUF_HEADROOM;
479 mbuf->pkt_len = rxcmp->len;
480 mbuf->data_len = mbuf->pkt_len;
481 mbuf->port = rxq->port_id;
484 flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
485 if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
486 mbuf->hash.rss = rxcmp->rss_hash;
487 mbuf->ol_flags |= PKT_RX_RSS_HASH;
489 mbuf->hash.fdir.id = rxcmp1->cfa_code;
490 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
492 #ifdef RTE_LIBRTE_IEEE1588
493 if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
494 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
495 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
496 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
500 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
502 if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
503 mbuf->vlan_tci = rxcmp1->metadata &
504 (RX_PKT_CMPL_METADATA_VID_MASK |
505 RX_PKT_CMPL_METADATA_DE |
506 RX_PKT_CMPL_METADATA_PRI_MASK);
507 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
510 flags2_f = flags2_0xf(rxcmp1);
512 if (unlikely(((IS_IP_NONTUNNEL_PKT(flags2_f)) &&
513 (RX_CMP_IP_CS_ERROR(rxcmp1))) ||
514 (IS_IP_TUNNEL_PKT(flags2_f) &&
515 (RX_CMP_IP_OUTER_CS_ERROR(rxcmp1))))) {
516 mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
517 } else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1))) {
518 mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
520 mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
524 if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
525 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
526 mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
528 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
529 } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
530 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
531 mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
533 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
534 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
535 mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
536 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
538 mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
540 mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
542 } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
543 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
546 mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
549 if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
550 /* Re-install the mbuf back to the rx ring */
551 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
558 * TODO: Redesign this....
559 * If the allocation fails, the packet does not get received.
560 * Simply returning this will result in slowly falling behind
561 * on the producer ring buffers.
562 * Instead, "filling up" the producer just before ringing the
563 * doorbell could be a better solution since it will let the
564 * producer ring starve until memory is available again pushing
565 * the drops into hardware and getting them out of the driver
566 * allowing recovery to a full producer ring.
568 * This could also help with cache usage by preventing per-packet
569 * calls in favour of a tight loop with the same function being called
572 prod = RING_NEXT(rxr->rx_ring_struct, prod);
573 if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
574 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
580 * All MBUFs are allocated with the same size under DPDK,
581 * no optimization for rx_copy_thresh
588 *raw_cons = tmp_raw_cons;
593 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
596 struct bnxt_rx_queue *rxq = rx_queue;
597 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
598 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
599 uint32_t raw_cons = cpr->cp_raw_cons;
602 struct rx_pkt_cmpl *rxcmp;
603 uint16_t prod = rxr->rx_prod;
604 uint16_t ag_prod = rxr->ag_prod;
608 if (unlikely(is_bnxt_in_error(rxq->bp)))
611 /* If Rx Q was stopped return */
612 if (unlikely(!rxq->rx_started ||
613 !rte_spinlock_trylock(&rxq->lock)))
616 /* Handle RX burst request */
618 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
619 rte_prefetch0(&cpr->cp_desc_ring[cons]);
620 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
622 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
624 cpr->valid = FLIP_VALID(cons,
625 cpr->cp_ring_struct->ring_mask,
628 /* TODO: Avoid magic numbers... */
629 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
630 rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
631 if (likely(!rc) || rc == -ENOMEM)
633 if (rc == -EBUSY) /* partial completion */
635 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
637 bnxt_event_hwrm_resp_handler(rxq->bp,
638 (struct cmpl_base *)rxcmp);
641 raw_cons = NEXT_RAW_CMP(raw_cons);
642 if (nb_rx_pkts == nb_pkts || evt)
644 /* Post some Rx buf early in case of larger burst processing */
645 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
646 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
649 cpr->cp_raw_cons = raw_cons;
650 if (!nb_rx_pkts && !evt) {
652 * For PMD, there is no need to keep on pushing to REARM
653 * the doorbell if there are no new completions
658 if (prod != rxr->rx_prod)
659 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
661 /* Ring the AGG ring DB */
662 if (ag_prod != rxr->ag_prod)
663 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
667 /* Attempt to alloc Rx buf in case of a previous allocation failure. */
671 for (i = prod; i <= nb_rx_pkts;
672 i = RING_NEXT(rxr->rx_ring_struct, i)) {
673 struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i];
675 /* Buffer already allocated for this index. */
676 if (rx_buf->mbuf != NULL)
679 /* This slot is empty. Alloc buffer for Rx */
680 if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
682 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
684 PMD_DRV_LOG(ERR, "Alloc mbuf failed\n");
691 rte_spinlock_unlock(&rxq->lock);
697 * Dummy DPDK callback for RX.
699 * This function is used to temporarily replace the real callback during
700 * unsafe control operations on the queue, or in case of error.
703 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
704 struct rte_mbuf **rx_pkts __rte_unused,
705 uint16_t nb_pkts __rte_unused)
710 void bnxt_free_rx_rings(struct bnxt *bp)
713 struct bnxt_rx_queue *rxq;
718 for (i = 0; i < (int)bp->rx_nr_rings; i++) {
719 rxq = bp->rx_queues[i];
723 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
724 rte_free(rxq->rx_ring->rx_ring_struct);
726 /* Free the Aggregator ring */
727 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
728 rte_free(rxq->rx_ring->ag_ring_struct);
729 rxq->rx_ring->ag_ring_struct = NULL;
731 rte_free(rxq->rx_ring);
733 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
734 rte_free(rxq->cp_ring->cp_ring_struct);
735 rte_free(rxq->cp_ring);
738 bp->rx_queues[i] = NULL;
742 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
744 struct bnxt_cp_ring_info *cpr;
745 struct bnxt_cp_ring_info *nqr;
746 struct bnxt_rx_ring_info *rxr;
747 struct bnxt_ring *ring;
749 rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
751 rxr = rte_zmalloc_socket("bnxt_rx_ring",
752 sizeof(struct bnxt_rx_ring_info),
753 RTE_CACHE_LINE_SIZE, socket_id);
758 ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
759 sizeof(struct bnxt_ring),
760 RTE_CACHE_LINE_SIZE, socket_id);
763 rxr->rx_ring_struct = ring;
764 ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
765 ring->ring_mask = ring->ring_size - 1;
766 ring->bd = (void *)rxr->rx_desc_ring;
767 ring->bd_dma = rxr->rx_desc_mapping;
768 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
769 ring->vmem = (void **)&rxr->rx_buf_ring;
771 cpr = rte_zmalloc_socket("bnxt_rx_ring",
772 sizeof(struct bnxt_cp_ring_info),
773 RTE_CACHE_LINE_SIZE, socket_id);
778 ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
779 sizeof(struct bnxt_ring),
780 RTE_CACHE_LINE_SIZE, socket_id);
783 cpr->cp_ring_struct = ring;
784 ring->ring_size = rte_align32pow2(rxr->rx_ring_struct->ring_size *
785 (2 + AGG_RING_SIZE_FACTOR));
786 ring->ring_mask = ring->ring_size - 1;
787 ring->bd = (void *)cpr->cp_desc_ring;
788 ring->bd_dma = cpr->cp_desc_mapping;
792 if (BNXT_HAS_NQ(rxq->bp)) {
793 nqr = rte_zmalloc_socket("bnxt_rx_ring_cq",
794 sizeof(struct bnxt_cp_ring_info),
795 RTE_CACHE_LINE_SIZE, socket_id);
801 ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
802 sizeof(struct bnxt_ring),
803 RTE_CACHE_LINE_SIZE, socket_id);
807 nqr->cp_ring_struct = ring;
809 rte_align32pow2(rxr->rx_ring_struct->ring_size *
810 (2 + AGG_RING_SIZE_FACTOR));
811 ring->ring_mask = ring->ring_size - 1;
812 ring->bd = (void *)nqr->cp_desc_ring;
813 ring->bd_dma = nqr->cp_desc_mapping;
818 /* Allocate Aggregator rings */
819 ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
820 sizeof(struct bnxt_ring),
821 RTE_CACHE_LINE_SIZE, socket_id);
824 rxr->ag_ring_struct = ring;
825 ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
826 AGG_RING_SIZE_FACTOR);
827 ring->ring_mask = ring->ring_size - 1;
828 ring->bd = (void *)rxr->ag_desc_ring;
829 ring->bd_dma = rxr->ag_desc_mapping;
830 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
831 ring->vmem = (void **)&rxr->ag_buf_ring;
836 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
840 struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
844 for (j = 0; j < ring->ring_size; j++) {
845 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
846 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
847 rx_bd_ring[j].opaque = j;
851 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
853 struct bnxt_rx_ring_info *rxr;
854 struct bnxt_ring *ring;
859 size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
860 size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
862 type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
865 ring = rxr->rx_ring_struct;
866 bnxt_init_rxbds(ring, type, size);
869 for (i = 0; i < ring->ring_size; i++) {
870 if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
872 "init'ed rx ring %d with %d/%d mbufs only\n",
873 rxq->queue_id, i, ring->ring_size);
877 prod = RING_NEXT(rxr->rx_ring_struct, prod);
880 ring = rxr->ag_ring_struct;
881 type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
882 bnxt_init_rxbds(ring, type, size);
885 for (i = 0; i < ring->ring_size; i++) {
886 if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
888 "init'ed AG ring %d with %d/%d mbufs only\n",
889 rxq->queue_id, i, ring->ring_size);
893 prod = RING_NEXT(rxr->ag_ring_struct, prod);
895 PMD_DRV_LOG(DEBUG, "AGG Done!\n");
898 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
900 for (i = 0; i < max_aggs; i++) {
901 rxr->tpa_info[i].mbuf =
902 __bnxt_alloc_rx_data(rxq->mb_pool);
903 if (!rxr->tpa_info[i].mbuf) {
904 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
909 PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");