drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_reps.h"
  16 #include "bnxt_ring.h"
  17 #include "bnxt_rxr.h"
  18 #include "bnxt_rxq.h"
  19 #include "hsi_struct_def_dpdk.h"
  20 #ifdef RTE_LIBRTE_IEEE1588
  21 #include "bnxt_hwrm.h"
  22 #endif
  23
  24 #include <bnxt_tf_common.h>
  25 #include <ulp_mark_mgr.h>
  26
  27 /*
  28  * RX Ring handling
  29  */
  30
  31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  32 {
  33         struct rte_mbuf *data;
  34
  35         data = rte_mbuf_raw_alloc(mb);
  36
  37         return data;
  38 }
  39
  40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  41                                      struct bnxt_rx_ring_info *rxr,
  42                                      uint16_t raw_prod)
  43 {
  44         uint16_t prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
  45         struct rx_prod_pkt_bd *rxbd;
  46         struct rte_mbuf **rx_buf;
  47         struct rte_mbuf *mbuf;
  48
  49         rxbd = &rxr->rx_desc_ring[prod];
  50         rx_buf = &rxr->rx_buf_ring[prod];
  51         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  52         if (!mbuf) {
  53                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  54                 return -ENOMEM;
  55         }
  56
  57         *rx_buf = mbuf;
  58         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  59
  60         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  61
  62         return 0;
  63 }
  64
  65 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  66                                      struct bnxt_rx_ring_info *rxr,
  67                                      uint16_t raw_prod)
  68 {
  69         uint16_t prod = RING_IDX(rxr->ag_ring_struct, raw_prod);
  70         struct rx_prod_pkt_bd *rxbd;
  71         struct rte_mbuf **rx_buf;
  72         struct rte_mbuf *mbuf;
  73
  74         rxbd = &rxr->ag_desc_ring[prod];
  75         rx_buf = &rxr->ag_buf_ring[prod];
  76         if (rxbd == NULL) {
  77                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  78                 return -EINVAL;
  79         }
  80
  81         if (rx_buf == NULL) {
  82                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  83                 return -EINVAL;
  84         }
  85
  86         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  87         if (!mbuf) {
  88                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  89                 return -ENOMEM;
  90         }
  91
  92         *rx_buf = mbuf;
  93         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  94
  95         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  96
  97         return 0;
  98 }
  99
 100 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
 101                                struct rte_mbuf *mbuf)
 102 {
 103         uint16_t prod, raw_prod = RING_NEXT(rxr->rx_raw_prod);
 104         struct rte_mbuf **prod_rx_buf;
 105         struct rx_prod_pkt_bd *prod_bd;
 106
 107         prod = RING_IDX(rxr->rx_ring_struct, raw_prod);
 108         prod_rx_buf = &rxr->rx_buf_ring[prod];
 109
 110         RTE_ASSERT(*prod_rx_buf == NULL);
 111         RTE_ASSERT(mbuf != NULL);
 112
 113         *prod_rx_buf = mbuf;
 114
 115         prod_bd = &rxr->rx_desc_ring[prod];
 116
 117         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 118
 119         rxr->rx_raw_prod = raw_prod;
 120 }
 121
 122 static inline
 123 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 124                                      uint16_t cons)
 125 {
 126         struct rte_mbuf **cons_rx_buf;
 127         struct rte_mbuf *mbuf;
 128
 129         cons_rx_buf = &rxr->rx_buf_ring[RING_IDX(rxr->rx_ring_struct, cons)];
 130         RTE_ASSERT(*cons_rx_buf != NULL);
 131         mbuf = *cons_rx_buf;
 132         *cons_rx_buf = NULL;
 133
 134         return mbuf;
 135 }
 136
 137 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 138                            struct rx_tpa_start_cmpl *tpa_start,
 139                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 140 {
 141         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 142         uint16_t agg_id;
 143         uint16_t data_cons;
 144         struct bnxt_tpa_info *tpa_info;
 145         struct rte_mbuf *mbuf;
 146
 147         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 148
 149         data_cons = tpa_start->opaque;
 150         tpa_info = &rxr->tpa_info[agg_id];
 151
 152         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 153
 154         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 155
 156         tpa_info->agg_count = 0;
 157         tpa_info->mbuf = mbuf;
 158         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 159
 160         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 161         mbuf->nb_segs = 1;
 162         mbuf->next = NULL;
 163         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 164         mbuf->data_len = mbuf->pkt_len;
 165         mbuf->port = rxq->port_id;
 166         mbuf->ol_flags = PKT_RX_LRO;
 167         if (likely(tpa_start->flags_type &
 168                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 169                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 170                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 171         } else {
 172                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 173                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 174         }
 175         if (tpa_start1->flags2 &
 176             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 177                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 178                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 179         }
 180         if (likely(tpa_start1->flags2 &
 181                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 182                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 183
 184         /* recycle next mbuf */
 185         data_cons = RING_NEXT(data_cons);
 186         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 187 }
 188
 189 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 190                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 191 {
 192         uint16_t last_cp_cons;
 193         struct rx_pkt_cmpl *agg_cmpl;
 194
 195         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 196         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 197         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 198         cpr->valid = FLIP_VALID(raw_cp_cons,
 199                                 cpr->cp_ring_struct->ring_mask,
 200                                 cpr->valid);
 201         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 202 }
 203
 204 /* TPA consume agg buffer out of order, allocate connected data only */
 205 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 206 {
 207         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 208         uint16_t raw_next = RING_NEXT(rxr->ag_raw_prod);
 209         uint16_t bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 210
 211         /* TODO batch allocation for better performance */
 212         while (rte_bitmap_get(rxr->ag_bitmap, bmap_next)) {
 213                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, raw_next))) {
 214                         PMD_DRV_LOG(ERR, "agg mbuf alloc failed: prod=0x%x\n",
 215                                     raw_next);
 216                         break;
 217                 }
 218                 rte_bitmap_clear(rxr->ag_bitmap, bmap_next);
 219                 rxr->ag_raw_prod = raw_next;
 220                 raw_next = RING_NEXT(raw_next);
 221                 bmap_next = RING_IDX(rxr->ag_ring_struct, raw_next);
 222         }
 223
 224         return 0;
 225 }
 226
 227 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 228                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 229                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 230 {
 231         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 232         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 233         int i;
 234         uint16_t cp_cons, ag_cons;
 235         struct rx_pkt_cmpl *rxcmp;
 236         struct rte_mbuf *last = mbuf;
 237         bool is_p5_tpa = tpa_info && BNXT_CHIP_P5(rxq->bp);
 238
 239         for (i = 0; i < agg_buf; i++) {
 240                 struct rte_mbuf **ag_buf;
 241                 struct rte_mbuf *ag_mbuf;
 242
 243                 if (is_p5_tpa) {
 244                         rxcmp = (void *)&tpa_info->agg_arr[i];
 245                 } else {
 246                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 247                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 248                         rxcmp = (struct rx_pkt_cmpl *)
 249                                         &cpr->cp_desc_ring[cp_cons];
 250                 }
 251
 252 #ifdef BNXT_DEBUG
 253                 bnxt_dump_cmpl(cp_cons, rxcmp);
 254 #endif
 255
 256                 ag_cons = rxcmp->opaque;
 257                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 258                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 259                 ag_mbuf = *ag_buf;
 260                 RTE_ASSERT(ag_mbuf != NULL);
 261
 262                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 263
 264                 mbuf->nb_segs++;
 265                 mbuf->pkt_len += ag_mbuf->data_len;
 266
 267                 last->next = ag_mbuf;
 268                 last = ag_mbuf;
 269
 270                 *ag_buf = NULL;
 271
 272                 /*
 273                  * As aggregation buffer consumed out of order in TPA module,
 274                  * use bitmap to track freed slots to be allocated and notified
 275                  * to NIC
 276                  */
 277                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 278         }
 279         bnxt_prod_ag_mbuf(rxq);
 280         return 0;
 281 }
 282
 283 static inline struct rte_mbuf *bnxt_tpa_end(
 284                 struct bnxt_rx_queue *rxq,
 285                 uint32_t *raw_cp_cons,
 286                 struct rx_tpa_end_cmpl *tpa_end,
 287                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 288 {
 289         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 290         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 291         uint16_t agg_id;
 292         struct rte_mbuf *mbuf;
 293         uint8_t agg_bufs;
 294         uint8_t payload_offset;
 295         struct bnxt_tpa_info *tpa_info;
 296
 297         if (BNXT_CHIP_P5(rxq->bp)) {
 298                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 299                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 300
 301                 th_tpa_end = (void *)tpa_end;
 302                 th_tpa_end1 = (void *)tpa_end1;
 303                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 304                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 305                 payload_offset = th_tpa_end1->payload_offset;
 306         } else {
 307                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 308                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 309                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 310                         return NULL;
 311                 payload_offset = tpa_end->payload_offset;
 312         }
 313
 314         tpa_info = &rxr->tpa_info[agg_id];
 315         mbuf = tpa_info->mbuf;
 316         RTE_ASSERT(mbuf != NULL);
 317
 318         if (agg_bufs) {
 319                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 320         }
 321         mbuf->l4_len = payload_offset;
 322
 323         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 324         RTE_ASSERT(new_data != NULL);
 325         if (!new_data) {
 326                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 327                 return NULL;
 328         }
 329         tpa_info->mbuf = new_data;
 330
 331         return mbuf;
 332 }
 333
 334 uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
 335
 336 static void __rte_cold
 337 bnxt_init_ptype_table(void)
 338 {
 339         uint32_t *pt = bnxt_ptype_table;
 340         static bool initialized;
 341         int ip6, tun, type;
 342         uint32_t l3;
 343         int i;
 344
 345         if (initialized)
 346                 return;
 347
 348         for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
 349                 if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
 350                         pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
 351                 else
 352                         pt[i] = RTE_PTYPE_L2_ETHER;
 353
 354                 ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
 355                 tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
 356                 type = (i & 0x38) << 9;
 357
 358                 if (!tun && !ip6)
 359                         l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 360                 else if (!tun && ip6)
 361                         l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 362                 else if (tun && !ip6)
 363                         l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 364                 else
 365                         l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 366
 367                 switch (type) {
 368                 case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
 369                         if (tun)
 370                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 371                         else
 372                                 pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
 373                         break;
 374                 case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
 375                         if (tun)
 376                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
 377                         else
 378                                 pt[i] |= l3 | RTE_PTYPE_L4_TCP;
 379                         break;
 380                 case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
 381                         if (tun)
 382                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
 383                         else
 384                                 pt[i] |= l3 | RTE_PTYPE_L4_UDP;
 385                         break;
 386                 case RX_PKT_CMPL_FLAGS_ITYPE_IP:
 387                         pt[i] |= l3;
 388                         break;
 389                 }
 390         }
 391         initialized = true;
 392 }
 393
 394 static uint32_t
 395 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 396 {
 397         uint32_t flags_type, flags2;
 398         uint8_t index;
 399
 400         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 401         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 402
 403         /*
 404          * Index format:
 405          *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
 406          *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
 407          *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
 408          *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
 409          */
 410         index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
 411                 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
 412                            RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
 413                 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
 414
 415         return bnxt_ptype_table[index];
 416 }
 417
 418 static void __rte_cold
 419 bnxt_init_ol_flags_tables(struct bnxt_rx_ring_info *rxr)
 420 {
 421         uint32_t *pt;
 422         int i;
 423
 424         /* Initialize ol_flags table. */
 425         pt = rxr->ol_flags_table;
 426         for (i = 0; i < BNXT_OL_FLAGS_TBL_DIM; i++) {
 427                 pt[i] = 0;
 428                 if (i & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN)
 429                         pt[i] |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 430
 431                 if (i & RX_PKT_CMPL_FLAGS2_IP_CS_CALC)
 432                         pt[i] |= PKT_RX_IP_CKSUM_GOOD;
 433
 434                 if (i & RX_PKT_CMPL_FLAGS2_L4_CS_CALC)
 435                         pt[i] |= PKT_RX_L4_CKSUM_GOOD;
 436
 437                 if (i & RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
 438                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 439         }
 440
 441         /* Initialize checksum error table. */
 442         pt = rxr->ol_flags_err_table;
 443         for (i = 0; i < BNXT_OL_FLAGS_ERR_TBL_DIM; i++) {
 444                 pt[i] = 0;
 445                 if (i & (RX_PKT_CMPL_ERRORS_IP_CS_ERROR >> 4))
 446                         pt[i] |= PKT_RX_IP_CKSUM_BAD;
 447
 448                 if (i & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR >> 4))
 449                         pt[i] |= PKT_RX_L4_CKSUM_BAD;
 450
 451                 if (i & (RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR >> 4))
 452                         pt[i] |= PKT_RX_EIP_CKSUM_BAD;
 453
 454                 if (i & (RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR >> 4))
 455                         pt[i] |= PKT_RX_OUTER_L4_CKSUM_BAD;
 456         }
 457 }
 458
 459 static void
 460 bnxt_set_ol_flags(struct bnxt_rx_ring_info *rxr, struct rx_pkt_cmpl *rxcmp,
 461                   struct rx_pkt_cmpl_hi *rxcmp1, struct rte_mbuf *mbuf)
 462 {
 463         uint16_t flags_type, errors, flags;
 464         uint64_t ol_flags;
 465
 466         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 467
 468         flags = rte_le_to_cpu_32(rxcmp1->flags2) &
 469                                 (RX_PKT_CMPL_FLAGS2_IP_CS_CALC |
 470                                  RX_PKT_CMPL_FLAGS2_L4_CS_CALC |
 471                                  RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC |
 472                                  RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC |
 473                                  RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN);
 474
 475         errors = rte_le_to_cpu_16(rxcmp1->errors_v2) &
 476                                 (RX_PKT_CMPL_ERRORS_IP_CS_ERROR |
 477                                  RX_PKT_CMPL_ERRORS_L4_CS_ERROR |
 478                                  RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR |
 479                                  RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR);
 480         errors = (errors >> 4) & flags;
 481
 482         ol_flags = rxr->ol_flags_table[flags & ~errors];
 483
 484         if (errors)
 485                 ol_flags |= rxr->ol_flags_err_table[errors];
 486
 487         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 488                 mbuf->hash.rss = rte_le_to_cpu_32(rxcmp->rss_hash);
 489                 ol_flags |= PKT_RX_RSS_HASH;
 490         }
 491
 492         mbuf->ol_flags = ol_flags;
 493 }
 494
 495 #ifdef RTE_LIBRTE_IEEE1588
 496 static void
 497 bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
 498 {
 499         uint64_t systime_cycles = 0;
 500
 501         if (!BNXT_CHIP_P5(bp))
 502                 return;
 503
 504         /* On Thor, Rx timestamps are provided directly in the
 505          * Rx completion records to the driver. Only 32 bits of
 506          * the timestamp is present in the completion. Driver needs
 507          * to read the current 48 bit free running timer using the
 508          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 509          * from the HWRM response with the lower 32 bits in the
 510          * Rx completion to produce the 48 bit timestamp for the Rx packet
 511          */
 512         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 513                                 &systime_cycles);
 514         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 515         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 516 }
 517 #endif
 518
 519 static uint32_t
 520 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 521                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
 522 {
 523         uint32_t cfa_code;
 524         uint32_t meta_fmt;
 525         uint32_t meta;
 526         bool gfid = false;
 527         uint32_t mark_id;
 528         uint32_t flags2;
 529         uint32_t gfid_support = 0;
 530         int rc;
 531
 532         if (BNXT_GFID_ENABLED(bp))
 533                 gfid_support = 1;
 534
 535         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 536         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 537         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 538
 539         /*
 540          * The flags field holds extra bits of info from [6:4]
 541          * which indicate if the flow is in TCAM or EM or EEM
 542          */
 543         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 544                 BNXT_CFA_META_FMT_SHFT;
 545
 546         switch (meta_fmt) {
 547         case 0:
 548                 if (gfid_support) {
 549                         /* Not an LFID or GFID, a flush cmd. */
 550                         goto skip_mark;
 551                 } else {
 552                         /* LFID mode, no vlan scenario */
 553                         gfid = false;
 554                 }
 555                 break;
 556         case 4:
 557         case 5:
 558                 /*
 559                  * EM/TCAM case
 560                  * Assume that EM doesn't support Mark due to GFID
 561                  * collisions with EEM.  Simply return without setting the mark
 562                  * in the mbuf.
 563                  */
 564                 if (BNXT_CFA_META_EM_TEST(meta)) {
 565                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 566                         gfid = true;
 567                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 568                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 569                 } else {
 570                         /*
 571                          * It is a TCAM entry, so it is an LFID.
 572                          * The TCAM IDX and Mode can also be determined
 573                          * by decoding the meta_data. We are not
 574                          * using these for now.
 575                          */
 576                 }
 577                 break;
 578         case 6:
 579         case 7:
 580                 /* EEM Case, only using gfid in EEM for now. */
 581                 gfid = true;
 582
 583                 /*
 584                  * For EEM flows, The first part of cfa_code is 16 bits.
 585                  * The second part is embedded in the
 586                  * metadata field from bit 19 onwards. The driver needs to
 587                  * ignore the first 19 bits of metadata and use the next 12
 588                  * bits as higher 12 bits of cfa_code.
 589                  */
 590                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 591                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 592                 break;
 593         default:
 594                 /* For other values, the cfa_code is assumed to be an LFID. */
 595                 break;
 596         }
 597
 598         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 599                                   cfa_code, vfr_flag, &mark_id);
 600         if (!rc) {
 601                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
 602                 if (vfr_flag && *vfr_flag)
 603                         return mark_id;
 604                 /* Got the mark, write it to the mbuf and return */
 605                 mbuf->hash.fdir.hi = mark_id;
 606                 *bnxt_cfa_code_dynfield(mbuf) = cfa_code & 0xffffffffull;
 607                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 608                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 609                 return mark_id;
 610         }
 611
 612 skip_mark:
 613         mbuf->hash.fdir.hi = 0;
 614         mbuf->hash.fdir.id = 0;
 615
 616         return 0;
 617 }
 618
 619 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 620                            struct rx_pkt_cmpl_hi *rxcmp1,
 621                            struct rte_mbuf *mbuf)
 622 {
 623         uint32_t cfa_code = 0;
 624         uint8_t meta_fmt = 0;
 625         uint16_t flags2 = 0;
 626         uint32_t meta =  0;
 627
 628         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 629         if (!cfa_code)
 630                 return;
 631
 632         if (cfa_code && !bp->mark_table[cfa_code].valid)
 633                 return;
 634
 635         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 636         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 637         if (meta) {
 638                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 639
 640                 /* The flags field holds extra bits of info from [6:4]
 641                  * which indicate if the flow is in TCAM or EM or EEM
 642                  */
 643                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 644                            BNXT_CFA_META_FMT_SHFT;
 645
 646                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 647                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 648                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 649                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 650                  */
 651                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 652         }
 653
 654         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 655         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 656 }
 657
 658 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 659                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 660 {
 661         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 662         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 663         struct rx_pkt_cmpl *rxcmp;
 664         struct rx_pkt_cmpl_hi *rxcmp1;
 665         uint32_t tmp_raw_cons = *raw_cons;
 666         uint16_t cons, raw_prod, cp_cons =
 667             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 668         struct rte_mbuf *mbuf;
 669         int rc = 0;
 670         uint8_t agg_buf = 0;
 671         uint16_t cmp_type;
 672         uint32_t vfr_flag = 0, mark_id = 0;
 673         struct bnxt *bp = rxq->bp;
 674
 675         rxcmp = (struct rx_pkt_cmpl *)
 676             &cpr->cp_desc_ring[cp_cons];
 677
 678         cmp_type = CMP_TYPE(rxcmp);
 679
 680         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 681                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 682                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 683                 struct bnxt_tpa_info *tpa_info;
 684
 685                 tpa_info = &rxr->tpa_info[agg_id];
 686                 RTE_ASSERT(tpa_info->agg_count < 16);
 687                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 688                 rc = -EINVAL; /* Continue w/o new mbuf */
 689                 goto next_rx;
 690         }
 691
 692         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 693         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 694         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 695
 696         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 697                 return -EBUSY;
 698
 699         cpr->valid = FLIP_VALID(cp_cons,
 700                                 cpr->cp_ring_struct->ring_mask,
 701                                 cpr->valid);
 702
 703         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 704                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 705                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 706                 rc = -EINVAL; /* Continue w/o new mbuf */
 707                 goto next_rx;
 708         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 709                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 710                                    (struct rx_tpa_end_cmpl *)rxcmp,
 711                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 712                 if (unlikely(!mbuf))
 713                         return -EBUSY;
 714                 *rx_pkt = mbuf;
 715                 goto next_rx;
 716         } else if (cmp_type != 0x11) {
 717                 rc = -EINVAL;
 718                 goto next_rx;
 719         }
 720
 721         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 722                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 723         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 724                 return -EBUSY;
 725
 726         raw_prod = rxr->rx_raw_prod;
 727
 728         cons = rxcmp->opaque;
 729         mbuf = bnxt_consume_rx_buf(rxr, cons);
 730         if (mbuf == NULL)
 731                 return -EBUSY;
 732
 733         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 734         mbuf->nb_segs = 1;
 735         mbuf->next = NULL;
 736         mbuf->pkt_len = rxcmp->len;
 737         mbuf->data_len = mbuf->pkt_len;
 738         mbuf->port = rxq->port_id;
 739
 740         bnxt_set_ol_flags(rxr, rxcmp, rxcmp1, mbuf);
 741
 742 #ifdef RTE_LIBRTE_IEEE1588
 743         if (unlikely((rte_le_to_cpu_16(rxcmp->flags_type) &
 744                       RX_PKT_CMPL_FLAGS_MASK) ==
 745                       RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 746                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 747                 bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
 748         }
 749 #endif
 750
 751         if (BNXT_TRUFLOW_EN(bp))
 752                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
 753                                                     &vfr_flag);
 754         else
 755                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 756
 757         if (agg_buf)
 758                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 759
 760         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 761
 762 #ifdef BNXT_DEBUG
 763         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 764                 /* Re-install the mbuf back to the rx ring */
 765                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 766
 767                 rc = -EIO;
 768                 goto next_rx;
 769         }
 770 #endif
 771         /*
 772          * TODO: Redesign this....
 773          * If the allocation fails, the packet does not get received.
 774          * Simply returning this will result in slowly falling behind
 775          * on the producer ring buffers.
 776          * Instead, "filling up" the producer just before ringing the
 777          * doorbell could be a better solution since it will let the
 778          * producer ring starve until memory is available again pushing
 779          * the drops into hardware and getting them out of the driver
 780          * allowing recovery to a full producer ring.
 781          *
 782          * This could also help with cache usage by preventing per-packet
 783          * calls in favour of a tight loop with the same function being called
 784          * in it.
 785          */
 786         raw_prod = RING_NEXT(raw_prod);
 787         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod)) {
 788                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n",
 789                             raw_prod);
 790                 rc = -ENOMEM;
 791                 goto rx;
 792         }
 793         rxr->rx_raw_prod = raw_prod;
 794
 795         if (BNXT_TRUFLOW_EN(bp) && (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
 796             vfr_flag) {
 797                 bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf);
 798                 /* Now return an error so that nb_rx_pkts is not
 799                  * incremented.
 800                  * This packet was meant to be given to the representor.
 801                  * So no need to account the packet and give it to
 802                  * parent Rx burst function.
 803                  */
 804                 rc = -ENODEV;
 805                 goto next_rx;
 806         }
 807         /*
 808          * All MBUFs are allocated with the same size under DPDK,
 809          * no optimization for rx_copy_thresh
 810          */
 811 rx:
 812         *rx_pkt = mbuf;
 813
 814 next_rx:
 815
 816         *raw_cons = tmp_raw_cons;
 817
 818         return rc;
 819 }
 820
 821 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 822                                uint16_t nb_pkts)
 823 {
 824         struct bnxt_rx_queue *rxq = rx_queue;
 825         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 826         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 827         uint16_t rx_raw_prod = rxr->rx_raw_prod;
 828         uint16_t ag_raw_prod = rxr->ag_raw_prod;
 829         uint32_t raw_cons = cpr->cp_raw_cons;
 830         bool alloc_failed = false;
 831         uint32_t cons;
 832         int nb_rx_pkts = 0;
 833         int nb_rep_rx_pkts = 0;
 834         struct rx_pkt_cmpl *rxcmp;
 835         int rc = 0;
 836         bool evt = false;
 837
 838         if (unlikely(is_bnxt_in_error(rxq->bp)))
 839                 return 0;
 840
 841         /* If Rx Q was stopped return */
 842         if (unlikely(!rxq->rx_started))
 843                 return 0;
 844
 845 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 846         /*
 847          * Replenish buffers if needed when a transition has been made from
 848          * vector- to non-vector- receive processing.
 849          */
 850         while (unlikely(rxq->rxrearm_nb)) {
 851                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
 852                         rxr->rx_raw_prod = rxq->rxrearm_start;
 853                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 854                         rxq->rxrearm_start++;
 855                         rxq->rxrearm_nb--;
 856                 } else {
 857                         /* Retry allocation on next call. */
 858                         break;
 859                 }
 860         }
 861 #endif
 862
 863         /* Handle RX burst request */
 864         while (1) {
 865                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 866                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 867
 868                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 869                         break;
 870                 cpr->valid = FLIP_VALID(cons,
 871                                         cpr->cp_ring_struct->ring_mask,
 872                                         cpr->valid);
 873
 874                 /* TODO: Avoid magic numbers... */
 875                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 876                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 877                         if (!rc)
 878                                 nb_rx_pkts++;
 879                         else if (rc == -EBUSY)  /* partial completion */
 880                                 break;
 881                         else if (rc == -ENODEV) /* completion for representor */
 882                                 nb_rep_rx_pkts++;
 883                         else if (rc == -ENOMEM) {
 884                                 nb_rx_pkts++;
 885                                 alloc_failed = true;
 886                         }
 887                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 888                         evt =
 889                         bnxt_event_hwrm_resp_handler(rxq->bp,
 890                                                      (struct cmpl_base *)rxcmp);
 891                         /* If the async event is Fatal error, return */
 892                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 893                                 goto done;
 894                 }
 895
 896                 raw_cons = NEXT_RAW_CMP(raw_cons);
 897                 if (nb_rx_pkts == nb_pkts || nb_rep_rx_pkts == nb_pkts || evt)
 898                         break;
 899                 /* Post some Rx buf early in case of larger burst processing */
 900                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 901                         bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 902         }
 903
 904         cpr->cp_raw_cons = raw_cons;
 905         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
 906                 /*
 907                  * For PMD, there is no need to keep on pushing to REARM
 908                  * the doorbell if there are no new completions
 909                  */
 910                 goto done;
 911         }
 912
 913         /* Ring the completion queue doorbell. */
 914         bnxt_db_cq(cpr);
 915
 916         /* Ring the receive descriptor doorbell. */
 917         if (rx_raw_prod != rxr->rx_raw_prod)
 918                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 919
 920         /* Ring the AGG ring DB */
 921         if (ag_raw_prod != rxr->ag_raw_prod)
 922                 bnxt_db_write(&rxr->ag_db, rxr->ag_raw_prod);
 923
 924         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 925         if (alloc_failed) {
 926                 uint16_t cnt;
 927
 928                 rx_raw_prod = RING_NEXT(rx_raw_prod);
 929                 for (cnt = 0; cnt < nb_rx_pkts + nb_rep_rx_pkts; cnt++) {
 930                         struct rte_mbuf **rx_buf;
 931                         uint16_t ndx;
 932
 933                         ndx = RING_IDX(rxr->rx_ring_struct, rx_raw_prod + cnt);
 934                         rx_buf = &rxr->rx_buf_ring[ndx];
 935
 936                         /* Buffer already allocated for this index. */
 937                         if (*rx_buf != NULL && *rx_buf != &rxq->fake_mbuf)
 938                                 continue;
 939
 940                         /* This slot is empty. Alloc buffer for Rx */
 941                         if (!bnxt_alloc_rx_data(rxq, rxr, rx_raw_prod + cnt)) {
 942                                 rxr->rx_raw_prod = rx_raw_prod + cnt;
 943                                 bnxt_db_write(&rxr->rx_db, rxr->rx_raw_prod);
 944                         } else {
 945                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 946                                 break;
 947                         }
 948                 }
 949         }
 950
 951 done:
 952         return nb_rx_pkts;
 953 }
 954
 955 /*
 956  * Dummy DPDK callback for RX.
 957  *
 958  * This function is used to temporarily replace the real callback during
 959  * unsafe control operations on the queue, or in case of error.
 960  */
 961 uint16_t
 962 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 963                      struct rte_mbuf **rx_pkts __rte_unused,
 964                      uint16_t nb_pkts __rte_unused)
 965 {
 966         return 0;
 967 }
 968
 969 void bnxt_free_rx_rings(struct bnxt *bp)
 970 {
 971         int i;
 972         struct bnxt_rx_queue *rxq;
 973
 974         if (!bp->rx_queues)
 975                 return;
 976
 977         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 978                 rxq = bp->rx_queues[i];
 979                 if (!rxq)
 980                         continue;
 981
 982                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 983                 rte_free(rxq->rx_ring->rx_ring_struct);
 984
 985                 /* Free the Aggregator ring */
 986                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 987                 rte_free(rxq->rx_ring->ag_ring_struct);
 988                 rxq->rx_ring->ag_ring_struct = NULL;
 989
 990                 rte_free(rxq->rx_ring);
 991
 992                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 993                 rte_free(rxq->cp_ring->cp_ring_struct);
 994                 rte_free(rxq->cp_ring);
 995
 996                 rte_free(rxq);
 997                 bp->rx_queues[i] = NULL;
 998         }
 999 }
1000
1001 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
1002 {
1003         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
1004         struct rte_eth_rxmode *rxmode;
1005         struct bnxt_cp_ring_info *cpr;
1006         struct bnxt_rx_ring_info *rxr;
1007         struct bnxt_ring *ring;
1008         bool use_agg_ring;
1009
1010         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
1011
1012         rxr = rte_zmalloc_socket("bnxt_rx_ring",
1013                                  sizeof(struct bnxt_rx_ring_info),
1014                                  RTE_CACHE_LINE_SIZE, socket_id);
1015         if (rxr == NULL)
1016                 return -ENOMEM;
1017         rxq->rx_ring = rxr;
1018
1019         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1020                                    sizeof(struct bnxt_ring),
1021                                    RTE_CACHE_LINE_SIZE, socket_id);
1022         if (ring == NULL)
1023                 return -ENOMEM;
1024         rxr->rx_ring_struct = ring;
1025         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
1026         ring->ring_mask = ring->ring_size - 1;
1027         ring->bd = (void *)rxr->rx_desc_ring;
1028         ring->bd_dma = rxr->rx_desc_mapping;
1029
1030         /* Allocate extra rx ring entries for vector rx. */
1031         ring->vmem_size = sizeof(struct rte_mbuf *) *
1032                                 (ring->ring_size + RTE_BNXT_DESCS_PER_LOOP);
1033
1034         ring->vmem = (void **)&rxr->rx_buf_ring;
1035         ring->fw_ring_id = INVALID_HW_RING_ID;
1036
1037         cpr = rte_zmalloc_socket("bnxt_rx_ring",
1038                                  sizeof(struct bnxt_cp_ring_info),
1039                                  RTE_CACHE_LINE_SIZE, socket_id);
1040         if (cpr == NULL)
1041                 return -ENOMEM;
1042         rxq->cp_ring = cpr;
1043
1044         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1045                                    sizeof(struct bnxt_ring),
1046                                    RTE_CACHE_LINE_SIZE, socket_id);
1047         if (ring == NULL)
1048                 return -ENOMEM;
1049         cpr->cp_ring_struct = ring;
1050
1051         rxmode = &eth_dev->data->dev_conf.rxmode;
1052         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
1053                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
1054                        (rxmode->max_rx_pkt_len >
1055                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
1056                                     RTE_PKTMBUF_HEADROOM));
1057
1058         /* Allocate two completion slots per entry in desc ring. */
1059         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
1060
1061         /* Allocate additional slots if aggregation ring is in use. */
1062         if (use_agg_ring)
1063                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
1064
1065         ring->ring_size = rte_align32pow2(ring->ring_size);
1066         ring->ring_mask = ring->ring_size - 1;
1067         ring->bd = (void *)cpr->cp_desc_ring;
1068         ring->bd_dma = cpr->cp_desc_mapping;
1069         ring->vmem_size = 0;
1070         ring->vmem = NULL;
1071         ring->fw_ring_id = INVALID_HW_RING_ID;
1072
1073         /* Allocate Aggregator rings */
1074         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1075                                    sizeof(struct bnxt_ring),
1076                                    RTE_CACHE_LINE_SIZE, socket_id);
1077         if (ring == NULL)
1078                 return -ENOMEM;
1079         rxr->ag_ring_struct = ring;
1080         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1081                                           AGG_RING_SIZE_FACTOR);
1082         ring->ring_mask = ring->ring_size - 1;
1083         ring->bd = (void *)rxr->ag_desc_ring;
1084         ring->bd_dma = rxr->ag_desc_mapping;
1085         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1086         ring->vmem = (void **)&rxr->ag_buf_ring;
1087         ring->fw_ring_id = INVALID_HW_RING_ID;
1088
1089         return 0;
1090 }
1091
1092 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1093                             uint16_t len)
1094 {
1095         uint32_t j;
1096         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1097
1098         if (!rx_bd_ring)
1099                 return;
1100         for (j = 0; j < ring->ring_size; j++) {
1101                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1102                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1103                 rx_bd_ring[j].opaque = j;
1104         }
1105 }
1106
1107 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1108 {
1109         struct bnxt_rx_ring_info *rxr;
1110         struct bnxt_ring *ring;
1111         uint32_t raw_prod, type;
1112         unsigned int i;
1113         uint16_t size;
1114
1115         /* Initialize packet type table. */
1116         bnxt_init_ptype_table();
1117
1118         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1119         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1120
1121         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
1122
1123         rxr = rxq->rx_ring;
1124         ring = rxr->rx_ring_struct;
1125         bnxt_init_rxbds(ring, type, size);
1126
1127         /* Initialize offload flags parsing table. */
1128         bnxt_init_ol_flags_tables(rxr);
1129
1130         raw_prod = rxr->rx_raw_prod;
1131         for (i = 0; i < ring->ring_size; i++) {
1132                 if (unlikely(!rxr->rx_buf_ring[i])) {
1133                         if (bnxt_alloc_rx_data(rxq, rxr, raw_prod) != 0) {
1134                                 PMD_DRV_LOG(WARNING,
1135                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1136                                             rxq->queue_id, i, ring->ring_size);
1137                                 break;
1138                         }
1139                 }
1140                 rxr->rx_raw_prod = raw_prod;
1141                 raw_prod = RING_NEXT(raw_prod);
1142         }
1143
1144         /* Initialize dummy mbuf pointers for vector mode rx. */
1145         for (i = ring->ring_size;
1146              i < ring->ring_size + RTE_BNXT_DESCS_PER_LOOP; i++) {
1147                 rxr->rx_buf_ring[i] = &rxq->fake_mbuf;
1148         }
1149
1150         ring = rxr->ag_ring_struct;
1151         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1152         bnxt_init_rxbds(ring, type, size);
1153         raw_prod = rxr->ag_raw_prod;
1154
1155         for (i = 0; i < ring->ring_size; i++) {
1156                 if (unlikely(!rxr->ag_buf_ring[i])) {
1157                         if (bnxt_alloc_ag_data(rxq, rxr, raw_prod) != 0) {
1158                                 PMD_DRV_LOG(WARNING,
1159                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1160                                             rxq->queue_id, i, ring->ring_size);
1161                                 break;
1162                         }
1163                 }
1164                 rxr->ag_raw_prod = raw_prod;
1165                 raw_prod = RING_NEXT(raw_prod);
1166         }
1167         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1168
1169         if (rxr->tpa_info) {
1170                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1171
1172                 for (i = 0; i < max_aggs; i++) {
1173                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1174                                 rxr->tpa_info[i].mbuf =
1175                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1176                                 if (!rxr->tpa_info[i].mbuf) {
1177                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1178                                         return -ENOMEM;
1179                                 }
1180                         }
1181                 }
1182         }
1183         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1184
1185         return 0;
1186 }