drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_reps.h"
  16 #include "bnxt_ring.h"
  17 #include "bnxt_rxr.h"
  18 #include "bnxt_rxq.h"
  19 #include "hsi_struct_def_dpdk.h"
  20 #ifdef RTE_LIBRTE_IEEE1588
  21 #include "bnxt_hwrm.h"
  22 #endif
  23
  24 #include <bnxt_tf_common.h>
  25 #include <ulp_mark_mgr.h>
  26
  27 /*
  28  * RX Ring handling
  29  */
  30
  31 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  32 {
  33         struct rte_mbuf *data;
  34
  35         data = rte_mbuf_raw_alloc(mb);
  36
  37         return data;
  38 }
  39
  40 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  41                                      struct bnxt_rx_ring_info *rxr,
  42                                      uint16_t prod)
  43 {
  44         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
  45         struct rte_mbuf **rx_buf = &rxr->rx_buf_ring[prod];
  46         struct rte_mbuf *mbuf;
  47
  48         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  49         if (!mbuf) {
  50                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  51                 return -ENOMEM;
  52         }
  53
  54         *rx_buf = mbuf;
  55         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  56
  57         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  58
  59         return 0;
  60 }
  61
  62 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  63                                      struct bnxt_rx_ring_info *rxr,
  64                                      uint16_t prod)
  65 {
  66         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
  67         struct rte_mbuf **rx_buf = &rxr->ag_buf_ring[prod];
  68         struct rte_mbuf *mbuf;
  69
  70         if (rxbd == NULL) {
  71                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  72                 return -EINVAL;
  73         }
  74
  75         if (rx_buf == NULL) {
  76                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  77                 return -EINVAL;
  78         }
  79
  80         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  81         if (!mbuf) {
  82                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  83                 return -ENOMEM;
  84         }
  85
  86         *rx_buf = mbuf;
  87         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  88
  89         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  90
  91         return 0;
  92 }
  93
  94 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
  95                                struct rte_mbuf *mbuf)
  96 {
  97         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
  98         struct rte_mbuf **prod_rx_buf;
  99         struct rx_prod_pkt_bd *prod_bd;
 100
 101         prod_rx_buf = &rxr->rx_buf_ring[prod];
 102
 103         RTE_ASSERT(*prod_rx_buf == NULL);
 104         RTE_ASSERT(mbuf != NULL);
 105
 106         *prod_rx_buf = mbuf;
 107
 108         prod_bd = &rxr->rx_desc_ring[prod];
 109
 110         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 111
 112         rxr->rx_prod = prod;
 113 }
 114
 115 static inline
 116 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 117                                      uint16_t cons)
 118 {
 119         struct rte_mbuf **cons_rx_buf;
 120         struct rte_mbuf *mbuf;
 121
 122         cons_rx_buf = &rxr->rx_buf_ring[cons];
 123         RTE_ASSERT(*cons_rx_buf != NULL);
 124         mbuf = *cons_rx_buf;
 125         *cons_rx_buf = NULL;
 126
 127         return mbuf;
 128 }
 129
 130 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 131                            struct rx_tpa_start_cmpl *tpa_start,
 132                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 133 {
 134         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 135         uint16_t agg_id;
 136         uint16_t data_cons;
 137         struct bnxt_tpa_info *tpa_info;
 138         struct rte_mbuf *mbuf;
 139
 140         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 141
 142         data_cons = tpa_start->opaque;
 143         tpa_info = &rxr->tpa_info[agg_id];
 144
 145         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 146
 147         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 148
 149         tpa_info->agg_count = 0;
 150         tpa_info->mbuf = mbuf;
 151         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 152
 153         mbuf->nb_segs = 1;
 154         mbuf->next = NULL;
 155         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 156         mbuf->data_len = mbuf->pkt_len;
 157         mbuf->port = rxq->port_id;
 158         mbuf->ol_flags = PKT_RX_LRO;
 159         if (likely(tpa_start->flags_type &
 160                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 161                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 162                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 163         } else {
 164                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 165                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 166         }
 167         if (tpa_start1->flags2 &
 168             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 169                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 170                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 171         }
 172         if (likely(tpa_start1->flags2 &
 173                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 174                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 175
 176         /* recycle next mbuf */
 177         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
 178         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 179 }
 180
 181 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 182                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 183 {
 184         uint16_t last_cp_cons;
 185         struct rx_pkt_cmpl *agg_cmpl;
 186
 187         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 188         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 189         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 190         cpr->valid = FLIP_VALID(raw_cp_cons,
 191                                 cpr->cp_ring_struct->ring_mask,
 192                                 cpr->valid);
 193         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 194 }
 195
 196 /* TPA consume agg buffer out of order, allocate connected data only */
 197 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 198 {
 199         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 200         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
 201
 202         /* TODO batch allocation for better performance */
 203         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
 204                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
 205                         PMD_DRV_LOG(ERR,
 206                                 "agg mbuf alloc failed: prod=0x%x\n", next);
 207                         break;
 208                 }
 209                 rte_bitmap_clear(rxr->ag_bitmap, next);
 210                 rxr->ag_prod = next;
 211                 next = RING_NEXT(rxr->ag_ring_struct, next);
 212         }
 213
 214         return 0;
 215 }
 216
 217 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 218                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 219                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 220 {
 221         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 222         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 223         int i;
 224         uint16_t cp_cons, ag_cons;
 225         struct rx_pkt_cmpl *rxcmp;
 226         struct rte_mbuf *last = mbuf;
 227         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
 228
 229         for (i = 0; i < agg_buf; i++) {
 230                 struct rte_mbuf **ag_buf;
 231                 struct rte_mbuf *ag_mbuf;
 232
 233                 if (is_thor_tpa) {
 234                         rxcmp = (void *)&tpa_info->agg_arr[i];
 235                 } else {
 236                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 237                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 238                         rxcmp = (struct rx_pkt_cmpl *)
 239                                         &cpr->cp_desc_ring[cp_cons];
 240                 }
 241
 242 #ifdef BNXT_DEBUG
 243                 bnxt_dump_cmpl(cp_cons, rxcmp);
 244 #endif
 245
 246                 ag_cons = rxcmp->opaque;
 247                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 248                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 249                 ag_mbuf = *ag_buf;
 250                 RTE_ASSERT(ag_mbuf != NULL);
 251
 252                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 253
 254                 mbuf->nb_segs++;
 255                 mbuf->pkt_len += ag_mbuf->data_len;
 256
 257                 last->next = ag_mbuf;
 258                 last = ag_mbuf;
 259
 260                 *ag_buf = NULL;
 261
 262                 /*
 263                  * As aggregation buffer consumed out of order in TPA module,
 264                  * use bitmap to track freed slots to be allocated and notified
 265                  * to NIC
 266                  */
 267                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 268         }
 269         bnxt_prod_ag_mbuf(rxq);
 270         return 0;
 271 }
 272
 273 static inline struct rte_mbuf *bnxt_tpa_end(
 274                 struct bnxt_rx_queue *rxq,
 275                 uint32_t *raw_cp_cons,
 276                 struct rx_tpa_end_cmpl *tpa_end,
 277                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 278 {
 279         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 280         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 281         uint16_t agg_id;
 282         struct rte_mbuf *mbuf;
 283         uint8_t agg_bufs;
 284         uint8_t payload_offset;
 285         struct bnxt_tpa_info *tpa_info;
 286
 287         if (BNXT_CHIP_THOR(rxq->bp)) {
 288                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 289                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 290
 291                 th_tpa_end = (void *)tpa_end;
 292                 th_tpa_end1 = (void *)tpa_end1;
 293                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 294                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 295                 payload_offset = th_tpa_end1->payload_offset;
 296         } else {
 297                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 298                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 299                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 300                         return NULL;
 301                 payload_offset = tpa_end->payload_offset;
 302         }
 303
 304         tpa_info = &rxr->tpa_info[agg_id];
 305         mbuf = tpa_info->mbuf;
 306         RTE_ASSERT(mbuf != NULL);
 307
 308         rte_prefetch0(mbuf);
 309         if (agg_bufs) {
 310                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 311         }
 312         mbuf->l4_len = payload_offset;
 313
 314         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 315         RTE_ASSERT(new_data != NULL);
 316         if (!new_data) {
 317                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 318                 return NULL;
 319         }
 320         tpa_info->mbuf = new_data;
 321
 322         return mbuf;
 323 }
 324
 325 uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
 326
 327 static void __rte_cold
 328 bnxt_init_ptype_table(void)
 329 {
 330         uint32_t *pt = bnxt_ptype_table;
 331         static bool initialized;
 332         int ip6, tun, type;
 333         uint32_t l3;
 334         int i;
 335
 336         if (initialized)
 337                 return;
 338
 339         for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
 340                 if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
 341                         pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
 342                 else
 343                         pt[i] = RTE_PTYPE_L2_ETHER;
 344
 345                 ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
 346                 tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
 347                 type = (i & 0x38) << 9;
 348
 349                 if (!tun && !ip6)
 350                         l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 351                 else if (!tun && ip6)
 352                         l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 353                 else if (tun && !ip6)
 354                         l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 355                 else
 356                         l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 357
 358                 switch (type) {
 359                 case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
 360                         if (tun)
 361                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 362                         else
 363                                 pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
 364                         break;
 365                 case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
 366                         if (tun)
 367                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
 368                         else
 369                                 pt[i] |= l3 | RTE_PTYPE_L4_TCP;
 370                         break;
 371                 case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
 372                         if (tun)
 373                                 pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
 374                         else
 375                                 pt[i] |= l3 | RTE_PTYPE_L4_UDP;
 376                         break;
 377                 case RX_PKT_CMPL_FLAGS_ITYPE_IP:
 378                         pt[i] |= l3;
 379                         break;
 380                 }
 381         }
 382         initialized = true;
 383 }
 384
 385 static uint32_t
 386 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 387 {
 388         uint32_t flags_type, flags2;
 389         uint8_t index;
 390
 391         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 392         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 393
 394         /*
 395          * Index format:
 396          *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
 397          *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
 398          *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
 399          *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
 400          */
 401         index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
 402                 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
 403                            RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
 404                 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
 405
 406         return bnxt_ptype_table[index];
 407 }
 408
 409 #ifdef RTE_LIBRTE_IEEE1588
 410 static void
 411 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
 412 {
 413         uint64_t systime_cycles = 0;
 414
 415         if (!BNXT_CHIP_THOR(bp))
 416                 return;
 417
 418         /* On Thor, Rx timestamps are provided directly in the
 419          * Rx completion records to the driver. Only 32 bits of
 420          * the timestamp is present in the completion. Driver needs
 421          * to read the current 48 bit free running timer using the
 422          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 423          * from the HWRM response with the lower 32 bits in the
 424          * Rx completion to produce the 48 bit timestamp for the Rx packet
 425          */
 426         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 427                                 &systime_cycles);
 428         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 429         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 430 }
 431 #endif
 432
 433 static uint32_t
 434 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 435                           struct rte_mbuf *mbuf, uint32_t *vfr_flag)
 436 {
 437         uint32_t cfa_code;
 438         uint32_t meta_fmt;
 439         uint32_t meta;
 440         bool gfid = false;
 441         uint32_t mark_id;
 442         uint32_t flags2;
 443         uint32_t gfid_support = 0;
 444         int rc;
 445
 446         if (BNXT_GFID_ENABLED(bp))
 447                 gfid_support = 1;
 448
 449         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 450         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 451         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 452
 453         /*
 454          * The flags field holds extra bits of info from [6:4]
 455          * which indicate if the flow is in TCAM or EM or EEM
 456          */
 457         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 458                 BNXT_CFA_META_FMT_SHFT;
 459
 460         switch (meta_fmt) {
 461         case 0:
 462                 if (gfid_support) {
 463                         /* Not an LFID or GFID, a flush cmd. */
 464                         goto skip_mark;
 465                 } else {
 466                         /* LFID mode, no vlan scenario */
 467                         gfid = false;
 468                 }
 469                 break;
 470         case 4:
 471         case 5:
 472                 /*
 473                  * EM/TCAM case
 474                  * Assume that EM doesn't support Mark due to GFID
 475                  * collisions with EEM.  Simply return without setting the mark
 476                  * in the mbuf.
 477                  */
 478                 if (BNXT_CFA_META_EM_TEST(meta)) {
 479                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 480                         gfid = true;
 481                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 482                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 483                 } else {
 484                         /*
 485                          * It is a TCAM entry, so it is an LFID.
 486                          * The TCAM IDX and Mode can also be determined
 487                          * by decoding the meta_data. We are not
 488                          * using these for now.
 489                          */
 490                 }
 491                 break;
 492         case 6:
 493         case 7:
 494                 /* EEM Case, only using gfid in EEM for now. */
 495                 gfid = true;
 496
 497                 /*
 498                  * For EEM flows, The first part of cfa_code is 16 bits.
 499                  * The second part is embedded in the
 500                  * metadata field from bit 19 onwards. The driver needs to
 501                  * ignore the first 19 bits of metadata and use the next 12
 502                  * bits as higher 12 bits of cfa_code.
 503                  */
 504                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 505                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 506                 break;
 507         default:
 508                 /* For other values, the cfa_code is assumed to be an LFID. */
 509                 break;
 510         }
 511
 512         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 513                                   cfa_code, vfr_flag, &mark_id);
 514         if (!rc) {
 515                 /* VF to VFR Rx path. So, skip mark_id injection in mbuf */
 516                 if (vfr_flag && *vfr_flag)
 517                         return mark_id;
 518                 /* Got the mark, write it to the mbuf and return */
 519                 mbuf->hash.fdir.hi = mark_id;
 520                 mbuf->udata64 = (cfa_code & 0xffffffffull) << 32;
 521                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 522                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 523                 return mark_id;
 524         }
 525
 526 skip_mark:
 527         mbuf->hash.fdir.hi = 0;
 528         mbuf->hash.fdir.id = 0;
 529
 530         return 0;
 531 }
 532
 533 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 534                            struct rx_pkt_cmpl_hi *rxcmp1,
 535                            struct rte_mbuf *mbuf)
 536 {
 537         uint32_t cfa_code = 0;
 538         uint8_t meta_fmt = 0;
 539         uint16_t flags2 = 0;
 540         uint32_t meta =  0;
 541
 542         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 543         if (!cfa_code)
 544                 return;
 545
 546         if (cfa_code && !bp->mark_table[cfa_code].valid)
 547                 return;
 548
 549         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 550         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 551         if (meta) {
 552                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 553
 554                 /* The flags field holds extra bits of info from [6:4]
 555                  * which indicate if the flow is in TCAM or EM or EEM
 556                  */
 557                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 558                            BNXT_CFA_META_FMT_SHFT;
 559
 560                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 561                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 562                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 563                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 564                  */
 565                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 566         }
 567
 568         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 569         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 570 }
 571
 572 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 573                        struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 574 {
 575         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 576         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 577         struct rx_pkt_cmpl *rxcmp;
 578         struct rx_pkt_cmpl_hi *rxcmp1;
 579         uint32_t tmp_raw_cons = *raw_cons;
 580         uint16_t cons, prod, cp_cons =
 581             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 582         struct rte_mbuf *mbuf;
 583         int rc = 0;
 584         uint8_t agg_buf = 0;
 585         uint16_t cmp_type;
 586         uint32_t flags2_f = 0, vfr_flag = 0, mark_id = 0;
 587         uint16_t flags_type;
 588         struct bnxt *bp = rxq->bp;
 589
 590         rxcmp = (struct rx_pkt_cmpl *)
 591             &cpr->cp_desc_ring[cp_cons];
 592
 593         cmp_type = CMP_TYPE(rxcmp);
 594
 595         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 596                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 597                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 598                 struct bnxt_tpa_info *tpa_info;
 599
 600                 tpa_info = &rxr->tpa_info[agg_id];
 601                 RTE_ASSERT(tpa_info->agg_count < 16);
 602                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 603                 rc = -EINVAL; /* Continue w/o new mbuf */
 604                 goto next_rx;
 605         }
 606
 607         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 608         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 609         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 610
 611         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 612                 return -EBUSY;
 613
 614         cpr->valid = FLIP_VALID(cp_cons,
 615                                 cpr->cp_ring_struct->ring_mask,
 616                                 cpr->valid);
 617
 618         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 619                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 620                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 621                 rc = -EINVAL; /* Continue w/o new mbuf */
 622                 goto next_rx;
 623         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 624                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 625                                    (struct rx_tpa_end_cmpl *)rxcmp,
 626                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 627                 if (unlikely(!mbuf))
 628                         return -EBUSY;
 629                 *rx_pkt = mbuf;
 630                 goto next_rx;
 631         } else if (cmp_type != 0x11) {
 632                 rc = -EINVAL;
 633                 goto next_rx;
 634         }
 635
 636         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 637                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 638         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 639                 return -EBUSY;
 640
 641         prod = rxr->rx_prod;
 642
 643         cons = rxcmp->opaque;
 644         mbuf = bnxt_consume_rx_buf(rxr, cons);
 645         if (mbuf == NULL)
 646                 return -EBUSY;
 647
 648         rte_prefetch0(mbuf);
 649
 650         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 651         mbuf->nb_segs = 1;
 652         mbuf->next = NULL;
 653         mbuf->pkt_len = rxcmp->len;
 654         mbuf->data_len = mbuf->pkt_len;
 655         mbuf->port = rxq->port_id;
 656         mbuf->ol_flags = 0;
 657
 658         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 659         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 660                 mbuf->hash.rss = rxcmp->rss_hash;
 661                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 662         }
 663
 664         if (BNXT_TRUFLOW_EN(bp))
 665                 mark_id = bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf,
 666                                                     &vfr_flag);
 667         else
 668                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 669
 670 #ifdef RTE_LIBRTE_IEEE1588
 671         if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
 672                      RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 673                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 674                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
 675         }
 676 #endif
 677         if (agg_buf)
 678                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 679
 680         if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
 681                 mbuf->vlan_tci = rxcmp1->metadata &
 682                         (RX_PKT_CMPL_METADATA_VID_MASK |
 683                         RX_PKT_CMPL_METADATA_DE |
 684                         RX_PKT_CMPL_METADATA_PRI_MASK);
 685                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 686         }
 687
 688         flags2_f = flags2_0xf(rxcmp1);
 689         /* IP Checksum */
 690         if (likely(IS_IP_NONTUNNEL_PKT(flags2_f))) {
 691                 if (unlikely(RX_CMP_IP_CS_ERROR(rxcmp1)))
 692                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 693                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 694                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 695                 else
 696                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 697         } else if (IS_IP_TUNNEL_PKT(flags2_f)) {
 698                 if (unlikely(RX_CMP_IP_OUTER_CS_ERROR(rxcmp1) ||
 699                              RX_CMP_IP_CS_ERROR(rxcmp1)))
 700                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 701                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 702                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 703                 else
 704                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 705         }
 706
 707         /* L4 Checksum */
 708         if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
 709                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 710                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 711                 else
 712                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 713         } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
 714                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 715                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 716                 else
 717                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 718                 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
 719                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 720                 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
 721                                     (flags2_f))) {
 722                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 723                 } else {
 724                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 725                 }
 726         } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
 727                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 728         }
 729
 730         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 731
 732 #ifdef BNXT_DEBUG
 733         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 734                 /* Re-install the mbuf back to the rx ring */
 735                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 736
 737                 rc = -EIO;
 738                 goto next_rx;
 739         }
 740 #endif
 741         /*
 742          * TODO: Redesign this....
 743          * If the allocation fails, the packet does not get received.
 744          * Simply returning this will result in slowly falling behind
 745          * on the producer ring buffers.
 746          * Instead, "filling up" the producer just before ringing the
 747          * doorbell could be a better solution since it will let the
 748          * producer ring starve until memory is available again pushing
 749          * the drops into hardware and getting them out of the driver
 750          * allowing recovery to a full producer ring.
 751          *
 752          * This could also help with cache usage by preventing per-packet
 753          * calls in favour of a tight loop with the same function being called
 754          * in it.
 755          */
 756         prod = RING_NEXT(rxr->rx_ring_struct, prod);
 757         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
 758                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
 759                 rc = -ENOMEM;
 760                 goto rx;
 761         }
 762         rxr->rx_prod = prod;
 763         /*
 764          * All MBUFs are allocated with the same size under DPDK,
 765          * no optimization for rx_copy_thresh
 766          */
 767 rx:
 768         *rx_pkt = mbuf;
 769
 770         if (BNXT_TRUFLOW_EN(bp) &&
 771             (BNXT_VF_IS_TRUSTED(bp) || BNXT_PF(bp)) &&
 772             vfr_flag) {
 773                 if (!bnxt_vfr_recv(mark_id, rxq->queue_id, mbuf)) {
 774                         /* Now return an error so that nb_rx_pkts is not
 775                          * incremented.
 776                          * This packet was meant to be given to the representor.
 777                          * So no need to account the packet and give it to
 778                          * parent Rx burst function.
 779                          */
 780                         rc = -ENODEV;
 781                 }
 782         }
 783
 784 next_rx:
 785
 786         *raw_cons = tmp_raw_cons;
 787
 788         return rc;
 789 }
 790
 791 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 792                                uint16_t nb_pkts)
 793 {
 794         struct bnxt_rx_queue *rxq = rx_queue;
 795         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 796         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 797         uint32_t raw_cons = cpr->cp_raw_cons;
 798         uint32_t cons;
 799         int nb_rx_pkts = 0;
 800         int nb_rep_rx_pkts = 0;
 801         struct rx_pkt_cmpl *rxcmp;
 802         uint16_t prod = rxr->rx_prod;
 803         uint16_t ag_prod = rxr->ag_prod;
 804         int rc = 0;
 805         bool evt = false;
 806
 807         if (unlikely(is_bnxt_in_error(rxq->bp)))
 808                 return 0;
 809
 810         /* If Rx Q was stopped return */
 811         if (unlikely(!rxq->rx_started ||
 812                      !rte_spinlock_trylock(&rxq->lock)))
 813                 return 0;
 814
 815 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 816         /*
 817          * Replenish buffers if needed when a transition has been made from
 818          * vector- to non-vector- receive processing.
 819          */
 820         while (unlikely(rxq->rxrearm_nb)) {
 821                 if (!bnxt_alloc_rx_data(rxq, rxr, rxq->rxrearm_start)) {
 822                         rxr->rx_prod = rxq->rxrearm_start;
 823                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 824                         rxq->rxrearm_start++;
 825                         rxq->rxrearm_nb--;
 826                 } else {
 827                         /* Retry allocation on next call. */
 828                         break;
 829                 }
 830         }
 831 #endif
 832
 833         /* Handle RX burst request */
 834         while (1) {
 835                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 836                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
 837                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 838
 839                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 840                         break;
 841                 cpr->valid = FLIP_VALID(cons,
 842                                         cpr->cp_ring_struct->ring_mask,
 843                                         cpr->valid);
 844
 845                 /* TODO: Avoid magic numbers... */
 846                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 847                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 848                         if (likely(!rc) || rc == -ENOMEM)
 849                                 nb_rx_pkts++;
 850                         if (rc == -EBUSY)       /* partial completion */
 851                                 break;
 852                         if (rc == -ENODEV)      /* completion for representor */
 853                                 nb_rep_rx_pkts++;
 854                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 855                         evt =
 856                         bnxt_event_hwrm_resp_handler(rxq->bp,
 857                                                      (struct cmpl_base *)rxcmp);
 858                         /* If the async event is Fatal error, return */
 859                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 860                                 goto done;
 861                 }
 862
 863                 raw_cons = NEXT_RAW_CMP(raw_cons);
 864                 if (nb_rx_pkts == nb_pkts || evt)
 865                         break;
 866                 /* Post some Rx buf early in case of larger burst processing */
 867                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 868                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 869         }
 870
 871         cpr->cp_raw_cons = raw_cons;
 872         if (!nb_rx_pkts && !nb_rep_rx_pkts && !evt) {
 873                 /*
 874                  * For PMD, there is no need to keep on pushing to REARM
 875                  * the doorbell if there are no new completions
 876                  */
 877                 goto done;
 878         }
 879
 880         if (prod != rxr->rx_prod)
 881                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 882
 883         /* Ring the AGG ring DB */
 884         if (ag_prod != rxr->ag_prod)
 885                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 886
 887         bnxt_db_cq(cpr);
 888
 889         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 890         if (rc == -ENOMEM) {
 891                 int i = RING_NEXT(rxr->rx_ring_struct, prod);
 892                 int cnt = nb_rx_pkts;
 893
 894                 for (; cnt;
 895                         i = RING_NEXT(rxr->rx_ring_struct, i), cnt--) {
 896                         struct rte_mbuf **rx_buf = &rxr->rx_buf_ring[i];
 897
 898                         /* Buffer already allocated for this index. */
 899                         if (*rx_buf != NULL)
 900                                 continue;
 901
 902                         /* This slot is empty. Alloc buffer for Rx */
 903                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
 904                                 rxr->rx_prod = i;
 905                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 906                         } else {
 907                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 908                                 break;
 909                         }
 910                 }
 911         }
 912
 913 done:
 914         rte_spinlock_unlock(&rxq->lock);
 915
 916         return nb_rx_pkts;
 917 }
 918
 919 /*
 920  * Dummy DPDK callback for RX.
 921  *
 922  * This function is used to temporarily replace the real callback during
 923  * unsafe control operations on the queue, or in case of error.
 924  */
 925 uint16_t
 926 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 927                      struct rte_mbuf **rx_pkts __rte_unused,
 928                      uint16_t nb_pkts __rte_unused)
 929 {
 930         return 0;
 931 }
 932
 933 void bnxt_free_rx_rings(struct bnxt *bp)
 934 {
 935         int i;
 936         struct bnxt_rx_queue *rxq;
 937
 938         if (!bp->rx_queues)
 939                 return;
 940
 941         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 942                 rxq = bp->rx_queues[i];
 943                 if (!rxq)
 944                         continue;
 945
 946                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 947                 rte_free(rxq->rx_ring->rx_ring_struct);
 948
 949                 /* Free the Aggregator ring */
 950                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 951                 rte_free(rxq->rx_ring->ag_ring_struct);
 952                 rxq->rx_ring->ag_ring_struct = NULL;
 953
 954                 rte_free(rxq->rx_ring);
 955
 956                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 957                 rte_free(rxq->cp_ring->cp_ring_struct);
 958                 rte_free(rxq->cp_ring);
 959
 960                 rte_free(rxq);
 961                 bp->rx_queues[i] = NULL;
 962         }
 963 }
 964
 965 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
 966 {
 967         struct rte_eth_dev *eth_dev = rxq->bp->eth_dev;
 968         struct rte_eth_rxmode *rxmode;
 969         struct bnxt_cp_ring_info *cpr;
 970         struct bnxt_rx_ring_info *rxr;
 971         struct bnxt_ring *ring;
 972         bool use_agg_ring;
 973
 974         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
 975
 976         rxr = rte_zmalloc_socket("bnxt_rx_ring",
 977                                  sizeof(struct bnxt_rx_ring_info),
 978                                  RTE_CACHE_LINE_SIZE, socket_id);
 979         if (rxr == NULL)
 980                 return -ENOMEM;
 981         rxq->rx_ring = rxr;
 982
 983         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 984                                    sizeof(struct bnxt_ring),
 985                                    RTE_CACHE_LINE_SIZE, socket_id);
 986         if (ring == NULL)
 987                 return -ENOMEM;
 988         rxr->rx_ring_struct = ring;
 989         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
 990         ring->ring_mask = ring->ring_size - 1;
 991         ring->bd = (void *)rxr->rx_desc_ring;
 992         ring->bd_dma = rxr->rx_desc_mapping;
 993         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
 994         ring->vmem = (void **)&rxr->rx_buf_ring;
 995         ring->fw_ring_id = INVALID_HW_RING_ID;
 996
 997         cpr = rte_zmalloc_socket("bnxt_rx_ring",
 998                                  sizeof(struct bnxt_cp_ring_info),
 999                                  RTE_CACHE_LINE_SIZE, socket_id);
1000         if (cpr == NULL)
1001                 return -ENOMEM;
1002         rxq->cp_ring = cpr;
1003
1004         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1005                                    sizeof(struct bnxt_ring),
1006                                    RTE_CACHE_LINE_SIZE, socket_id);
1007         if (ring == NULL)
1008                 return -ENOMEM;
1009         cpr->cp_ring_struct = ring;
1010
1011         rxmode = &eth_dev->data->dev_conf.rxmode;
1012         use_agg_ring = (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER) ||
1013                        (rxmode->offloads & DEV_RX_OFFLOAD_TCP_LRO) ||
1014                        (rxmode->max_rx_pkt_len >
1015                          (uint32_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -
1016                                     RTE_PKTMBUF_HEADROOM));
1017
1018         /* Allocate two completion slots per entry in desc ring. */
1019         ring->ring_size = rxr->rx_ring_struct->ring_size * 2;
1020
1021         /* Allocate additional slots if aggregation ring is in use. */
1022         if (use_agg_ring)
1023                 ring->ring_size *= AGG_RING_SIZE_FACTOR;
1024
1025         ring->ring_size = rte_align32pow2(ring->ring_size);
1026         ring->ring_mask = ring->ring_size - 1;
1027         ring->bd = (void *)cpr->cp_desc_ring;
1028         ring->bd_dma = cpr->cp_desc_mapping;
1029         ring->vmem_size = 0;
1030         ring->vmem = NULL;
1031         ring->fw_ring_id = INVALID_HW_RING_ID;
1032
1033         /* Allocate Aggregator rings */
1034         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
1035                                    sizeof(struct bnxt_ring),
1036                                    RTE_CACHE_LINE_SIZE, socket_id);
1037         if (ring == NULL)
1038                 return -ENOMEM;
1039         rxr->ag_ring_struct = ring;
1040         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
1041                                           AGG_RING_SIZE_FACTOR);
1042         ring->ring_mask = ring->ring_size - 1;
1043         ring->bd = (void *)rxr->ag_desc_ring;
1044         ring->bd_dma = rxr->ag_desc_mapping;
1045         ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *);
1046         ring->vmem = (void **)&rxr->ag_buf_ring;
1047         ring->fw_ring_id = INVALID_HW_RING_ID;
1048
1049         return 0;
1050 }
1051
1052 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
1053                             uint16_t len)
1054 {
1055         uint32_t j;
1056         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
1057
1058         if (!rx_bd_ring)
1059                 return;
1060         for (j = 0; j < ring->ring_size; j++) {
1061                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
1062                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
1063                 rx_bd_ring[j].opaque = j;
1064         }
1065 }
1066
1067 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
1068 {
1069         struct bnxt_rx_ring_info *rxr;
1070         struct bnxt_ring *ring;
1071         uint32_t prod, type;
1072         unsigned int i;
1073         uint16_t size;
1074
1075         /* Initialize packet type table. */
1076         bnxt_init_ptype_table();
1077
1078         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
1079         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
1080
1081         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
1082
1083         rxr = rxq->rx_ring;
1084         ring = rxr->rx_ring_struct;
1085         bnxt_init_rxbds(ring, type, size);
1086
1087         prod = rxr->rx_prod;
1088         for (i = 0; i < ring->ring_size; i++) {
1089                 if (unlikely(!rxr->rx_buf_ring[i])) {
1090                         if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
1091                                 PMD_DRV_LOG(WARNING,
1092                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1093                                             rxq->queue_id, i, ring->ring_size);
1094                                 break;
1095                         }
1096                 }
1097                 rxr->rx_prod = prod;
1098                 prod = RING_NEXT(rxr->rx_ring_struct, prod);
1099         }
1100
1101         ring = rxr->ag_ring_struct;
1102         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1103         bnxt_init_rxbds(ring, type, size);
1104         prod = rxr->ag_prod;
1105
1106         for (i = 0; i < ring->ring_size; i++) {
1107                 if (unlikely(!rxr->ag_buf_ring[i])) {
1108                         if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
1109                                 PMD_DRV_LOG(WARNING,
1110                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1111                                             rxq->queue_id, i, ring->ring_size);
1112                                 break;
1113                         }
1114                 }
1115                 rxr->ag_prod = prod;
1116                 prod = RING_NEXT(rxr->ag_ring_struct, prod);
1117         }
1118         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1119
1120         if (rxr->tpa_info) {
1121                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1122
1123                 for (i = 0; i < max_aggs; i++) {
1124                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1125                                 rxr->tpa_info[i].mbuf =
1126                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1127                                 if (!rxr->tpa_info[i].mbuf) {
1128                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1129                                         return -ENOMEM;
1130                                 }
1131                         }
1132                 }
1133         }
1134         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1135
1136         return 0;
1137 }