drivers/net/bnxt/bnxt_rxr.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2021 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_RXR_H_
   7 #define _BNXT_RXR_H_
   8 #include "hsi_struct_def_dpdk.h"
   9
  10 #define BNXT_TPA_START_AGG_ID_PRE_TH(cmp) \
  11         ((rte_le_to_cpu_16((cmp)->agg_id) & RX_TPA_START_CMPL_AGG_ID_MASK) >> \
  12          RX_TPA_START_CMPL_AGG_ID_SFT)
  13
  14 #define BNXT_TPA_START_AGG_ID_TH(cmp) \
  15         rte_le_to_cpu_16((cmp)->agg_id)
  16
  17 static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp,
  18                                              struct rx_tpa_start_cmpl *cmp)
  19 {
  20         if (BNXT_CHIP_P5(bp))
  21                 return BNXT_TPA_START_AGG_ID_TH(cmp);
  22         else
  23                 return BNXT_TPA_START_AGG_ID_PRE_TH(cmp);
  24 }
  25
  26 #define BNXT_TPA_END_AGG_BUFS(cmp) \
  27         (((cmp)->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) \
  28          >> RX_TPA_END_CMPL_AGG_BUFS_SFT)
  29
  30 #define BNXT_TPA_END_AGG_BUFS_TH(cmp) \
  31         ((cmp)->tpa_agg_bufs)
  32
  33 #define BNXT_TPA_END_AGG_ID(cmp) \
  34         (((cmp)->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >> \
  35          RX_TPA_END_CMPL_AGG_ID_SFT)
  36
  37 #define BNXT_TPA_END_AGG_ID_TH(cmp) \
  38         rte_le_to_cpu_16((cmp)->agg_id)
  39
  40 #define BNXT_RX_L2_AGG_BUFS(cmp) \
  41         (((cmp)->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK) >> \
  42                 RX_PKT_CMPL_AGG_BUFS_SFT)
  43
  44 /* Number of descriptors to process per inner loop in vector mode. */
  45 #define RTE_BNXT_DESCS_PER_LOOP         4U
  46
  47 #define BNXT_OL_FLAGS_TBL_DIM   64
  48 #define BNXT_OL_FLAGS_ERR_TBL_DIM 32
  49
  50 struct bnxt_tpa_info {
  51         struct rte_mbuf                 *mbuf;
  52         uint16_t                        len;
  53         uint32_t                        agg_count;
  54         struct rx_tpa_v2_abuf_cmpl      agg_arr[TPA_MAX_NUM_SEGS];
  55
  56         uint32_t                        rss_hash;
  57         uint32_t                        vlan;
  58         uint16_t                        cfa_code;
  59         uint8_t                         hash_valid:1;
  60         uint8_t                         vlan_valid:1;
  61         uint8_t                         cfa_code_valid:1;
  62         uint8_t                         l4_csum_valid:1;
  63 };
  64
  65 struct bnxt_rx_ring_info {
  66         uint16_t                rx_raw_prod;
  67         uint16_t                ag_raw_prod;
  68         uint16_t                rx_cons; /* Needed for representor */
  69         struct bnxt_db_info     rx_db;
  70         struct bnxt_db_info     ag_db;
  71
  72         struct rx_prod_pkt_bd   *rx_desc_ring;
  73         struct rx_prod_pkt_bd   *ag_desc_ring;
  74         struct rte_mbuf         **rx_buf_ring; /* sw ring */
  75         struct rte_mbuf         **ag_buf_ring; /* sw ring */
  76
  77         rte_iova_t              rx_desc_mapping;
  78         rte_iova_t              ag_desc_mapping;
  79
  80         struct bnxt_ring        *rx_ring_struct;
  81         struct bnxt_ring        *ag_ring_struct;
  82
  83         /*
  84          * To deal with out of order return from TPA, use free buffer indicator
  85          */
  86         struct rte_bitmap       *ag_bitmap;
  87
  88         struct bnxt_tpa_info *tpa_info;
  89
  90         uint32_t ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
  91         uint32_t ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];
  92 };
  93
  94 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
  95                                uint16_t nb_pkts);
  96 void bnxt_free_rx_rings(struct bnxt *bp);
  97 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);
  98 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
  99 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 100 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 101 int bnxt_flush_rx_cmp(struct bnxt_cp_ring_info *cpr);
 102
 103 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 104 uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 105                             uint16_t nb_pkts);
 106 int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
 107 #endif
 108
 109 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 110                            struct rx_pkt_cmpl_hi *rxcmp1,
 111                            struct rte_mbuf *mbuf);
 112
 113 typedef uint32_t bnxt_cfa_code_dynfield_t;
 114 extern int bnxt_cfa_code_dynfield_offset;
 115
 116 static inline bnxt_cfa_code_dynfield_t *
 117 bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
 118 {
 119         return RTE_MBUF_DYNFIELD(mbuf,
 120                 bnxt_cfa_code_dynfield_offset, bnxt_cfa_code_dynfield_t *);
 121 }
 122
 123 #define BNXT_RX_META_CFA_CODE_SHIFT             19
 124 #define BNXT_CFA_CODE_META_SHIFT                16
 125 #define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT   0x8000000
 126 #define BNXT_RX_META_CFA_CODE_EEM_BIT           0x4000000
 127 #define BNXT_CFA_META_FMT_MASK                  0x70
 128 #define BNXT_CFA_META_FMT_SHFT                  4
 129 #define BNXT_CFA_META_FMT_EM_EEM_SHFT           1
 130 #define BNXT_CFA_META_FMT_EEM                   3
 131 #define BNXT_CFA_META_EEM_TCAM_SHIFT            31
 132 #define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
 133
 134 /* Definitions for translation of hardware packet type to mbuf ptype. */
 135 #define BNXT_PTYPE_TBL_DIM              128
 136 #define BNXT_PTYPE_TBL_TUN_SFT          0 /* Set if tunneled packet. */
 137 #define BNXT_PTYPE_TBL_TUN_MSK          BIT(BNXT_PTYPE_TBL_TUN_SFT)
 138 #define BNXT_PTYPE_TBL_IP_VER_SFT       1 /* Set if IPv6, clear if IPv4. */
 139 #define BNXT_PTYPE_TBL_IP_VER_MSK       BIT(BNXT_PTYPE_TBL_IP_VER_SFT)
 140 #define BNXT_PTYPE_TBL_VLAN_SFT         2 /* Set if VLAN encapsulated. */
 141 #define BNXT_PTYPE_TBL_VLAN_MSK         BIT(BNXT_PTYPE_TBL_VLAN_SFT)
 142 #define BNXT_PTYPE_TBL_TYPE_SFT         3 /* Hardware packet type field. */
 143 #define BNXT_PTYPE_TBL_TYPE_MSK         0x78 /* Hardware itype field mask. */
 144 #define BNXT_PTYPE_TBL_TYPE_IP          1
 145 #define BNXT_PTYPE_TBL_TYPE_TCP         2
 146 #define BNXT_PTYPE_TBL_TYPE_UDP         3
 147 #define BNXT_PTYPE_TBL_TYPE_ICMP        7
 148
 149 #define RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT  8
 150 #define CMPL_FLAGS2_VLAN_TUN_MSK \
 151         (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN | RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)
 152
 153 #define BNXT_CMPL_ITYPE_TO_IDX(ft) \
 154         (((ft) & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> \
 155           (RX_PKT_CMPL_FLAGS_ITYPE_SFT - BNXT_PTYPE_TBL_TYPE_SFT))
 156
 157 #define BNXT_CMPL_VLAN_TUN_TO_IDX(f2) \
 158         (((f2) & CMPL_FLAGS2_VLAN_TUN_MSK) >> \
 159          (RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT - BNXT_PTYPE_TBL_VLAN_SFT))
 160
 161 #define BNXT_CMPL_IP_VER_TO_IDX(f2) \
 162         (((f2) & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> \
 163          (RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT - BNXT_PTYPE_TBL_IP_VER_SFT))
 164
 165 static inline void
 166 bnxt_check_ptype_constants(void)
 167 {
 168         RTE_BUILD_BUG_ON(BNXT_CMPL_ITYPE_TO_IDX(RX_PKT_CMPL_FLAGS_ITYPE_MASK) !=
 169                          BNXT_PTYPE_TBL_TYPE_MSK);
 170         RTE_BUILD_BUG_ON(BNXT_CMPL_VLAN_TUN_TO_IDX(CMPL_FLAGS2_VLAN_TUN_MSK) !=
 171                          (BNXT_PTYPE_TBL_VLAN_MSK | BNXT_PTYPE_TBL_TUN_MSK));
 172         RTE_BUILD_BUG_ON(BNXT_CMPL_IP_VER_TO_IDX(RX_PKT_CMPL_FLAGS2_IP_TYPE) !=
 173                          BNXT_PTYPE_TBL_IP_VER_MSK);
 174 }
 175
 176 extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
 177
 178 /* Stingray2 specific code for RX completion parsing */
 179 #define RX_CMP_VLAN_VALID(rxcmp)        \
 180         (((struct rx_pkt_v2_cmpl *)rxcmp)->metadata1_payload_offset &   \
 181          RX_PKT_V2_CMPL_METADATA1_VALID)
 182
 183 #define RX_CMP_METADATA0_VID(rxcmp1)                            \
 184         ((((struct rx_pkt_v2_cmpl_hi *)rxcmp1)->metadata0) &    \
 185          (RX_PKT_V2_CMPL_HI_METADATA0_VID_MASK |                \
 186           RX_PKT_V2_CMPL_HI_METADATA0_DE  |                     \
 187           RX_PKT_V2_CMPL_HI_METADATA0_PRI_MASK))
 188
 189 static inline void bnxt_rx_vlan_v2(struct rte_mbuf *mbuf,
 190                                    struct rx_pkt_cmpl *rxcmp,
 191                                    struct rx_pkt_cmpl_hi *rxcmp1)
 192 {
 193         if (RX_CMP_VLAN_VALID(rxcmp)) {
 194                 mbuf->vlan_tci = RX_CMP_METADATA0_VID(rxcmp1);
 195                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 196         }
 197 }
 198
 199 #define RX_CMP_FLAGS2_CS_ALL_OK_MODE_MASK       (0x1 << 3)
 200 #define RX_CMP_FLAGS2_CS_OK_HDR_CNT_MASK        (0x7 << 10)
 201 #define RX_CMP_FLAGS2_IP_CSUM_ALL_OK_MASK       (0x1 << 13)
 202 #define RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK       (0x1 << 14)
 203
 204 #define RX_CMP_V2_CS_OK_HDR_CNT(flags)                          \
 205         (((flags) & RX_CMP_FLAGS2_CS_OK_HDR_CNT_MASK) >>        \
 206          RX_PKT_V2_CMPL_HI_FLAGS2_CS_OK_SFT)
 207
 208 #define RX_CMP_V2_CS_ALL_OK_MODE(flags)                         \
 209         (((flags) & RX_CMP_FLAGS2_CS_ALL_OK_MODE_MASK))
 210
 211 #define RX_CMP_FLAGS2_L3_CS_OK_MASK             (0x7 << 10)
 212 #define RX_CMP_FLAGS2_L4_CS_OK_MASK             (0x38 << 10)
 213 #define RX_CMP_FLAGS2_L3_CS_OK_SFT              10
 214 #define RX_CMP_FLAGS2_L4_CS_OK_SFT              13
 215
 216 #define RX_CMP_V2_L4_CS_OK(flags2)                      \
 217         (((flags2) & RX_CMP_FLAGS2_L4_CS_OK_MASK) >>    \
 218          RX_CMP_FLAGS2_L4_CS_OK_SFT)
 219
 220 #define RX_CMP_V2_L3_CS_OK(flags2)                      \
 221         (((flags2) & RX_CMP_FLAGS2_L3_CS_OK_MASK) >>    \
 222          RX_CMP_FLAGS2_L3_CS_OK_SFT)
 223
 224 #define RX_CMP_V2_L4_CS_ERR(err)                                \
 225         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_MASK)  ==  \
 226          RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_L4_CS_ERROR)
 227
 228 #define RX_CMP_V2_L3_CS_ERR(err)                                \
 229         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_MASK) ==   \
 230          RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_IP_CS_ERROR)
 231
 232 #define RX_CMP_V2_T_IP_CS_ERR(err)                              \
 233         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_MASK) == \
 234          RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_T_IP_CS_ERROR)
 235
 236 #define RX_CMP_V2_T_L4_CS_ERR(err)                              \
 237         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_MASK) == \
 238          RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_T_L4_CS_ERROR)
 239
 240 #define RX_CMP_V2_OT_L4_CS_ERR(err)                                     \
 241         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_MASK) ==        \
 242          RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L4_CS_ERROR)
 243
 244 static inline void bnxt_parse_csum_v2(struct rte_mbuf *mbuf,
 245                                       struct rx_pkt_cmpl_hi *rxcmp1)
 246 {
 247         struct rx_pkt_v2_cmpl_hi *v2_cmp =
 248                 (struct rx_pkt_v2_cmpl_hi *)(rxcmp1);
 249         uint16_t error_v2 = rte_le_to_cpu_16(v2_cmp->errors_v2);
 250         uint32_t flags2 = rte_le_to_cpu_32(v2_cmp->flags2);
 251         uint32_t hdr_cnt = 0, t_pkt = 0;
 252
 253         if (RX_CMP_V2_CS_ALL_OK_MODE(flags2)) {
 254                 hdr_cnt = RX_CMP_V2_CS_OK_HDR_CNT(flags2);
 255                 if (hdr_cnt > 1)
 256                         t_pkt = 1;
 257
 258                 if (unlikely(RX_CMP_V2_L4_CS_ERR(error_v2)))
 259                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 260                 else if (flags2 & RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK)
 261                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 262                 else
 263                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 264
 265                 if (unlikely(RX_CMP_V2_L3_CS_ERR(error_v2)))
 266                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 267                 else if (flags2 & RX_CMP_FLAGS2_IP_CSUM_ALL_OK_MASK)
 268                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 269                 else
 270                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 271         } else {
 272                 hdr_cnt = RX_CMP_V2_L4_CS_OK(flags2);
 273                 if (hdr_cnt > 1)
 274                         t_pkt = 1;
 275
 276                 if (RX_CMP_V2_L4_CS_OK(flags2))
 277                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 278                 else if (RX_CMP_V2_L4_CS_ERR(error_v2))
 279                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 280                 else
 281                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 282
 283                 if (RX_CMP_V2_L3_CS_OK(flags2))
 284                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 285                 else if (RX_CMP_V2_L3_CS_ERR(error_v2))
 286                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 287                 else
 288                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 289         }
 290
 291         if (t_pkt) {
 292                 if (unlikely(RX_CMP_V2_OT_L4_CS_ERR(error_v2) ||
 293                                         RX_CMP_V2_T_L4_CS_ERR(error_v2)))
 294                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 295                 else
 296                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 297
 298                 if (unlikely(RX_CMP_V2_T_IP_CS_ERR(error_v2)))
 299                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 300         }
 301 }
 302
 303 static inline void
 304 bnxt_parse_pkt_type_v2(struct rte_mbuf *mbuf,
 305                        struct rx_pkt_cmpl *rxcmp,
 306                        struct rx_pkt_cmpl_hi *rxcmp1)
 307 {
 308         struct rx_pkt_v2_cmpl *v2_cmp =
 309                 (struct rx_pkt_v2_cmpl *)(rxcmp);
 310         struct rx_pkt_v2_cmpl_hi *v2_cmp1 =
 311                 (struct rx_pkt_v2_cmpl_hi *)(rxcmp1);
 312         uint16_t flags_type = v2_cmp->flags_type &
 313                 rte_cpu_to_le_32(RX_PKT_V2_CMPL_FLAGS_ITYPE_MASK);
 314         uint32_t flags2 = rte_le_to_cpu_32(v2_cmp1->flags2);
 315         uint32_t l3, pkt_type = 0, vlan = 0;
 316         uint32_t ip6 = 0, t_pkt = 0;
 317         uint32_t hdr_cnt, csum_count;
 318
 319         if (RX_CMP_V2_CS_ALL_OK_MODE(flags2)) {
 320                 hdr_cnt = RX_CMP_V2_CS_OK_HDR_CNT(flags2);
 321                 if (hdr_cnt > 1)
 322                         t_pkt = 1;
 323         } else {
 324                 csum_count = RX_CMP_V2_L4_CS_OK(flags2);
 325                 if (csum_count > 1)
 326                         t_pkt = 1;
 327         }
 328
 329         vlan = !!RX_CMP_VLAN_VALID(rxcmp);
 330         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
 331
 332         ip6 = !!(flags2 & RX_PKT_V2_CMPL_HI_FLAGS2_IP_TYPE);
 333
 334         if (!t_pkt && !ip6)
 335                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 336         else if (!t_pkt && ip6)
 337                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 338         else if (t_pkt && !ip6)
 339                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 340         else
 341                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 342
 343         switch (flags_type) {
 344         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_ICMP):
 345                 if (!t_pkt)
 346                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
 347                 else
 348                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 349                 break;
 350         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_TCP):
 351                 if (!t_pkt)
 352                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
 353                 else
 354                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
 355                 break;
 356         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_UDP):
 357                 if (!t_pkt)
 358                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
 359                 else
 360                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
 361                 break;
 362         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_IP):
 363                 pkt_type |= l3;
 364                 break;
 365         }
 366
 367         mbuf->packet_type = pkt_type;
 368 }
 369
 370 #endif /*  _BNXT_RXR_H_ */