b43256e03e59e989087431dd6ad2001c37a1c91a
[dpdk.git] / drivers / net / bnxt / bnxt_rxr.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2021 Broadcom
3  * All rights reserved.
4  */
5
6 #ifndef _BNXT_RXR_H_
7 #define _BNXT_RXR_H_
8 #include "hsi_struct_def_dpdk.h"
9
10 #define BNXT_TPA_START_AGG_ID_PRE_TH(cmp) \
11         ((rte_le_to_cpu_16((cmp)->agg_id) & RX_TPA_START_CMPL_AGG_ID_MASK) >> \
12          RX_TPA_START_CMPL_AGG_ID_SFT)
13
14 #define BNXT_TPA_START_AGG_ID_TH(cmp) \
15         rte_le_to_cpu_16((cmp)->agg_id)
16
17 static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp,
18                                              struct rx_tpa_start_cmpl *cmp)
19 {
20         if (BNXT_CHIP_P5(bp))
21                 return BNXT_TPA_START_AGG_ID_TH(cmp);
22         else
23                 return BNXT_TPA_START_AGG_ID_PRE_TH(cmp);
24 }
25
26 #define BNXT_TPA_END_AGG_BUFS(cmp) \
27         (((cmp)->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) \
28          >> RX_TPA_END_CMPL_AGG_BUFS_SFT)
29
30 #define BNXT_TPA_END_AGG_BUFS_TH(cmp) \
31         ((cmp)->tpa_agg_bufs)
32
33 #define BNXT_TPA_END_AGG_ID(cmp) \
34         (((cmp)->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >> \
35          RX_TPA_END_CMPL_AGG_ID_SFT)
36
37 #define BNXT_TPA_END_AGG_ID_TH(cmp) \
38         rte_le_to_cpu_16((cmp)->agg_id)
39
40 #define BNXT_RX_L2_AGG_BUFS(cmp) \
41         (((cmp)->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK) >> \
42                 RX_PKT_CMPL_AGG_BUFS_SFT)
43
44 /* Number of descriptors to process per inner loop in vector mode. */
45 #define RTE_BNXT_DESCS_PER_LOOP         4U
46
47 #define BNXT_OL_FLAGS_TBL_DIM   64
48 #define BNXT_OL_FLAGS_ERR_TBL_DIM 32
49
50 struct bnxt_tpa_info {
51         struct rte_mbuf                 *mbuf;
52         uint16_t                        len;
53         uint32_t                        agg_count;
54         struct rx_tpa_v2_abuf_cmpl      agg_arr[TPA_MAX_NUM_SEGS];
55
56         uint32_t                        rss_hash;
57         uint32_t                        vlan;
58         uint16_t                        cfa_code;
59         uint8_t                         hash_valid:1;
60         uint8_t                         vlan_valid:1;
61         uint8_t                         cfa_code_valid:1;
62         uint8_t                         l4_csum_valid:1;
63 };
64
65 struct bnxt_rx_ring_info {
66         uint16_t                rx_raw_prod;
67         uint16_t                ag_raw_prod;
68         uint16_t                rx_cons; /* Needed for representor */
69         struct bnxt_db_info     rx_db;
70         struct bnxt_db_info     ag_db;
71
72         struct rx_prod_pkt_bd   *rx_desc_ring;
73         struct rx_prod_pkt_bd   *ag_desc_ring;
74         struct rte_mbuf         **rx_buf_ring; /* sw ring */
75         struct rte_mbuf         **ag_buf_ring; /* sw ring */
76
77         rte_iova_t              rx_desc_mapping;
78         rte_iova_t              ag_desc_mapping;
79
80         struct bnxt_ring        *rx_ring_struct;
81         struct bnxt_ring        *ag_ring_struct;
82
83         /*
84          * To deal with out of order return from TPA, use free buffer indicator
85          */
86         struct rte_bitmap       *ag_bitmap;
87
88         struct bnxt_tpa_info *tpa_info;
89
90         uint32_t ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
91         uint32_t ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];
92 };
93
94 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
95                                uint16_t nb_pkts);
96 void bnxt_free_rx_rings(struct bnxt *bp);
97 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);
98 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
99 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
100 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
101 int bnxt_flush_rx_cmp(struct bnxt_cp_ring_info *cpr);
102
103 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
104 uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
105                             uint16_t nb_pkts);
106 int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
107 #endif
108
109 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
110                            struct rx_pkt_cmpl_hi *rxcmp1,
111                            struct rte_mbuf *mbuf);
112
113 typedef uint32_t bnxt_cfa_code_dynfield_t;
114 extern int bnxt_cfa_code_dynfield_offset;
115
116 static inline bnxt_cfa_code_dynfield_t *
117 bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
118 {
119         return RTE_MBUF_DYNFIELD(mbuf,
120                 bnxt_cfa_code_dynfield_offset, bnxt_cfa_code_dynfield_t *);
121 }
122
123 #define BNXT_RX_META_CFA_CODE_SHIFT             19
124 #define BNXT_CFA_CODE_META_SHIFT                16
125 #define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT   0x8000000
126 #define BNXT_RX_META_CFA_CODE_EEM_BIT           0x4000000
127 #define BNXT_CFA_META_FMT_MASK                  0x70
128 #define BNXT_CFA_META_FMT_SHFT                  4
129 #define BNXT_CFA_META_FMT_EM_EEM_SHFT           1
130 #define BNXT_CFA_META_FMT_EEM                   3
131 #define BNXT_CFA_META_EEM_TCAM_SHIFT            31
132 #define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
133
134 #define BNXT_PTYPE_TBL_DIM      128
135 extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
136
137 /* Stingray2 specific code for RX completion parsing */
138 #define RX_CMP_VLAN_VALID(rxcmp)        \
139         (((struct rx_pkt_v2_cmpl *)rxcmp)->metadata1_payload_offset &   \
140          RX_PKT_V2_CMPL_METADATA1_VALID)
141
142 #define RX_CMP_METADATA0_VID(rxcmp1)                            \
143         ((((struct rx_pkt_v2_cmpl_hi *)rxcmp1)->metadata0) &    \
144          (RX_PKT_V2_CMPL_HI_METADATA0_VID_MASK |                \
145           RX_PKT_V2_CMPL_HI_METADATA0_DE  |                     \
146           RX_PKT_V2_CMPL_HI_METADATA0_PRI_MASK))
147
148 static inline void bnxt_rx_vlan_v2(struct rte_mbuf *mbuf,
149                                    struct rx_pkt_cmpl *rxcmp,
150                                    struct rx_pkt_cmpl_hi *rxcmp1)
151 {
152         if (RX_CMP_VLAN_VALID(rxcmp)) {
153                 mbuf->vlan_tci = RX_CMP_METADATA0_VID(rxcmp1);
154                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
155         }
156 }
157
158 #define RX_CMP_FLAGS2_CS_ALL_OK_MODE_MASK       (0x1 << 3)
159 #define RX_CMP_FLAGS2_CS_OK_HDR_CNT_MASK        (0x7 << 10)
160 #define RX_CMP_FLAGS2_IP_CSUM_ALL_OK_MASK       (0x1 << 13)
161 #define RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK       (0x1 << 14)
162
163 #define RX_CMP_V2_CS_OK_HDR_CNT(flags)                          \
164         (((flags) & RX_CMP_FLAGS2_CS_OK_HDR_CNT_MASK) >>        \
165          RX_PKT_V2_CMPL_HI_FLAGS2_CS_OK_SFT)
166
167 #define RX_CMP_V2_CS_ALL_OK_MODE(flags)                         \
168         (((flags) & RX_CMP_FLAGS2_CS_ALL_OK_MODE_MASK))
169
170 #define RX_CMP_FLAGS2_L3_CS_OK_MASK             (0x7 << 10)
171 #define RX_CMP_FLAGS2_L4_CS_OK_MASK             (0x38 << 10)
172 #define RX_CMP_FLAGS2_L3_CS_OK_SFT              10
173 #define RX_CMP_FLAGS2_L4_CS_OK_SFT              13
174
175 #define RX_CMP_V2_L4_CS_OK(flags2)                      \
176         (((flags2) & RX_CMP_FLAGS2_L4_CS_OK_MASK) >>    \
177          RX_CMP_FLAGS2_L4_CS_OK_SFT)
178
179 #define RX_CMP_V2_L3_CS_OK(flags2)                      \
180         (((flags2) & RX_CMP_FLAGS2_L3_CS_OK_MASK) >>    \
181          RX_CMP_FLAGS2_L3_CS_OK_SFT)
182
183 #define RX_CMP_V2_L4_CS_ERR(err)                                \
184         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_MASK)  ==  \
185          RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_L4_CS_ERROR)
186
187 #define RX_CMP_V2_L3_CS_ERR(err)                                \
188         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_MASK) ==   \
189          RX_PKT_V2_CMPL_HI_ERRORS_PKT_ERROR_IP_CS_ERROR)
190
191 #define RX_CMP_V2_T_IP_CS_ERR(err)                              \
192         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_MASK) == \
193          RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_T_IP_CS_ERROR)
194
195 #define RX_CMP_V2_T_L4_CS_ERR(err)                              \
196         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_MASK) == \
197          RX_PKT_V2_CMPL_HI_ERRORS_T_PKT_ERROR_T_L4_CS_ERROR)
198
199 #define RX_CMP_V2_OT_L4_CS_ERR(err)                                     \
200         (((err) & RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_MASK) ==        \
201          RX_PKT_V2_CMPL_HI_ERRORS_OT_PKT_ERROR_OT_L4_CS_ERROR)
202
203 static inline void bnxt_parse_csum_v2(struct rte_mbuf *mbuf,
204                                       struct rx_pkt_cmpl_hi *rxcmp1)
205 {
206         struct rx_pkt_v2_cmpl_hi *v2_cmp =
207                 (struct rx_pkt_v2_cmpl_hi *)(rxcmp1);
208         uint16_t error_v2 = rte_le_to_cpu_16(v2_cmp->errors_v2);
209         uint32_t flags2 = rte_le_to_cpu_32(v2_cmp->flags2);
210         uint32_t hdr_cnt = 0, t_pkt = 0;
211
212         if (RX_CMP_V2_CS_ALL_OK_MODE(flags2)) {
213                 hdr_cnt = RX_CMP_V2_CS_OK_HDR_CNT(flags2);
214                 if (hdr_cnt > 1)
215                         t_pkt = 1;
216
217                 if (unlikely(RX_CMP_V2_L4_CS_ERR(error_v2)))
218                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
219                 else if (flags2 & RX_CMP_FLAGS2_L4_CSUM_ALL_OK_MASK)
220                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
221                 else
222                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
223
224                 if (unlikely(RX_CMP_V2_L3_CS_ERR(error_v2)))
225                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
226                 else if (flags2 & RX_CMP_FLAGS2_IP_CSUM_ALL_OK_MASK)
227                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
228                 else
229                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
230         } else {
231                 hdr_cnt = RX_CMP_V2_L4_CS_OK(flags2);
232                 if (hdr_cnt > 1)
233                         t_pkt = 1;
234
235                 if (RX_CMP_V2_L4_CS_OK(flags2))
236                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
237                 else if (RX_CMP_V2_L4_CS_ERR(error_v2))
238                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
239                 else
240                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
241
242                 if (RX_CMP_V2_L3_CS_OK(flags2))
243                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
244                 else if (RX_CMP_V2_L3_CS_ERR(error_v2))
245                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
246                 else
247                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
248         }
249
250         if (t_pkt) {
251                 if (unlikely(RX_CMP_V2_OT_L4_CS_ERR(error_v2) ||
252                                         RX_CMP_V2_T_L4_CS_ERR(error_v2)))
253                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
254                 else
255                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
256
257                 if (unlikely(RX_CMP_V2_T_IP_CS_ERR(error_v2)))
258                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
259         }
260 }
261
262 static inline void
263 bnxt_parse_pkt_type_v2(struct rte_mbuf *mbuf,
264                        struct rx_pkt_cmpl *rxcmp,
265                        struct rx_pkt_cmpl_hi *rxcmp1)
266 {
267         struct rx_pkt_v2_cmpl *v2_cmp =
268                 (struct rx_pkt_v2_cmpl *)(rxcmp);
269         struct rx_pkt_v2_cmpl_hi *v2_cmp1 =
270                 (struct rx_pkt_v2_cmpl_hi *)(rxcmp1);
271         uint16_t flags_type = v2_cmp->flags_type &
272                 rte_cpu_to_le_32(RX_PKT_V2_CMPL_FLAGS_ITYPE_MASK);
273         uint32_t flags2 = rte_le_to_cpu_32(v2_cmp1->flags2);
274         uint32_t l3, pkt_type = 0, vlan = 0;
275         uint32_t ip6 = 0, t_pkt = 0;
276         uint32_t hdr_cnt, csum_count;
277
278         if (RX_CMP_V2_CS_ALL_OK_MODE(flags2)) {
279                 hdr_cnt = RX_CMP_V2_CS_OK_HDR_CNT(flags2);
280                 if (hdr_cnt > 1)
281                         t_pkt = 1;
282         } else {
283                 csum_count = RX_CMP_V2_L4_CS_OK(flags2);
284                 if (csum_count > 1)
285                         t_pkt = 1;
286         }
287
288         vlan = !!RX_CMP_VLAN_VALID(rxcmp);
289         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
290
291         ip6 = !!(flags2 & RX_PKT_V2_CMPL_HI_FLAGS2_IP_TYPE);
292
293         if (!t_pkt && !ip6)
294                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
295         else if (!t_pkt && ip6)
296                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
297         else if (t_pkt && !ip6)
298                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
299         else
300                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
301
302         switch (flags_type) {
303         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_ICMP):
304                 if (!t_pkt)
305                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
306                 else
307                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
308                 break;
309         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_TCP):
310                 if (!t_pkt)
311                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
312                 else
313                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
314                 break;
315         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_UDP):
316                 if (!t_pkt)
317                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
318                 else
319                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
320                 break;
321         case RTE_LE32(RX_PKT_V2_CMPL_FLAGS_ITYPE_IP):
322                 pkt_type |= l3;
323                 break;
324         }
325
326         mbuf->packet_type = pkt_type;
327 }
328
329 #endif /*  _BNXT_RXR_H_ */