1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Broadcom All rights reserved. */
7 #include <rte_bitmap.h>
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
10 #include <rte_memory.h>
15 #include "bnxt_ring.h"
16 #include "bnxt_rxtx_vec_common.h"
26 bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)
28 struct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];
29 struct rte_mbuf **rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];
30 struct rte_mbuf *mb0, *mb1;
33 const uint64x2_t hdr_room = {0, RTE_PKTMBUF_HEADROOM};
34 const uint64x2_t addrmask = {0, UINT64_MAX};
37 * Number of mbufs to allocate must be a multiple of two. The
38 * allocation must not go past the end of the ring.
40 nb = RTE_MIN(rxq->rxrearm_nb & ~0x1,
41 rxq->nb_rx_desc - rxq->rxrearm_start);
43 /* Allocate new mbufs into the software ring */
44 if (rte_mempool_get_bulk(rxq->mb_pool, (void *)rx_bufs, nb) < 0) {
45 rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += nb;
50 /* Initialize the mbufs in vector, process 2 mbufs in one loop */
51 for (i = 0; i < nb; i += 2, rx_bufs += 2) {
52 uint64x2_t buf_addr0, buf_addr1;
53 uint64x2_t rxbd0, rxbd1;
58 /* Load address fields from both mbufs */
59 buf_addr0 = vld1q_u64((uint64_t *)&mb0->buf_addr);
60 buf_addr1 = vld1q_u64((uint64_t *)&mb1->buf_addr);
62 /* Load both rx descriptors (preserving some existing fields) */
63 rxbd0 = vld1q_u64((uint64_t *)(rxbds + 0));
64 rxbd1 = vld1q_u64((uint64_t *)(rxbds + 1));
66 /* Add default offset to buffer address. */
67 buf_addr0 = vaddq_u64(buf_addr0, hdr_room);
68 buf_addr1 = vaddq_u64(buf_addr1, hdr_room);
70 /* Clear all fields except address. */
71 buf_addr0 = vandq_u64(buf_addr0, addrmask);
72 buf_addr1 = vandq_u64(buf_addr1, addrmask);
74 /* Clear address field in descriptor. */
75 rxbd0 = vbicq_u64(rxbd0, addrmask);
76 rxbd1 = vbicq_u64(rxbd1, addrmask);
78 /* Set address field in descriptor. */
79 rxbd0 = vaddq_u64(rxbd0, buf_addr0);
80 rxbd1 = vaddq_u64(rxbd1, buf_addr1);
82 /* Store descriptors to memory. */
83 vst1q_u64((uint64_t *)(rxbds++), rxbd0);
84 vst1q_u64((uint64_t *)(rxbds++), rxbd1);
87 rxq->rxrearm_start += nb;
88 bnxt_db_write(&rxr->rx_db, rxq->rxrearm_start - 1);
89 if (rxq->rxrearm_start >= rxq->nb_rx_desc)
90 rxq->rxrearm_start = 0;
92 rxq->rxrearm_nb -= nb;
96 bnxt_parse_pkt_type(uint32x4_t mm_rxcmp, uint32x4_t mm_rxcmp1)
98 uint32_t flags_type, flags2;
101 flags_type = vgetq_lane_u32(mm_rxcmp, 0);
102 flags2 = (uint16_t)vgetq_lane_u32(mm_rxcmp1, 0);
106 * bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
107 * bit 1: RX_CMPL_FLAGS2_IP_TYPE
108 * bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
109 * bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
111 index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
112 ((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
113 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
114 ((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
116 return bnxt_ptype_table[index];
120 bnxt_set_ol_flags(uint32x4_t mm_rxcmp, uint32x4_t mm_rxcmp1)
122 uint16_t flags_type, errors, flags;
125 /* Extract rxcmp1->flags2. */
126 flags = vgetq_lane_u32(mm_rxcmp1, 0) & 0x1F;
127 /* Extract rxcmp->flags_type. */
128 flags_type = vgetq_lane_u32(mm_rxcmp, 0);
129 /* Extract rxcmp1->errors_v2. */
130 errors = (vgetq_lane_u32(mm_rxcmp1, 2) >> 4) & flags & 0xF;
132 ol_flags = bnxt_ol_flags_table[flags & ~errors];
134 if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID)
135 ol_flags |= PKT_RX_RSS_HASH;
138 ol_flags |= bnxt_ol_flags_err_table[errors];
144 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
147 struct bnxt_rx_queue *rxq = rx_queue;
148 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
149 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
150 uint32_t raw_cons = cpr->cp_raw_cons;
153 struct rx_pkt_cmpl *rxcmp;
154 const uint64x2_t mbuf_init = {rxq->mbuf_initializer, 0};
155 const uint8x16_t shuf_msk = {
156 0xFF, 0xFF, 0xFF, 0xFF, /* pkt_type (zeroes) */
157 2, 3, 0xFF, 0xFF, /* pkt_len */
159 0xFF, 0xFF, /* vlan_tci (zeroes) */
160 12, 13, 14, 15 /* rss hash */
164 /* If Rx Q was stopped return */
165 if (unlikely(!rxq->rx_started))
168 if (rxq->rxrearm_nb >= rxq->rx_free_thresh)
169 bnxt_rxq_rearm(rxq, rxr);
171 /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
172 nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
174 /* Make nb_pkts an integer multiple of RTE_BNXT_DESCS_PER_LOOP. */
175 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
179 /* Handle RX burst request */
180 for (i = 0; i < nb_pkts; i++) {
181 uint32x4_t mm_rxcmp, mm_rxcmp1;
182 struct rx_pkt_cmpl_hi *rxcmp1;
183 uint32x4_t pkt_mb, rearm;
184 uint32_t ptype, ol_flags;
185 struct rte_mbuf *mbuf;
190 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
192 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
193 rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cons + 1];
195 if (!CMP_VALID(rxcmp1, raw_cons + 1, cpr->cp_ring_struct))
198 mm_rxcmp = vld1q_u32((uint32_t *)rxcmp);
199 mm_rxcmp1 = vld1q_u32((uint32_t *)rxcmp);
201 cons = rxcmp->opaque;
203 mbuf = rxr->rx_buf_ring[cons];
205 rxr->rx_buf_ring[cons] = NULL;
207 /* Set fields from mbuf initializer and ol_flags. */
208 ol_flags = bnxt_set_ol_flags(mm_rxcmp, mm_rxcmp1);
209 rearm = vsetq_lane_u32(ol_flags,
210 vreinterpretq_u32_u64(mbuf_init), 2);
211 vst1q_u32((uint32_t *)&mbuf->rearm_data, rearm);
213 /* Set mbuf pkt_len, data_len, and rss_hash fields. */
214 tmp = vqtbl1q_u8(vreinterpretq_u8_u32(mm_rxcmp), shuf_msk);
215 pkt_mb = vreinterpretq_u32_u8(tmp);
217 /* Set packet type. */
218 ptype = bnxt_parse_pkt_type(mm_rxcmp, mm_rxcmp1);
219 pkt_mb = vsetq_lane_u32(ptype, pkt_mb, 0);
222 vlan_tci = vgetq_lane_u32(mm_rxcmp1, 1);
223 tmp16 = vsetq_lane_u16(vlan_tci,
224 vreinterpretq_u16_u32(pkt_mb),
226 pkt_mb = vreinterpretq_u32_u16(tmp16);
228 /* Store descriptor fields. */
229 vst1q_u32((uint32_t *)&mbuf->rx_descriptor_fields1, pkt_mb);
231 rx_pkts[nb_rx_pkts++] = mbuf;
236 RING_ADV(rxr->rx_ring_struct, rxr->rx_prod, nb_rx_pkts);
238 rxq->rxrearm_nb += nb_rx_pkts;
239 cpr->cp_raw_cons = raw_cons;
241 !!(cpr->cp_raw_cons & cpr->cp_ring_struct->ring_size);
249 bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, int nr_pkts)
251 struct bnxt_tx_ring_info *txr = txq->tx_ring;
252 struct rte_mbuf **free = txq->free;
253 uint16_t cons = txr->tx_cons;
254 unsigned int blk = 0;
257 struct bnxt_sw_tx_bd *tx_buf;
258 struct rte_mbuf *mbuf;
260 tx_buf = &txr->tx_buf_ring[cons];
261 cons = RING_NEXT(txr->tx_ring_struct, cons);
262 mbuf = rte_pktmbuf_prefree_seg(tx_buf->mbuf);
263 if (unlikely(mbuf == NULL))
267 if (blk && mbuf->pool != free[0]->pool) {
268 rte_mempool_put_bulk(free[0]->pool, (void **)free, blk);
274 rte_mempool_put_bulk(free[0]->pool, (void **)free, blk);
280 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
282 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
283 uint32_t raw_cons = cpr->cp_raw_cons;
285 uint32_t nb_tx_pkts = 0;
286 struct tx_cmpl *txcmp;
287 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
288 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
289 uint32_t ring_mask = cp_ring_struct->ring_mask;
292 cons = RING_CMPL(ring_mask, raw_cons);
293 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
295 if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct))
298 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
299 nb_tx_pkts += txcmp->opaque;
302 "Unhandled CMP type %02x\n",
304 raw_cons = NEXT_RAW_CMP(raw_cons);
305 } while (nb_tx_pkts < ring_mask);
307 cpr->valid = !!(raw_cons & cp_ring_struct->ring_size);
309 bnxt_tx_cmp_vec(txq, nb_tx_pkts);
310 cpr->cp_raw_cons = raw_cons;
316 bnxt_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
319 struct bnxt_tx_queue *txq = tx_queue;
320 struct bnxt_tx_ring_info *txr = txq->tx_ring;
321 uint16_t prod = txr->tx_prod;
322 struct rte_mbuf *tx_mbuf;
323 struct tx_bd_long *txbd = NULL;
324 struct bnxt_sw_tx_bd *tx_buf;
327 nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
329 if (unlikely(nb_pkts == 0))
332 /* Handle TX burst request */
335 tx_mbuf = *tx_pkts++;
336 rte_prefetch0(tx_mbuf);
338 tx_buf = &txr->tx_buf_ring[prod];
339 tx_buf->mbuf = tx_mbuf;
342 txbd = &txr->tx_desc_ring[prod];
343 txbd->address = tx_mbuf->buf_iova + tx_mbuf->data_off;
344 txbd->len = tx_mbuf->data_len;
345 txbd->flags_type = bnxt_xmit_flags_len(tx_mbuf->data_len,
347 prod = RING_NEXT(txr->tx_ring_struct, prod);
351 /* Request a completion for last packet in burst */
353 txbd->opaque = nb_pkts;
354 txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
357 rte_compiler_barrier();
358 bnxt_db_write(&txr->tx_db, prod);
366 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
370 struct bnxt_tx_queue *txq = tx_queue;
372 /* Tx queue was stopped; wait for it to be restarted */
373 if (unlikely(!txq->tx_started)) {
374 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
378 /* Handle TX completions */
379 if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
380 bnxt_handle_tx_cp_vec(txq);
385 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
386 ret = bnxt_xmit_fixed_burst_vec(tx_queue,
399 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
401 return bnxt_rxq_vec_setup_common(rxq);