1 // SPDX-License-Identifier: BSD-3-Clause
2 /* Copyright(c) 2019 Broadcom All rights reserved. */
7 #include <rte_bitmap.h>
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
10 #include <rte_memory.h>
11 #if defined(RTE_ARCH_X86)
12 #include <tmmintrin.h>
14 #error "bnxt vector pmd: unsupported target."
19 #include "bnxt_ring.h"
22 #include "hsi_struct_def_dpdk.h"
31 #define RTE_BNXT_MAX_RX_BURST 32
32 #define RTE_BNXT_MAX_TX_BURST 32
33 #define RTE_BNXT_RXQ_REARM_THRESH 32
34 #define RTE_BNXT_DESCS_PER_LOOP 4
37 bnxt_rxq_rearm(struct bnxt_rx_queue *rxq, struct bnxt_rx_ring_info *rxr)
39 struct rx_prod_pkt_bd *rxbds = &rxr->rx_desc_ring[rxq->rxrearm_start];
40 struct bnxt_sw_rx_bd *rx_bufs = &rxr->rx_buf_ring[rxq->rxrearm_start];
41 struct rte_mbuf *mb0, *mb1;
44 const __m128i hdr_room = _mm_set_epi64x(RTE_PKTMBUF_HEADROOM, 0);
45 const __m128i addrmask = _mm_set_epi64x(UINT64_MAX, 0);
47 /* Pull RTE_BNXT_RXQ_REARM_THRESH more mbufs into the software ring */
48 if (rte_mempool_get_bulk(rxq->mb_pool,
50 RTE_BNXT_RXQ_REARM_THRESH) < 0) {
51 rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
52 RTE_BNXT_RXQ_REARM_THRESH;
57 /* Initialize the mbufs in vector, process 2 mbufs in one loop */
58 for (i = 0; i < RTE_BNXT_RXQ_REARM_THRESH; i += 2, rx_bufs += 2) {
59 __m128i buf_addr0, buf_addr1;
62 mb0 = rx_bufs[0].mbuf;
63 mb1 = rx_bufs[1].mbuf;
65 /* Load address fields from both mbufs */
66 buf_addr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);
67 buf_addr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);
69 /* Load both rx descriptors (preserving some existing fields) */
70 rxbd0 = _mm_loadu_si128((__m128i *)(rxbds + 0));
71 rxbd1 = _mm_loadu_si128((__m128i *)(rxbds + 1));
73 /* Add default offset to buffer address. */
74 buf_addr0 = _mm_add_epi64(buf_addr0, hdr_room);
75 buf_addr1 = _mm_add_epi64(buf_addr1, hdr_room);
77 /* Clear all fields except address. */
78 buf_addr0 = _mm_and_si128(buf_addr0, addrmask);
79 buf_addr1 = _mm_and_si128(buf_addr1, addrmask);
81 /* Clear address field in descriptor. */
82 rxbd0 = _mm_andnot_si128(addrmask, rxbd0);
83 rxbd1 = _mm_andnot_si128(addrmask, rxbd1);
85 /* Set address field in descriptor. */
86 rxbd0 = _mm_add_epi64(rxbd0, buf_addr0);
87 rxbd1 = _mm_add_epi64(rxbd1, buf_addr1);
89 /* Store descriptors to memory. */
90 _mm_store_si128((__m128i *)(rxbds++), rxbd0);
91 _mm_store_si128((__m128i *)(rxbds++), rxbd1);
94 rxq->rxrearm_start += RTE_BNXT_RXQ_REARM_THRESH;
95 B_RX_DB(rxr->rx_doorbell, rxq->rxrearm_start - 1);
96 if (rxq->rxrearm_start >= rxq->nb_rx_desc)
97 rxq->rxrearm_start = 0;
99 rxq->rxrearm_nb -= RTE_BNXT_RXQ_REARM_THRESH;
103 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
105 uint32_t l3, pkt_type = 0;
106 uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
109 vlan = !!(rxcmp1->flags2 &
110 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
111 pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
113 t_ipcs = !!(rxcmp1->flags2 &
114 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
115 ip6 = !!(rxcmp1->flags2 &
116 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
118 flags_type = rxcmp->flags_type &
119 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
122 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
123 else if (!t_ipcs && ip6)
124 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
125 else if (t_ipcs && !ip6)
126 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
128 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
130 switch (flags_type) {
131 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
133 pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
135 pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
138 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
140 pkt_type |= l3 | RTE_PTYPE_L4_TCP;
142 pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
145 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
147 pkt_type |= l3 | RTE_PTYPE_L4_UDP;
149 pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
152 case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
161 bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
164 struct bnxt_rx_queue *rxq = rx_queue;
165 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
166 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
167 uint32_t raw_cons = cpr->cp_raw_cons;
170 struct rx_pkt_cmpl *rxcmp;
172 const __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);
173 const __m128i shuf_msk =
174 _mm_set_epi8(15, 14, 13, 12, /* rss */
175 0xFF, 0xFF, /* vlan_tci (zeroes) */
177 0xFF, 0xFF, 3, 2, /* pkt_len */
178 0xFF, 0xFF, 0xFF, 0xFF); /* pkt_type (zeroes) */
180 /* If Rx Q was stopped return */
181 if (rxq->rx_deferred_start)
184 if (rxq->rxrearm_nb >= RTE_BNXT_RXQ_REARM_THRESH)
185 bnxt_rxq_rearm(rxq, rxr);
187 /* Return no more than RTE_BNXT_MAX_RX_BURST per call. */
188 nb_pkts = RTE_MIN(nb_pkts, RTE_BNXT_MAX_RX_BURST);
190 /* Make nb_pkts an integer multiple of RTE_BNXT_DESCS_PER_LOOP */
191 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_BNXT_DESCS_PER_LOOP);
193 /* Handle RX burst request */
195 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
197 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
199 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
202 cpr->valid = FLIP_VALID(cons,
203 cpr->cp_ring_struct->ring_mask,
206 if (likely(CMP_TYPE(rxcmp) == RX_PKT_CMPL_TYPE_RX_L2)) {
207 struct rx_pkt_cmpl_hi *rxcmp1;
208 uint32_t tmp_raw_cons;
210 struct rte_mbuf *mbuf;
211 __m128i mm_rxcmp, pkt_mb;
213 tmp_raw_cons = NEXT_RAW_CMP(raw_cons);
214 cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
215 rxcmp1 = (struct rx_pkt_cmpl_hi *)
216 &cpr->cp_desc_ring[cp_cons];
218 if (!CMP_VALID(rxcmp1, tmp_raw_cons,
219 cpr->cp_ring_struct))
222 raw_cons = tmp_raw_cons;
223 cons = rxcmp->opaque;
225 mbuf = rxr->rx_buf_ring[cons].mbuf;
227 rxr->rx_buf_ring[cons].mbuf = NULL;
229 cpr->valid = FLIP_VALID(cp_cons,
230 cpr->cp_ring_struct->ring_mask,
233 /* Set constant fields from mbuf initializer. */
234 _mm_store_si128((__m128i *)&mbuf->rearm_data,
237 /* Set mbuf pkt_len, data_len, and rss_hash fields. */
238 mm_rxcmp = _mm_load_si128((__m128i *)rxcmp);
239 pkt_mb = _mm_shuffle_epi8(mm_rxcmp, shuf_msk);
240 _mm_storeu_si128((void *)&mbuf->rx_descriptor_fields1,
243 rte_compiler_barrier();
245 if (rxcmp->flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID)
246 mbuf->ol_flags |= PKT_RX_RSS_HASH;
249 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
250 mbuf->vlan_tci = rxcmp1->metadata &
251 (RX_PKT_CMPL_METADATA_VID_MASK |
252 RX_PKT_CMPL_METADATA_DE |
253 RX_PKT_CMPL_METADATA_PRI_MASK);
254 mbuf->ol_flags |= PKT_RX_VLAN;
257 mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
259 rx_pkts[nb_rx_pkts++] = mbuf;
262 bnxt_event_hwrm_resp_handler(rxq->bp,
263 (struct cmpl_base *)rxcmp);
266 raw_cons = NEXT_RAW_CMP(raw_cons);
267 if (nb_rx_pkts == nb_pkts || evt)
270 rxr->rx_prod = RING_ADV(rxr->rx_ring_struct, rxr->rx_prod, nb_rx_pkts);
272 rxq->rxrearm_nb += nb_rx_pkts;
273 cpr->cp_raw_cons = raw_cons;
274 if (nb_rx_pkts || evt)
275 B_CP_DIS_DB(cpr, cpr->cp_raw_cons);
280 static inline void bnxt_next_cmpl(struct bnxt_cp_ring_info *cpr, uint32_t *idx,
281 bool *v, uint32_t inc)
284 if (unlikely(*idx == cpr->cp_ring_struct->ring_size)) {
291 bnxt_tx_cmp_vec(struct bnxt_tx_queue *txq, int nr_pkts)
293 struct bnxt_tx_ring_info *txr = txq->tx_ring;
294 struct rte_mbuf **free = txq->free;
295 uint16_t cons = txr->tx_cons;
296 unsigned int blk = 0;
299 struct bnxt_sw_tx_bd *tx_buf;
300 struct rte_mbuf *mbuf;
302 tx_buf = &txr->tx_buf_ring[cons];
303 cons = RING_NEXT(txr->tx_ring_struct, cons);
304 mbuf = rte_pktmbuf_prefree_seg(tx_buf->mbuf);
307 if (blk && mbuf->pool != free[0]->pool) {
308 rte_mempool_put_bulk(free[0]->pool, (void **)free, blk);
314 rte_mempool_put_bulk(free[0]->pool, (void **)free, blk);
320 bnxt_handle_tx_cp_vec(struct bnxt_tx_queue *txq)
322 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
323 uint32_t raw_cons = cpr->cp_raw_cons;
325 uint32_t nb_tx_pkts = 0;
326 struct tx_cmpl *txcmp;
327 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
328 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
329 uint32_t ring_mask = cp_ring_struct->ring_mask;
332 cons = RING_CMPL(ring_mask, raw_cons);
333 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons];
335 if (!CMPL_VALID(txcmp, cpr->valid))
337 bnxt_next_cmpl(cpr, &cons, &cpr->valid, 1);
338 rte_prefetch0(&cp_desc_ring[cons]);
340 if (likely(CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2))
341 nb_tx_pkts += txcmp->opaque;
344 "Unhandled CMP type %02x\n",
347 } while (nb_tx_pkts < ring_mask);
350 bnxt_tx_cmp_vec(txq, nb_tx_pkts);
351 cpr->cp_raw_cons = raw_cons;
352 B_CP_DB(cpr, raw_cons, ring_mask);
356 #define TX_BD_FLAGS_CMPL ((1 << TX_BD_LONG_FLAGS_BD_CNT_SFT) | \
357 TX_BD_SHORT_FLAGS_COAL_NOW | \
358 TX_BD_SHORT_TYPE_TX_BD_SHORT | \
359 TX_BD_LONG_FLAGS_PACKET_END)
361 #define TX_BD_FLAGS_NOCMPL (TX_BD_FLAGS_CMPL | TX_BD_LONG_FLAGS_NO_CMPL)
363 static inline uint32_t
364 bnxt_xmit_flags_len(uint16_t len, uint16_t flags)
368 return flags | TX_BD_LONG_FLAGS_LHINT_LT512;
370 return flags | TX_BD_LONG_FLAGS_LHINT_LT1K;
372 return flags | TX_BD_LONG_FLAGS_LHINT_LT2K;
374 return flags | TX_BD_LONG_FLAGS_LHINT_LT2K;
376 return flags | TX_BD_LONG_FLAGS_LHINT_GTE2K;
381 bnxt_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
384 struct bnxt_tx_queue *txq = tx_queue;
385 struct bnxt_tx_ring_info *txr = txq->tx_ring;
386 uint16_t prod = txr->tx_prod;
387 struct rte_mbuf *tx_mbuf;
388 struct tx_bd_long *txbd = NULL;
389 struct bnxt_sw_tx_bd *tx_buf;
392 nb_pkts = RTE_MIN(nb_pkts, bnxt_tx_avail(txq));
394 if (unlikely(nb_pkts == 0))
397 /* Handle TX burst request */
400 tx_mbuf = *tx_pkts++;
401 rte_prefetch0(tx_mbuf);
403 tx_buf = &txr->tx_buf_ring[prod];
404 tx_buf->mbuf = tx_mbuf;
407 txbd = &txr->tx_desc_ring[prod];
408 txbd->address = tx_mbuf->buf_iova + tx_mbuf->data_off;
409 txbd->len = tx_mbuf->data_len;
410 txbd->flags_type = bnxt_xmit_flags_len(tx_mbuf->data_len,
412 prod = RING_NEXT(txr->tx_ring_struct, prod);
416 /* Request a completion for last packet in burst */
418 txbd->opaque = nb_pkts;
419 txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
422 rte_compiler_barrier();
423 B_TX_DB(txr->tx_doorbell, prod);
431 bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
435 struct bnxt_tx_queue *txq = tx_queue;
437 /* Tx queue was stopped; wait for it to be restarted */
438 if (unlikely(txq->tx_deferred_start)) {
439 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
443 /* Handle TX completions */
444 if (bnxt_tx_bds_in_hw(txq) >= txq->tx_free_thresh)
445 bnxt_handle_tx_cp_vec(txq);
450 num = RTE_MIN(nb_pkts, RTE_BNXT_MAX_TX_BURST);
451 ret = bnxt_xmit_fixed_burst_vec(tx_queue,
463 int __attribute__((cold))
464 bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq)
467 struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
470 mb_def.data_off = RTE_PKTMBUF_HEADROOM;
471 mb_def.port = rxq->port_id;
472 rte_mbuf_refcnt_set(&mb_def, 1);
474 /* prevent compiler reordering: rearm_data covers previous fields */
475 rte_compiler_barrier();
476 p = (uintptr_t)&mb_def.rearm_data;
477 rxq->mbuf_initializer = *(uint64_t *)p;
479 rxq->rxrearm_start = 0;